diff --git a/src/amd/vulkan/radv_cmd_buffer.c b/src/amd/vulkan/radv_cmd_buffer.c
index 17f5d8e6e0e..1f47893989f 100644
--- a/src/amd/vulkan/radv_cmd_buffer.c
+++ b/src/amd/vulkan/radv_cmd_buffer.c
@@ -8496,9 +8496,6 @@ radv_emit_ray_tracing_pipeline(struct radv_cmd_buffer *cmd_buffer, struct radv_r
    const struct radv_shader *rt_prolog = cmd_buffer->state.rt_prolog;
    struct radv_cmd_stream *cs = cmd_buffer->cs;
 
-   if (pipeline == cmd_buffer->state.emitted_rt_pipeline)
-      return;
-
    radeon_check_space(device->ws, cs->b, pdev->info.gfx_level >= GFX10 ? 25 : 22);
 
    radv_emit_compute_shader(pdev, cs, rt_prolog);
@@ -8532,8 +8529,6 @@ radv_emit_ray_tracing_pipeline(struct radv_cmd_buffer *cmd_buffer, struct radv_r
       radeon_end();
    }
 
-   cmd_buffer->state.emitted_rt_pipeline = pipeline;
-
    if (radv_device_fault_detection_enabled(device))
       radv_save_pipeline(cmd_buffer, &pipeline->base.base);
 }
@@ -9108,6 +9103,7 @@ radv_bind_rt_pipeline(struct radv_cmd_buffer *cmd_buffer, struct radv_ray_tracin
    }
 
    cmd_buffer->state.rt_pipeline = rt_pipeline;
+   cmd_buffer->state.dirty |= RADV_CMD_DIRTY_RAY_TRACING_PIPELINE;
    cmd_buffer->push_constant_stages |= RADV_RT_STAGE_BITS;
    cmd_buffer->state.prefetch_L2_mask |= RADV_PREFETCH_RT;
 
@@ -10038,8 +10034,6 @@ radv_CmdExecuteCommands(VkCommandBuffer commandBuffer, uint32_t commandBufferCou
 
       device->ws->cs_execute_secondary(primary_cs->b, secondary_cs->b, allow_ib2);
 
-      primary->state.emitted_rt_pipeline = secondary->state.emitted_rt_pipeline;
-
       primary->state.emitted_vs_prolog = secondary->state.emitted_vs_prolog;
 
       if (secondary->state.last_ia_multi_vgt_param) {
@@ -10094,9 +10088,9 @@ radv_CmdExecuteCommands(VkCommandBuffer commandBuffer, uint32_t commandBufferCou
     */
    primary->state.dirty_dynamic |= RADV_DYNAMIC_ALL;
    primary->state.dirty |= RADV_CMD_DIRTY_GRAPHICS_PIPELINE | RADV_CMD_DIRTY_COMPUTE_PIPELINE |
-                           RADV_CMD_DIRTY_INDEX_BUFFER | RADV_CMD_DIRTY_GUARDBAND | RADV_CMD_DIRTY_SHADER_QUERY |
-                           RADV_CMD_DIRTY_OCCLUSION_QUERY | RADV_CMD_DIRTY_DB_SHADER_CONTROL |
-                           RADV_CMD_DIRTY_FRAGMENT_OUTPUT;
+                           RADV_CMD_DIRTY_RAY_TRACING_PIPELINE | RADV_CMD_DIRTY_INDEX_BUFFER |
+                           RADV_CMD_DIRTY_GUARDBAND | RADV_CMD_DIRTY_SHADER_QUERY | RADV_CMD_DIRTY_OCCLUSION_QUERY |
+                           RADV_CMD_DIRTY_DB_SHADER_CONTROL | RADV_CMD_DIRTY_FRAGMENT_OUTPUT;
    radv_mark_descriptors_dirty(primary, VK_PIPELINE_BIND_POINT_GRAPHICS);
    radv_mark_descriptors_dirty(primary, VK_PIPELINE_BIND_POINT_COMPUTE);
 
@@ -14296,7 +14290,7 @@ radv_before_dispatch(struct radv_cmd_buffer *cmd_buffer, struct radv_compute_pip
        */
       radv_mark_descriptors_dirty(cmd_buffer, VK_PIPELINE_BIND_POINT_RAY_TRACING_KHR);
       cmd_buffer->push_constant_stages |= RADV_RT_STAGE_BITS;
-      cmd_buffer->state.emitted_rt_pipeline = NULL;
+      cmd_buffer->state.dirty |= RADV_CMD_DIRTY_RAY_TRACING_PIPELINE;
    }
 }
 
@@ -14332,11 +14326,14 @@ radv_before_trace_rays(struct radv_cmd_buffer *cmd_buffer, struct radv_ray_traci
 {
    const struct radv_device *device = radv_cmd_buffer_device(cmd_buffer);
    const struct radv_physical_device *pdev = radv_device_physical(device);
-   const bool pipeline_is_dirty = pipeline != cmd_buffer->state.emitted_rt_pipeline;
+   const bool pipeline_is_dirty = !!(cmd_buffer->state.dirty & RADV_CMD_DIRTY_RAY_TRACING_PIPELINE);
 
    /* Use the optimal packet order similar to draws. */
-   if (pipeline)
+   if (cmd_buffer->state.dirty & RADV_CMD_DIRTY_RAY_TRACING_PIPELINE) {
       radv_emit_ray_tracing_pipeline(cmd_buffer, pipeline);
+      cmd_buffer->state.dirty &= ~RADV_CMD_DIRTY_RAY_TRACING_PIPELINE;
+   }
+
    radv_emit_rt_stack_size(cmd_buffer);
 
    radv_upload_compute_shader_descriptors(cmd_buffer, VK_PIPELINE_BIND_POINT_RAY_TRACING_KHR);
diff --git a/src/amd/vulkan/radv_cmd_buffer.h b/src/amd/vulkan/radv_cmd_buffer.h
index 02dbe2d961e..51e12aa28d0 100644
--- a/src/amd/vulkan/radv_cmd_buffer.h
+++ b/src/amd/vulkan/radv_cmd_buffer.h
@@ -87,44 +87,45 @@ enum radv_dynamic_state_bits {
 enum radv_cmd_dirty_bits {
    RADV_CMD_DIRTY_GRAPHICS_PIPELINE = 1ull << 0,
    RADV_CMD_DIRTY_COMPUTE_PIPELINE = 1ull << 1,
-   RADV_CMD_DIRTY_INDEX_BUFFER = 1ull << 2,
-   RADV_CMD_DIRTY_VERTEX_BUFFER = 1ull << 3,
-   RADV_CMD_DIRTY_STREAMOUT_BUFFER = 1ull << 4,
-   RADV_CMD_DIRTY_GUARDBAND = 1ull << 5,
-   RADV_CMD_DIRTY_RBPLUS = 1ull << 6,
-   RADV_CMD_DIRTY_OCCLUSION_QUERY = 1ull << 7,
-   RADV_CMD_DIRTY_DB_SHADER_CONTROL = 1ull << 8,
-   RADV_CMD_DIRTY_STREAMOUT_ENABLE = 1ull << 9,
-   RADV_CMD_DIRTY_GRAPHICS_SHADERS = 1ull << 10,
-   RADV_CMD_DIRTY_FRAGMENT_OUTPUT = 1ull << 11,
-   RADV_CMD_DIRTY_PS_STATE = 1ull << 12,
-   RADV_CMD_DIRTY_NGG_STATE = 1ull << 13,
-   RADV_CMD_DIRTY_TASK_STATE = 1ull << 14,
-   RADV_CMD_DIRTY_DEPTH_STENCIL_STATE = 1ull << 15,
-   RADV_CMD_DIRTY_RASTER_STATE = 1ull << 16,
-   RADV_CMD_DIRTY_MSAA_STATE = 1ull << 17,
-   RADV_CMD_DIRTY_CLIP_RECTS_STATE = 1ull << 18,
-   RADV_CMD_DIRTY_TCS_TES_STATE = 1ull << 19,
-   RADV_CMD_DIRTY_CB_RENDER_STATE = 1ull << 20,
-   RADV_CMD_DIRTY_VIEWPORT_STATE = 1ull << 21,
-   RADV_CMD_DIRTY_BINNING_STATE = 1ull << 22,
-   RADV_CMD_DIRTY_FSR_STATE = 1ull << 23,
-   RADV_CMD_DIRTY_RAST_SAMPLES_STATE = 1ull << 24,
-   RADV_CMD_DIRTY_DEPTH_BIAS_STATE = 1ull << 25,
-   RADV_CMD_DIRTY_VS_PROLOG_STATE = 1ull << 26,
-   RADV_CMD_DIRTY_BLEND_CONSTANTS_STATE = 1ull << 27,
-   RADV_CMD_DIRTY_SAMPLE_LOCATIONS_STATE = 1ull << 28,
-   RADV_CMD_DIRTY_SCISSOR_STATE = 1ull << 29,
-   RADV_CMD_DIRTY_TESS_DOMAIN_ORIGIN_STATE = 1ull << 30,
-   RADV_CMD_DIRTY_LS_HS_CONFIG = 1ull << 31,
-   RADV_CMD_DIRTY_VGT_PRIM_STATE = 1ull << 32,
-   RADV_CMD_DIRTY_FORCE_VRS_STATE = 1ull << 33,
-   RADV_CMD_DIRTY_NGGC_VIEWPORT = 1ull << 34,
-   RADV_CMD_DIRTY_NGGC_SETTINGS = 1ull << 35,
-   RADV_CMD_DIRTY_PS_EPILOG_SHADER = 1ull << 36,
-   RADV_CMD_DIRTY_PS_EPILOG_STATE = 1ull << 37,
-   RADV_CMD_DIRTY_GFX12_HIZ_WA_STATE = 1ull << 38,
-   RADV_CMD_DIRTY_ALL = (1ull << 39) - 1,
+   RADV_CMD_DIRTY_RAY_TRACING_PIPELINE = 1ull << 2,
+   RADV_CMD_DIRTY_INDEX_BUFFER = 1ull << 3,
+   RADV_CMD_DIRTY_VERTEX_BUFFER = 1ull << 4,
+   RADV_CMD_DIRTY_STREAMOUT_BUFFER = 1ull << 5,
+   RADV_CMD_DIRTY_GUARDBAND = 1ull << 6,
+   RADV_CMD_DIRTY_RBPLUS = 1ull << 7,
+   RADV_CMD_DIRTY_OCCLUSION_QUERY = 1ull << 8,
+   RADV_CMD_DIRTY_DB_SHADER_CONTROL = 1ull << 9,
+   RADV_CMD_DIRTY_STREAMOUT_ENABLE = 1ull << 10,
+   RADV_CMD_DIRTY_GRAPHICS_SHADERS = 1ull << 11,
+   RADV_CMD_DIRTY_FRAGMENT_OUTPUT = 1ull << 12,
+   RADV_CMD_DIRTY_PS_STATE = 1ull << 13,
+   RADV_CMD_DIRTY_NGG_STATE = 1ull << 14,
+   RADV_CMD_DIRTY_TASK_STATE = 1ull << 15,
+   RADV_CMD_DIRTY_DEPTH_STENCIL_STATE = 1ull << 16,
+   RADV_CMD_DIRTY_RASTER_STATE = 1ull << 17,
+   RADV_CMD_DIRTY_MSAA_STATE = 1ull << 18,
+   RADV_CMD_DIRTY_CLIP_RECTS_STATE = 1ull << 19,
+   RADV_CMD_DIRTY_TCS_TES_STATE = 1ull << 20,
+   RADV_CMD_DIRTY_CB_RENDER_STATE = 1ull << 21,
+   RADV_CMD_DIRTY_VIEWPORT_STATE = 1ull << 22,
+   RADV_CMD_DIRTY_BINNING_STATE = 1ull << 23,
+   RADV_CMD_DIRTY_FSR_STATE = 1ull << 24,
+   RADV_CMD_DIRTY_RAST_SAMPLES_STATE = 1ull << 25,
+   RADV_CMD_DIRTY_DEPTH_BIAS_STATE = 1ull << 26,
+   RADV_CMD_DIRTY_VS_PROLOG_STATE = 1ull << 27,
+   RADV_CMD_DIRTY_BLEND_CONSTANTS_STATE = 1ull << 28,
+   RADV_CMD_DIRTY_SAMPLE_LOCATIONS_STATE = 1ull << 29,
+   RADV_CMD_DIRTY_SCISSOR_STATE = 1ull << 30,
+   RADV_CMD_DIRTY_TESS_DOMAIN_ORIGIN_STATE = 1ull << 31,
+   RADV_CMD_DIRTY_LS_HS_CONFIG = 1ull << 32,
+   RADV_CMD_DIRTY_VGT_PRIM_STATE = 1ull << 33,
+   RADV_CMD_DIRTY_FORCE_VRS_STATE = 1ull << 34,
+   RADV_CMD_DIRTY_NGGC_VIEWPORT = 1ull << 35,
+   RADV_CMD_DIRTY_NGGC_SETTINGS = 1ull << 36,
+   RADV_CMD_DIRTY_PS_EPILOG_SHADER = 1ull << 37,
+   RADV_CMD_DIRTY_PS_EPILOG_STATE = 1ull << 38,
+   RADV_CMD_DIRTY_GFX12_HIZ_WA_STATE = 1ull << 39,
+   RADV_CMD_DIRTY_ALL = (1ull << 40) - 1,
 
    RADV_CMD_DIRTY_SHADER_QUERY = RADV_CMD_DIRTY_NGG_STATE | RADV_CMD_DIRTY_TASK_STATE,
 };
@@ -343,7 +344,6 @@ struct radv_cmd_state {
    struct radv_graphics_pipeline *graphics_pipeline;
    struct radv_compute_pipeline *compute_pipeline;
    struct radv_ray_tracing_pipeline *rt_pipeline;
-   struct radv_ray_tracing_pipeline *emitted_rt_pipeline;
    struct radv_dynamic_state dynamic;
    struct radv_streamout_state streamout;