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radeonsi/gfx9: add the function signature of merged ES-GS
Reviewed-by: Nicolai Hähnle <nicolai.haehnle@amd.com>
This commit is contained in:
parent
8b220877ad
commit
bcaf905129
2 changed files with 74 additions and 12 deletions
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@ -5778,6 +5778,15 @@ static void declare_vs_input_vgprs(struct si_shader_context *ctx,
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}
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}
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static void declare_tes_input_vgprs(struct si_shader_context *ctx,
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LLVMTypeRef *params, unsigned *num_params)
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{
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params[ctx->param_tes_u = (*num_params)++] = ctx->f32;
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params[ctx->param_tes_v = (*num_params)++] = ctx->f32;
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params[ctx->param_tes_rel_patch_id = (*num_params)++] = ctx->i32;
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params[ctx->param_tes_patch_id = (*num_params)++] = ctx->i32;
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}
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enum {
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/* Convenient merged shader definitions. */
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SI_SHADER_MERGED_VERTEX_TESSCTRL = PIPE_SHADER_TYPES,
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@ -5915,7 +5924,60 @@ static void create_function(struct si_shader_context *ctx)
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break;
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case SI_SHADER_MERGED_VERTEX_OR_TESSEVAL_GEOMETRY:
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assert(!"unimplemented merged ES-GS shader");
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/* Merged stages have 8 system SGPRs at the beginning. */
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params[ctx->param_rw_buffers = num_params++] = /* SPI_SHADER_USER_DATA_ADDR_LO_GS */
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const_array(ctx->v16i8, SI_NUM_RW_BUFFERS);
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params[ctx->param_gs2vs_offset = num_params++] = ctx->i32;
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params[ctx->param_merged_wave_info = num_params++] = ctx->i32;
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params[ctx->param_tcs_offchip_offset = num_params++] = ctx->i32;
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params[ctx->param_merged_scratch_offset = num_params++] = ctx->i32;
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params[num_params++] = ctx->i32; /* unused (SPI_SHADER_PGM_LO/HI_GS << 8) */
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params[num_params++] = ctx->i32; /* unused (SPI_SHADER_PGM_LO/HI_GS >> 24) */
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params[num_params++] = ctx->i32; /* unused */
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params[num_params++] = ctx->i32; /* unused */
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declare_per_stage_desc_pointers(ctx, params, &num_params,
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(ctx->type == PIPE_SHADER_VERTEX ||
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ctx->type == PIPE_SHADER_TESS_EVAL));
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if (ctx->type == PIPE_SHADER_VERTEX) {
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declare_vs_specific_input_sgprs(ctx, params, &num_params);
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} else {
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/* TESS_EVAL (and also GEOMETRY):
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* Declare as many input SGPRs as the VS has. */
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params[ctx->param_tcs_offchip_layout = num_params++] = ctx->i32;
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params[num_params++] = ctx->i32; /* unused */
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params[num_params++] = ctx->i32; /* unused */
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params[num_params++] = ctx->i32; /* unused */
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params[num_params++] = ctx->i32; /* unused */
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params[ctx->param_vs_state_bits = num_params++] = ctx->i32; /* unused */
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}
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declare_per_stage_desc_pointers(ctx, params, &num_params,
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ctx->type == PIPE_SHADER_GEOMETRY);
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last_sgpr = num_params - 1;
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/* VGPRs (first GS, then VS/TES) */
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params[ctx->param_gs_vtx01_offset = num_params++] = ctx->i32;
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params[ctx->param_gs_vtx23_offset = num_params++] = ctx->i32;
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params[ctx->param_gs_prim_id = num_params++] = ctx->i32;
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params[ctx->param_gs_instance_id = num_params++] = ctx->i32;
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params[ctx->param_gs_vtx45_offset = num_params++] = ctx->i32;
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if (ctx->type == PIPE_SHADER_VERTEX) {
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declare_vs_input_vgprs(ctx, params, &num_params,
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&num_prolog_vgprs);
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} else if (ctx->type == PIPE_SHADER_TESS_EVAL) {
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declare_tes_input_vgprs(ctx, params, &num_params);
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}
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if (ctx->type == PIPE_SHADER_VERTEX ||
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ctx->type == PIPE_SHADER_TESS_EVAL) {
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/* ES return values are inputs to GS. */
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for (i = 0; i < 8 + GFX9_GS_NUM_USER_SGPR; i++)
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returns[num_returns++] = ctx->i32; /* SGPRs */
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for (i = 0; i < 5; i++)
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returns[num_returns++] = ctx->f32; /* VGPRs */
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}
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break;
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case PIPE_SHADER_TESS_EVAL:
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@ -5935,10 +5997,7 @@ static void create_function(struct si_shader_context *ctx)
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last_sgpr = num_params - 1;
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/* VGPRs */
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params[ctx->param_tes_u = num_params++] = ctx->f32;
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params[ctx->param_tes_v = num_params++] = ctx->f32;
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params[ctx->param_tes_rel_patch_id = num_params++] = ctx->i32;
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params[ctx->param_tes_patch_id = num_params++] = ctx->i32;
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declare_tes_input_vgprs(ctx, params, &num_params);
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/* PrimitiveID output. */
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if (!shader->key.as_es)
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@ -176,15 +176,18 @@ struct si_shader_context {
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int param_es2gs_offset;
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/* API GS */
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int param_gs2vs_offset;
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int param_gs_wave_id;
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int param_gs_vtx0_offset;
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int param_gs_vtx1_offset;
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int param_gs_wave_id; /* GFX6 */
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int param_gs_vtx0_offset; /* in dwords (GFX6) */
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int param_gs_vtx1_offset; /* in dwords (GFX6) */
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int param_gs_prim_id;
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int param_gs_vtx2_offset;
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int param_gs_vtx3_offset;
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int param_gs_vtx4_offset;
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int param_gs_vtx5_offset;
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int param_gs_vtx2_offset; /* in dwords (GFX6) */
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int param_gs_vtx3_offset; /* in dwords (GFX6) */
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int param_gs_vtx4_offset; /* in dwords (GFX6) */
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int param_gs_vtx5_offset; /* in dwords (GFX6) */
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int param_gs_instance_id;
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int param_gs_vtx01_offset; /* in dwords (GFX9) */
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int param_gs_vtx23_offset; /* in dwords (GFX9) */
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int param_gs_vtx45_offset; /* in dwords (GFX9) */
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LLVMTargetMachineRef tm;
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