diff --git a/include/pci_ids/iris_pci_ids.h b/include/pci_ids/iris_pci_ids.h
index 7c1445afe3b..b73381e6866 100644
--- a/include/pci_ids/iris_pci_ids.h
+++ b/include/pci_ids/iris_pci_ids.h
@@ -184,11 +184,11 @@ CHIPSET(0x46c1, adl_gt2, "ADL GT2", "Intel(R) Graphics")
 CHIPSET(0x46c2, adl_gt2, "ADL GT2", "Intel(R) Graphics")
 CHIPSET(0x46c3, adl_gt2, "ADL GT2", "Intel(R) Graphics")
 
-CHIPSET(0x46d0, adl_n, "ADL-N", "Intel(R) Graphics")
-CHIPSET(0x46d1, adl_n, "ADL-N", "Intel(R) Graphics")
-CHIPSET(0x46d2, adl_n, "ADL-N", "Intel(R) Graphics")
-CHIPSET(0x46d3, adl_n, "ADL-N", "Intel(R) Graphics")
-CHIPSET(0x46d4, adl_n, "ADL-N", "Intel(R) Graphics")
+CHIPSET(0x46d0, adl_gt1,  "ADL-N", "Intel(R) Graphics")
+CHIPSET(0x46d1, adl_gt1,  "ADL-N", "Intel(R) Graphics")
+CHIPSET(0x46d2, adl_gt05, "ADL-N", "Intel(R) Graphics")
+CHIPSET(0x46d3, adl_gt1,  "ADL-N", "Intel(R) Graphics")
+CHIPSET(0x46d4, adl_gt1,  "ADL-N", "Intel(R) Graphics")
 
 CHIPSET(0x9a40, tgl_gt2, "TGL GT2", "Intel(R) Iris(R) Xe Graphics")
 CHIPSET(0x9a49, tgl_gt2, "TGL GT2", "Intel(R) Iris(R) Xe Graphics")
diff --git a/src/intel/dev/intel_device_info.c b/src/intel/dev/intel_device_info.c
index 15870aef2f6..0115f13721a 100644
--- a/src/intel/dev/intel_device_info.c
+++ b/src/intel/dev/intel_device_info.c
@@ -984,12 +984,6 @@ static const struct intel_device_info intel_device_info_adl_gt1 = {
    .platform = INTEL_PLATFORM_ADL,
 };
 
-static const struct intel_device_info intel_device_info_adl_n = {
-   GFX12_GT_CONFIG(1),
-   .platform = INTEL_PLATFORM_ADL,
-   .is_adl_n = true,
-};
-
 static const struct intel_device_info intel_device_info_adl_gt2 = {
    GFX12_GT_CONFIG(2),
    .platform = INTEL_PLATFORM_ADL,
@@ -1858,7 +1852,7 @@ intel_get_device_info_from_fd(int fd, struct intel_device_info *devinfo, int min
       drmFreeDevice(&drmdev);
       return false;
    }
-   
+
    if ((min_ver > 0 && devinfo->ver < min_ver) || (max_ver > 0 && devinfo->ver > max_ver)) {
       drmFreeDevice(&drmdev);
       return false;
diff --git a/src/intel/dev/intel_device_info.h b/src/intel/dev/intel_device_info.h
index f8e13eaece4..a7284ef9910 100644
--- a/src/intel/dev/intel_device_info.h
+++ b/src/intel/dev/intel_device_info.h
@@ -55,9 +55,6 @@ extern "C" {
 #define intel_device_info_is_mtl(devinfo) \
    intel_platform_in_range((devinfo)->platform, MTL)
 
-#define intel_device_info_is_adln(devinfo) \
-   (devinfo->is_adl_n == true)
-
 #define intel_device_info_is_arl(devinfo) \
    intel_platform_in_range((devinfo)->platform, ARL)
 
diff --git a/src/intel/dev/intel_device_info.py b/src/intel/dev/intel_device_info.py
index 75065ae618b..73ae0fb3f79 100644
--- a/src/intel/dev/intel_device_info.py
+++ b/src/intel/dev/intel_device_info.py
@@ -318,8 +318,6 @@ Struct("intel_device_info",
                when TBIMR is enabled, which has been seen to lead to hangs.  To avoid the
                issue we simply pad the push constant payload to be at least 1 register.""")),
 
-        Member("bool", "is_adl_n", comment="We need this for ADL-N specific Wa_14014966230."),
-
         Member("unsigned", "num_slices",
                comment=dedent("""\
                GPU hardware limits