diff --git a/src/gallium/drivers/radeonsi/si_shader.c b/src/gallium/drivers/radeonsi/si_shader.c
index f35df615204..95f83a72e22 100644
--- a/src/gallium/drivers/radeonsi/si_shader.c
+++ b/src/gallium/drivers/radeonsi/si_shader.c
@@ -1017,7 +1017,7 @@ static void si_postprocess_nir(struct si_nir_shader_ctx *ctx)
          .bc_optimize_for_linear = key->ps.part.prolog.bc_optimize_for_linear,
          .uses_discard = shader->info.uses_discard,
          .alpha_to_coverage_via_mrtz = key->ps.part.epilog.alpha_to_coverage_via_mrtz,
-         .dual_src_blend = key->ps.part.epilog.dual_src_blend_swizzle,
+         .dual_src_blend = key->ps.part.epilog.dual_src_blend,
          .spi_shader_col_format = key->ps.part.epilog.spi_shader_col_format,
          .color_is_int8 = key->ps.part.epilog.color_is_int8,
          .color_is_int10 = key->ps.part.epilog.color_is_int10,
diff --git a/src/gallium/drivers/radeonsi/si_shader.h b/src/gallium/drivers/radeonsi/si_shader.h
index 54b8ee8b776..3ca87661eee 100644
--- a/src/gallium/drivers/radeonsi/si_shader.h
+++ b/src/gallium/drivers/radeonsi/si_shader.h
@@ -552,7 +552,7 @@ struct si_ps_epilog_bits {
    unsigned alpha_to_one : 1;
    unsigned alpha_to_coverage_via_mrtz : 1;  /* gfx11+ or alpha_to_one */
    unsigned clamp_color : 1;
-   unsigned dual_src_blend_swizzle : 1;      /* gfx11+ */
+   unsigned dual_src_blend : 1;
    unsigned rbplus_depth_only_opt:1;
    unsigned kill_z:1;
    unsigned kill_stencil:1;
diff --git a/src/gallium/drivers/radeonsi/si_shader_aco.c b/src/gallium/drivers/radeonsi/si_shader_aco.c
index 2fbae1c2751..758a41ad753 100644
--- a/src/gallium/drivers/radeonsi/si_shader_aco.c
+++ b/src/gallium/drivers/radeonsi/si_shader_aco.c
@@ -306,7 +306,7 @@ si_aco_build_ps_epilog(struct aco_compiler_options *options,
       .alpha_to_one = key->ps_epilog.states.alpha_to_one,
       .alpha_to_coverage_via_mrtz = key->ps_epilog.states.alpha_to_coverage_via_mrtz,
       .clamp_color = key->ps_epilog.states.clamp_color,
-      .mrt0_is_dual_src = key->ps_epilog.states.dual_src_blend_swizzle,
+      .mrt0_is_dual_src = key->ps_epilog.states.dual_src_blend,
       /* rbplus_depth_only_opt only affects registers, not the shader */
       .kill_depth = key->ps_epilog.states.kill_z,
       .kill_stencil = key->ps_epilog.states.kill_stencil,
diff --git a/src/gallium/drivers/radeonsi/si_shader_binary.c b/src/gallium/drivers/radeonsi/si_shader_binary.c
index eff38f0da58..1834168a5ef 100644
--- a/src/gallium/drivers/radeonsi/si_shader_binary.c
+++ b/src/gallium/drivers/radeonsi/si_shader_binary.c
@@ -613,7 +613,7 @@ static void si_dump_shader_key(const struct si_shader *shader, FILE *f)
       fprintf(f, "  epilog.alpha_to_one = %u\n", key->ps.part.epilog.alpha_to_one);
       fprintf(f, "  epilog.alpha_to_coverage_via_mrtz = %u\n", key->ps.part.epilog.alpha_to_coverage_via_mrtz);
       fprintf(f, "  epilog.clamp_color = %u\n", key->ps.part.epilog.clamp_color);
-      fprintf(f, "  epilog.dual_src_blend_swizzle = %u\n", key->ps.part.epilog.dual_src_blend_swizzle);
+      fprintf(f, "  epilog.dual_src_blend = %u\n", key->ps.part.epilog.dual_src_blend);
       fprintf(f, "  epilog.rbplus_depth_only_opt = %u\n", key->ps.part.epilog.rbplus_depth_only_opt);
       fprintf(f, "  epilog.kill_z = %u\n", key->ps.part.epilog.kill_z);
       fprintf(f, "  epilog.kill_stencil = %u\n", key->ps.part.epilog.kill_stencil);
diff --git a/src/gallium/drivers/radeonsi/si_shader_llvm_ps.c b/src/gallium/drivers/radeonsi/si_shader_llvm_ps.c
index 8232928223d..b900d8ab157 100644
--- a/src/gallium/drivers/radeonsi/si_shader_llvm_ps.c
+++ b/src/gallium/drivers/radeonsi/si_shader_llvm_ps.c
@@ -176,9 +176,8 @@ static bool si_llvm_init_ps_export_args(struct si_shader_context *ctx, LLVMValue
    /* Specify the target we are exporting */
    args->target = V_008DFC_SQ_EXP_MRT + compacted_mrt_index;
 
-   if (key->ps.part.epilog.dual_src_blend_swizzle &&
+   if (key->ps.part.epilog.dual_src_blend && ctx->ac.gfx_level >= GFX11 &&
        (compacted_mrt_index == 0 || compacted_mrt_index == 1)) {
-      assert(ctx->ac.gfx_level >= GFX11);
       args->target += 21;
    }
 
@@ -786,8 +785,7 @@ void si_llvm_build_ps_epilog(struct si_shader_context *ctx, union si_shader_part
       exp.args[exp.num - 1].valid_mask = 1;  /* whether the EXEC mask is valid */
       exp.args[exp.num - 1].done = 1;        /* DONE bit */
 
-      if (key->ps_epilog.states.dual_src_blend_swizzle) {
-         assert(ctx->ac.gfx_level >= GFX11);
+      if (key->ps_epilog.states.dual_src_blend && ctx->ac.gfx_level >= GFX11) {
          assert((key->ps_epilog.colors_written & 0x3) == 0x3);
          ac_build_dual_src_blend_swizzle(&ctx->ac, &exp.args[first_color_export],
                                          &exp.args[first_color_export + 1]);
diff --git a/src/gallium/drivers/radeonsi/si_state_shaders.cpp b/src/gallium/drivers/radeonsi/si_state_shaders.cpp
index d40d254d49e..97751623155 100644
--- a/src/gallium/drivers/radeonsi/si_state_shaders.cpp
+++ b/src/gallium/drivers/radeonsi/si_state_shaders.cpp
@@ -2669,9 +2669,8 @@ void si_ps_key_update_framebuffer_blend_dsa_rasterizer(struct si_context *sctx)
        sctx->framebuffer.spi_shader_col_format);
    key->ps.part.epilog.spi_shader_col_format &= blend->cb_target_enabled_4bit;
 
-   key->ps.part.epilog.dual_src_blend_swizzle = sctx->gfx_level >= GFX11 &&
-                                                blend->dual_src_blend &&
-                                                (sel->info.colors_written_4bit & 0xff) == 0xff;
+   key->ps.part.epilog.dual_src_blend = sctx->gfx_level >= GFX11 && blend->dual_src_blend &&
+                                        (sel->info.colors_written_4bit & 0xff) == 0xff;
 
    /* The output for dual source blending should have
     * the same format as the first output.