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ir3: support isam with less than 4 components

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This currently doesn't happen yet but we want to support load_image with
lass than 4 components in the future.

Signed-off-by: Job Noorman <jnoorman@igalia.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/39932>
This commit is contained in:
Job Noorman 2026-04-11 14:02:11 +02:00 • committed by Marge Bot
parent bd69573c34
commit bc4edc79dd
1 changed files with 2 additions and 2 deletions
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4
src/freedreno/ir3/ir3_compiler_nir.c
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@ -1794,7 +1794,7 @@ emit_intrinsic_load_image(struct ir3_context *ctx, nir_intrinsic_instr *intr,
coords[i] = src0[i];
}
sam = emit_sam(ctx, OPC_ISAM, info, type, 0b1111,
sam = emit_sam(ctx, OPC_ISAM, info, type, MASK(intr->num_components),
ir3_create_collect(b, coords, ncoords), NULL);
ir3_handle_nonuniform(sam, intr);
@ -1802,7 +1802,7 @@ emit_intrinsic_load_image(struct ir3_context *ctx, nir_intrinsic_instr *intr,
sam->barrier_class = IR3_BARRIER_IMAGE_R;
sam->barrier_conflict = IR3_BARRIER_IMAGE_W;
ir3_split_dest(b, dst, sam, 0, 4);
ir3_split_dest(b, dst, sam, 0, intr->num_components);
if (intr->intrinsic == nir_intrinsic_image_sparse_load ||
intr->intrinsic == nir_intrinsic_bindless_image_sparse_load) {