radeonsi: add back a workaround for DCC MSAA on gfx9 due to conformance issues

Fixes: 8b95f51ef1 - radeonsi: fix and enable full DCC with MSAA 2x on gfx9

Acked-by: Pierre-Eric Pelloux-Prayer <pierre-eric.pelloux-prayer@amd.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/13256>
(cherry picked from commit 86a33569f4)

Conflicts:
	src/gallium/drivers/radeonsi/ci/raven-deqp-fail.csv

CI file does not exist in 21.2, so remove it
This commit is contained in:
Marek Olšák 2021-10-07 17:21:28 -04:00 committed by Dylan Baker
parent 7ecf3b3954
commit bbe8a34f2b
2 changed files with 8 additions and 1 deletions

View file

@ -571,7 +571,7 @@
"description": "radeonsi: add back a workaround for DCC MSAA on gfx9 due to conformance issues",
"nominated": true,
"nomination_type": 1,
"resolution": 0,
"resolution": 1,
"main_sha": null,
"because_sha": "8b95f51ef139b9995da020c19340410340f959db"
},

View file

@ -232,6 +232,13 @@ static int si_init_surface(struct si_screen *sscreen, struct radeon_surf *surfac
break;
case GFX9:
/* DCC MSAA fails this on Raven:
* https://www.khronos.org/registry/webgl/sdk/tests/deqp/functional/gles3/fbomultisample.2_samples.html
* and this on Picasso:
* https://www.khronos.org/registry/webgl/sdk/tests/deqp/functional/gles3/fbomultisample.4_samples.html
*/
if (sscreen->info.family == CHIP_RAVEN && ptex->nr_storage_samples >= 2 && bpe < 4)
flags |= RADEON_SURF_DISABLE_DCC;
break;
case GFX10: