fdo-mirrors/mesa
1
0
Fork 0
mirror of https://gitlab.freedesktop.org/mesa/mesa.git synced 2026-05-07 17:58:26 +02:00
Code Issues Projects Releases Packages Wiki Activity Actions 4

radeonsi: remove constant index limitation v3

Browse source 
With the llvm patches, fixing 14 piglit tests in total.

v2: increase the const limit
v3: document the const limit

Signed-off-by: Christian König <christian.koenig@amd.com>
Reviewed-by: Michel Dänzer <michel.daenzer@amd.com>
(cherry picked from commit 8c80894fb3)
This commit is contained in:
Christian König 2013-02-04 17:55:32 +01:00 • committed by Michel Dänzer
parent f50e4e21f4
commit baa9070346
2 changed files with 1 additions and 7 deletions
Show stats Download patch file Download diff file Expand all files Collapse all files

2
src/gallium/drivers/radeonsi/radeonsi_pipe.c
View file

@ -459,7 +459,7 @@ static int r600_get_shader_param(struct pipe_screen* pscreen, unsigned shader, e
/* FIXME Isn't this equal to TEMPS? */
return 1; /* Max native address registers */
case PIPE_SHADER_CAP_MAX_CONSTS:
return 64;
return 4096; /* actually only memory limits this */
case PIPE_SHADER_CAP_MAX_CONST_BUFFERS:
return 1;
case PIPE_SHADER_CAP_MAX_PREDS:

6
src/gallium/drivers/radeonsi/radeonsi_shader.c
View file

@ -455,12 +455,6 @@ static LLVMValueRef fetch_constant(
* CONST[0].x will have an offset of 0 and CONST[1].x will have an
* offset of 4. */
idx = (reg->Register.Index * 4) + swizzle;
/* index loads above 255 are currently not supported */
if (idx > 255) {
assert(0);
idx = 0;
}
offset = lp_build_const_int32(base->gallivm, idx);
load = build_indexed_load(base->gallivm, const_ptr, offset);