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i965: Move brw_dump_ir() out of brw_*_emit() functions

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We move these calls one level up into the codegen functions.

Reviewed-by: Topi Pohjolainen <topi.pohjolainen@intel.com>
Signed-off-by: Kristian Høgsberg Kristensen <krh@bitplanet.net>
This commit is contained in:
Kristian Høgsberg Kristensen 2015-10-05 13:58:05 -07:00
parent 1fda56cdb2
commit ba71d581ae
7 changed files with 12 additions and 23 deletions
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3
src/mesa/drivers/dri/i965/brw_cs.c
View file

@ -98,6 +98,9 @@ brw_codegen_cs_prog(struct brw_context *brw,
start_time = get_time();
}
if (unlikely(INTEL_DEBUG & DEBUG_CS))
brw_dump_ir("compute", prog, &cs->base, &cp->program.Base);
program = brw_cs_emit(brw, mem_ctx, key, &prog_data,
&cp->program, prog, &program_size);
if (program == NULL) {

13
src/mesa/drivers/dri/i965/brw_fs.cpp
View file

@ -5100,13 +5100,6 @@ brw_wm_fs_emit(struct brw_context *brw,
struct gl_shader_program *prog,
unsigned *final_assembly_size)
{
struct brw_shader *shader = NULL;
if (prog)
shader = (brw_shader *) prog->_LinkedShaders[MESA_SHADER_FRAGMENT];
if (unlikely(INTEL_DEBUG & DEBUG_WM))
brw_dump_ir("fragment", prog, &shader->base, &fp->Base);
int st_index8 = -1, st_index16 = -1;
if (INTEL_DEBUG & DEBUG_SHADER_TIME) {
st_index8 = brw_get_shader_time_index(brw, prog, &fp->Base, ST_FS8);
@ -5224,12 +5217,6 @@ brw_cs_emit(struct brw_context *brw,
struct gl_shader_program *prog,
unsigned *final_assembly_size)
{
struct brw_shader *shader =
(struct brw_shader *) prog->_LinkedShaders[MESA_SHADER_COMPUTE];
if (unlikely(INTEL_DEBUG & DEBUG_CS))
brw_dump_ir("compute", prog, &shader->base, &cp->Base);
prog_data->local_size[0] = cp->LocalSize[0];
prog_data->local_size[1] = cp->LocalSize[1];
prog_data->local_size[2] = cp->LocalSize[2];

3
src/mesa/drivers/dri/i965/brw_gs.c
View file

@ -291,6 +291,9 @@ brw_codegen_gs_prog(struct brw_context *brw,
*/
c.prog_data.base.urb_read_length = (c.input_vue_map.num_slots + 1) / 2;
if (unlikely(INTEL_DEBUG & DEBUG_GS))
brw_dump_ir("geometry", prog, gs, NULL);
void *mem_ctx = ralloc_context(NULL);
unsigned program_size;
const unsigned *program =

7
src/mesa/drivers/dri/i965/brw_vec4.cpp
View file

@ -1947,17 +1947,10 @@ brw_vs_emit(struct brw_context *brw,
{
const unsigned *assembly = NULL;
struct brw_shader *shader = NULL;
if (prog)
shader = (brw_shader *) prog->_LinkedShaders[MESA_SHADER_VERTEX];
int st_index = -1;
if (INTEL_DEBUG & DEBUG_SHADER_TIME)
st_index = brw_get_shader_time_index(brw, prog, &vp->Base, ST_VS);
if (unlikely(INTEL_DEBUG & DEBUG_VS))
brw_dump_ir("vertex", prog, &shader->base, &vp->Base);
if (brw->intelScreen->compiler->scalar_vs) {
prog_data->base.dispatch_mode = DISPATCH_MODE_SIMD8;

3
src/mesa/drivers/dri/i965/brw_vec4_gs_visitor.cpp
View file

@ -622,9 +622,6 @@ brw_gs_emit(struct brw_context *brw,
{
struct gl_shader *shader = prog->_LinkedShaders[MESA_SHADER_GEOMETRY];
if (unlikely(INTEL_DEBUG & DEBUG_GS))
brw_dump_ir("geometry", prog, shader, NULL);
int st_index = -1;
if (INTEL_DEBUG & DEBUG_SHADER_TIME)
st_index = brw_get_shader_time_index(brw, prog, NULL, ST_GS);

3
src/mesa/drivers/dri/i965/brw_vs.c
View file

@ -195,6 +195,9 @@ brw_codegen_vs_prog(struct brw_context *brw,
start_time = get_time();
}
if (unlikely(INTEL_DEBUG & DEBUG_VS))
brw_dump_ir("vertex", prog, &vs->base, &vp->program.Base);
/* Emit GEN4 code.
*/
program = brw_vs_emit(brw, mem_ctx, key, &prog_data,

3
src/mesa/drivers/dri/i965/brw_wm.c
View file

@ -221,6 +221,9 @@ brw_codegen_wm_prog(struct brw_context *brw,
start_time = get_time();
}
if (unlikely(INTEL_DEBUG & DEBUG_WM))
brw_dump_ir("fragment", prog, &fs->base, &fp->program.Base);
program = brw_wm_fs_emit(brw, mem_ctx, key, &prog_data,
&fp->program, prog, &program_size);
if (program == NULL) {