diff --git a/src/intel/compiler/brw_compile_fs.cpp b/src/intel/compiler/brw_compile_fs.cpp index 8581de415df..3514d608d92 100644 --- a/src/intel/compiler/brw_compile_fs.cpp +++ b/src/intel/compiler/brw_compile_fs.cpp @@ -503,7 +503,7 @@ brw_emit_interpolation_setup(fs_visitor &s) const fs_builder ubld = bld.exec_all().group(16, 0); bool loaded_flag = false; - for (int i = 0; i < BRW_BARYCENTRIC_MODE_COUNT; ++i) { + for (int i = 0; i < INTEL_BARYCENTRIC_MODE_COUNT; ++i) { if (!(wm_prog_data->barycentric_interp_modes & BITFIELD_BIT(i))) continue; @@ -514,12 +514,12 @@ brw_emit_interpolation_setup(fs_visitor &s) * requested or not. */ int sample_mode; - if (BITFIELD_BIT(i) & BRW_BARYCENTRIC_NONPERSPECTIVE_BITS) { + if (BITFIELD_BIT(i) & INTEL_BARYCENTRIC_NONPERSPECTIVE_BITS) { sample_mode = util_last_bit(wm_prog_data->barycentric_interp_modes & - BRW_BARYCENTRIC_NONPERSPECTIVE_BITS) - 1; + INTEL_BARYCENTRIC_NONPERSPECTIVE_BITS) - 1; } else { sample_mode = util_last_bit(wm_prog_data->barycentric_interp_modes & - BRW_BARYCENTRIC_PERSPECTIVE_BITS) - 1; + INTEL_BARYCENTRIC_PERSPECTIVE_BITS) - 1; } assert(wm_prog_data->barycentric_interp_modes & BITFIELD_BIT(sample_mode)); @@ -546,14 +546,14 @@ brw_emit_interpolation_setup(fs_visitor &s) } } - for (int i = 0; i < BRW_BARYCENTRIC_MODE_COUNT; ++i) { + for (int i = 0; i < INTEL_BARYCENTRIC_MODE_COUNT; ++i) { s.delta_xy[i] = fetch_barycentric_reg( bld, payload.barycentric_coord_reg[i]); } uint32_t centroid_modes = wm_prog_data->barycentric_interp_modes & - (1 << BRW_BARYCENTRIC_PERSPECTIVE_CENTROID | - 1 << BRW_BARYCENTRIC_NONPERSPECTIVE_CENTROID); + (1 << INTEL_BARYCENTRIC_PERSPECTIVE_CENTROID | + 1 << INTEL_BARYCENTRIC_NONPERSPECTIVE_CENTROID); if (devinfo->needs_unlit_centroid_workaround && centroid_modes) { /* Get the pixel/sample mask into f0 so that we know which @@ -566,7 +566,7 @@ brw_emit_interpolation_setup(fs_visitor &s) retype(brw_vec1_grf(1 + i, 7), BRW_TYPE_UW)); } - for (int i = 0; i < BRW_BARYCENTRIC_MODE_COUNT; ++i) { + for (int i = 0; i < INTEL_BARYCENTRIC_MODE_COUNT; ++i) { if (!(centroid_modes & (1 << i))) continue; @@ -654,12 +654,12 @@ brw_emit_repclear_shader(fs_visitor &s) /** * Turn one of the two CENTROID barycentric modes into PIXEL mode. */ -static enum brw_barycentric_mode -centroid_to_pixel(enum brw_barycentric_mode bary) +static enum intel_barycentric_mode +centroid_to_pixel(enum intel_barycentric_mode bary) { - assert(bary == BRW_BARYCENTRIC_PERSPECTIVE_CENTROID || - bary == BRW_BARYCENTRIC_NONPERSPECTIVE_CENTROID); - return (enum brw_barycentric_mode) ((unsigned) bary - 1); + assert(bary == INTEL_BARYCENTRIC_PERSPECTIVE_CENTROID || + bary == INTEL_BARYCENTRIC_NONPERSPECTIVE_CENTROID); + return (enum intel_barycentric_mode) ((unsigned) bary - 1); } static void @@ -928,11 +928,11 @@ is_used_in_not_interp_frag_coord(nir_def *def) /** * Return a bitfield where bit n is set if barycentric interpolation mode n - * (see enum brw_barycentric_mode) is needed by the fragment shader. + * (see enum intel_barycentric_mode) is needed by the fragment shader. * * We examine the load_barycentric intrinsics rather than looking at input * variables so that we catch interpolateAtCentroid() messages too, which - * also need the BRW_BARYCENTRIC_[NON]PERSPECTIVE_CENTROID mode set up. + * also need the INTEL_BARYCENTRIC_[NON]PERSPECTIVE_CENTROID mode set up. */ static unsigned brw_compute_barycentric_interp_modes(const struct intel_device_info *devinfo, @@ -964,7 +964,7 @@ brw_compute_barycentric_interp_modes(const struct intel_device_info *devinfo, continue; nir_intrinsic_op bary_op = intrin->intrinsic; - enum brw_barycentric_mode bary = + enum intel_barycentric_mode bary = brw_barycentric_mode(key, intrin); barycentric_interp_modes |= 1 << bary; @@ -981,7 +981,7 @@ brw_compute_barycentric_interp_modes(const struct intel_device_info *devinfo, /** * Return a bitfield where bit n is set if barycentric interpolation - * mode n (see enum brw_barycentric_mode) is needed by the fragment + * mode n (see enum intel_barycentric_mode) is needed by the fragment * shader barycentric intrinsics that take an explicit offset or * sample as argument. */ @@ -1135,7 +1135,7 @@ brw_nir_populate_wm_prog_data(nir_shader *shader, */ if (prog_data->persample_dispatch == INTEL_NEVER) { prog_data->barycentric_interp_modes &= - ~BITFIELD_BIT(BRW_BARYCENTRIC_PERSPECTIVE_SAMPLE); + ~BITFIELD_BIT(INTEL_BARYCENTRIC_PERSPECTIVE_SAMPLE); } if (devinfo->ver >= 20) { @@ -1143,16 +1143,16 @@ brw_nir_populate_wm_prog_data(nir_shader *shader, brw_compute_offset_barycentric_interp_modes(key, shader); prog_data->uses_npc_bary_coefficients = - offset_bary_modes & BRW_BARYCENTRIC_NONPERSPECTIVE_BITS; + offset_bary_modes & INTEL_BARYCENTRIC_NONPERSPECTIVE_BITS; prog_data->uses_pc_bary_coefficients = - offset_bary_modes & ~BRW_BARYCENTRIC_NONPERSPECTIVE_BITS; + offset_bary_modes & ~INTEL_BARYCENTRIC_NONPERSPECTIVE_BITS; prog_data->uses_sample_offsets = - offset_bary_modes & ((1 << BRW_BARYCENTRIC_PERSPECTIVE_SAMPLE) | - (1 << BRW_BARYCENTRIC_NONPERSPECTIVE_SAMPLE)); + offset_bary_modes & ((1 << INTEL_BARYCENTRIC_PERSPECTIVE_SAMPLE) | + (1 << INTEL_BARYCENTRIC_NONPERSPECTIVE_SAMPLE)); } prog_data->uses_nonperspective_interp_modes = - (prog_data->barycentric_interp_modes & BRW_BARYCENTRIC_NONPERSPECTIVE_BITS) || + (prog_data->barycentric_interp_modes & INTEL_BARYCENTRIC_NONPERSPECTIVE_BITS) || prog_data->uses_npc_bary_coefficients; /* The current VK_EXT_graphics_pipeline_library specification requires diff --git a/src/intel/compiler/brw_compiler.h b/src/intel/compiler/brw_compiler.h index cfc40de7127..9cb837ac78a 100644 --- a/src/intel/compiler/brw_compiler.h +++ b/src/intel/compiler/brw_compiler.h @@ -583,24 +583,6 @@ brw_stage_prog_data_add_printf(struct brw_stage_prog_data *prog_data, void *mem_ctx, const u_printf_info *print); -enum brw_barycentric_mode { - BRW_BARYCENTRIC_PERSPECTIVE_PIXEL = 0, - BRW_BARYCENTRIC_PERSPECTIVE_CENTROID = 1, - BRW_BARYCENTRIC_PERSPECTIVE_SAMPLE = 2, - BRW_BARYCENTRIC_NONPERSPECTIVE_PIXEL = 3, - BRW_BARYCENTRIC_NONPERSPECTIVE_CENTROID = 4, - BRW_BARYCENTRIC_NONPERSPECTIVE_SAMPLE = 5, - BRW_BARYCENTRIC_MODE_COUNT = 6 -}; -#define BRW_BARYCENTRIC_PERSPECTIVE_BITS \ - ((1 << BRW_BARYCENTRIC_PERSPECTIVE_PIXEL) | \ - (1 << BRW_BARYCENTRIC_PERSPECTIVE_CENTROID) | \ - (1 << BRW_BARYCENTRIC_PERSPECTIVE_SAMPLE)) -#define BRW_BARYCENTRIC_NONPERSPECTIVE_BITS \ - ((1 << BRW_BARYCENTRIC_NONPERSPECTIVE_PIXEL) | \ - (1 << BRW_BARYCENTRIC_NONPERSPECTIVE_CENTROID) | \ - (1 << BRW_BARYCENTRIC_NONPERSPECTIVE_SAMPLE)) - enum brw_pixel_shader_computed_depth_mode { BRW_PSCDEPTH_OFF = 0, /* PS does not compute depth */ BRW_PSCDEPTH_ON = 1, /* PS computes depth; no guarantee about value */ @@ -897,24 +879,24 @@ wm_prog_data_barycentric_modes(const struct brw_wm_prog_data *prog_data, * which one we replace. The important thing is that we keep the number * of barycentrics in each [non]perspective grouping the same. */ - if ((modes & BRW_BARYCENTRIC_PERSPECTIVE_BITS) && - !(modes & BITFIELD_BIT(BRW_BARYCENTRIC_PERSPECTIVE_SAMPLE))) { + if ((modes & INTEL_BARYCENTRIC_PERSPECTIVE_BITS) && + !(modes & BITFIELD_BIT(INTEL_BARYCENTRIC_PERSPECTIVE_SAMPLE))) { int sample_mode = - util_last_bit(modes & BRW_BARYCENTRIC_PERSPECTIVE_BITS) - 1; + util_last_bit(modes & INTEL_BARYCENTRIC_PERSPECTIVE_BITS) - 1; assert(modes & BITFIELD_BIT(sample_mode)); modes &= ~BITFIELD_BIT(sample_mode); - modes |= BITFIELD_BIT(BRW_BARYCENTRIC_PERSPECTIVE_SAMPLE); + modes |= BITFIELD_BIT(INTEL_BARYCENTRIC_PERSPECTIVE_SAMPLE); } - if ((modes & BRW_BARYCENTRIC_NONPERSPECTIVE_BITS) && - !(modes & BITFIELD_BIT(BRW_BARYCENTRIC_NONPERSPECTIVE_SAMPLE))) { + if ((modes & INTEL_BARYCENTRIC_NONPERSPECTIVE_BITS) && + !(modes & BITFIELD_BIT(INTEL_BARYCENTRIC_NONPERSPECTIVE_SAMPLE))) { int sample_mode = - util_last_bit(modes & BRW_BARYCENTRIC_NONPERSPECTIVE_BITS) - 1; + util_last_bit(modes & INTEL_BARYCENTRIC_NONPERSPECTIVE_BITS) - 1; assert(modes & BITFIELD_BIT(sample_mode)); modes &= ~BITFIELD_BIT(sample_mode); - modes |= BITFIELD_BIT(BRW_BARYCENTRIC_NONPERSPECTIVE_SAMPLE); + modes |= BITFIELD_BIT(INTEL_BARYCENTRIC_NONPERSPECTIVE_SAMPLE); } } else { /* If we're not using per-sample interpolation, we need to disable the @@ -926,8 +908,8 @@ wm_prog_data_barycentric_modes(const struct brw_wm_prog_data *prog_data, * "MSDISPMODE_PERSAMPLE is required in order to select Perspective * Sample or Non-perspective Sample barycentric coordinates." */ - uint32_t sample_bits = (BITFIELD_BIT(BRW_BARYCENTRIC_PERSPECTIVE_SAMPLE) | - BITFIELD_BIT(BRW_BARYCENTRIC_NONPERSPECTIVE_SAMPLE)); + uint32_t sample_bits = (BITFIELD_BIT(INTEL_BARYCENTRIC_PERSPECTIVE_SAMPLE) | + BITFIELD_BIT(INTEL_BARYCENTRIC_NONPERSPECTIVE_SAMPLE)); uint32_t requested_sample = modes & sample_bits; modes &= ~sample_bits; /* @@ -949,10 +931,10 @@ wm_prog_data_barycentric_modes(const struct brw_wm_prog_data *prog_data, * barycentric. */ if (requested_sample) { - if (requested_sample & BITFIELD_BIT(BRW_BARYCENTRIC_PERSPECTIVE_SAMPLE)) - modes |= BITFIELD_BIT(BRW_BARYCENTRIC_PERSPECTIVE_PIXEL); - if (requested_sample & BITFIELD_BIT(BRW_BARYCENTRIC_NONPERSPECTIVE_SAMPLE)) - modes |= BITFIELD_BIT(BRW_BARYCENTRIC_NONPERSPECTIVE_PIXEL); + if (requested_sample & BITFIELD_BIT(INTEL_BARYCENTRIC_PERSPECTIVE_SAMPLE)) + modes |= BITFIELD_BIT(INTEL_BARYCENTRIC_PERSPECTIVE_PIXEL); + if (requested_sample & BITFIELD_BIT(INTEL_BARYCENTRIC_NONPERSPECTIVE_SAMPLE)) + modes |= BITFIELD_BIT(INTEL_BARYCENTRIC_NONPERSPECTIVE_PIXEL); } } diff --git a/src/intel/compiler/brw_fs.cpp b/src/intel/compiler/brw_fs.cpp index 671afc9404e..8567fcf8bf3 100644 --- a/src/intel/compiler/brw_fs.cpp +++ b/src/intel/compiler/brw_fs.cpp @@ -845,7 +845,7 @@ fs_visitor::import_uniforms(fs_visitor *v) this->uniforms = v->uniforms; } -enum brw_barycentric_mode +enum intel_barycentric_mode brw_barycentric_mode(const struct brw_wm_prog_key *key, nir_intrinsic_instr *intr) { @@ -864,15 +864,15 @@ brw_barycentric_mode(const struct brw_wm_prog_key *key, * payload is not affected. */ bary = key->persample_interp == INTEL_SOMETIMES ? - BRW_BARYCENTRIC_PERSPECTIVE_SAMPLE : - BRW_BARYCENTRIC_PERSPECTIVE_PIXEL; + INTEL_BARYCENTRIC_PERSPECTIVE_SAMPLE : + INTEL_BARYCENTRIC_PERSPECTIVE_PIXEL; break; case nir_intrinsic_load_barycentric_centroid: - bary = BRW_BARYCENTRIC_PERSPECTIVE_CENTROID; + bary = INTEL_BARYCENTRIC_PERSPECTIVE_CENTROID; break; case nir_intrinsic_load_barycentric_sample: case nir_intrinsic_load_barycentric_at_sample: - bary = BRW_BARYCENTRIC_PERSPECTIVE_SAMPLE; + bary = INTEL_BARYCENTRIC_PERSPECTIVE_SAMPLE; break; default: unreachable("invalid intrinsic"); @@ -881,7 +881,7 @@ brw_barycentric_mode(const struct brw_wm_prog_key *key, if (mode == INTERP_MODE_NOPERSPECTIVE) bary += 3; - return (enum brw_barycentric_mode) bary; + return (enum intel_barycentric_mode) bary; } /** diff --git a/src/intel/compiler/brw_fs.h b/src/intel/compiler/brw_fs.h index 0aaca3cfa29..b03e09ec366 100644 --- a/src/intel/compiler/brw_fs.h +++ b/src/intel/compiler/brw_fs.h @@ -206,7 +206,7 @@ struct fs_thread_payload : public thread_payload { uint8_t dest_depth_reg[2]; uint8_t sample_pos_reg[2]; uint8_t sample_mask_in_reg[2]; - uint8_t barycentric_coord_reg[BRW_BARYCENTRIC_MODE_COUNT][2]; + uint8_t barycentric_coord_reg[INTEL_BARYCENTRIC_MODE_COUNT][2]; uint8_t depth_w_coef_reg; uint8_t pc_bary_coef_reg; @@ -442,7 +442,7 @@ public: brw_reg pixel_z; brw_reg wpos_w; brw_reg pixel_w; - brw_reg delta_xy[BRW_BARYCENTRIC_MODE_COUNT]; + brw_reg delta_xy[INTEL_BARYCENTRIC_MODE_COUNT]; brw_reg final_gs_vertex_count; brw_reg control_data_bits; brw_reg invocation_id; @@ -592,8 +592,8 @@ void shuffle_from_32bit_read(const brw::fs_builder &bld, uint32_t first_component, uint32_t components); -enum brw_barycentric_mode brw_barycentric_mode(const struct brw_wm_prog_key *key, - nir_intrinsic_instr *intr); +enum intel_barycentric_mode brw_barycentric_mode(const struct brw_wm_prog_key *key, + nir_intrinsic_instr *intr); uint32_t brw_fb_write_msg_control(const fs_inst *inst, const struct brw_wm_prog_data *prog_data); diff --git a/src/intel/compiler/brw_fs_nir.cpp b/src/intel/compiler/brw_fs_nir.cpp index 8dfb894092a..8fd21722c30 100644 --- a/src/intel/compiler/brw_fs_nir.cpp +++ b/src/intel/compiler/brw_fs_nir.cpp @@ -4347,7 +4347,7 @@ fs_nir_emit_fs_intrinsic(nir_to_brw_state &ntb, case nir_intrinsic_load_barycentric_centroid: case nir_intrinsic_load_barycentric_sample: { /* Use the delta_xy values computed from the payload */ - enum brw_barycentric_mode bary = brw_barycentric_mode( + enum intel_barycentric_mode bary = brw_barycentric_mode( reinterpret_cast(s.key), instr); const brw_reg srcs[] = { offset(s.delta_xy[bary], bld, 0), offset(s.delta_xy[bary], bld, 1) }; @@ -4455,7 +4455,7 @@ fs_nir_emit_fs_intrinsic(nir_to_brw_state &ntb, dst_xy = retype(get_nir_src(ntb, instr->src[0]), BRW_TYPE_F); } else { /* Use the delta_xy values computed from the payload */ - enum brw_barycentric_mode bary = brw_barycentric_mode( + enum intel_barycentric_mode bary = brw_barycentric_mode( reinterpret_cast(s.key), bary_intrinsic); dst_xy = s.delta_xy[bary]; } diff --git a/src/intel/compiler/brw_fs_thread_payload.cpp b/src/intel/compiler/brw_fs_thread_payload.cpp index 9dd191b27a7..d83f298cb6e 100644 --- a/src/intel/compiler/brw_fs_thread_payload.cpp +++ b/src/intel/compiler/brw_fs_thread_payload.cpp @@ -173,12 +173,12 @@ setup_fs_payload_gfx20(fs_thread_payload &payload, for (unsigned j = 0; j < v.dispatch_width / payload_width; j++) { /* R2-13: Barycentric interpolation coordinates. These appear - * in the same order that they appear in the brw_barycentric_mode + * in the same order that they appear in the intel_barycentric_mode * enum. Each set of coordinates occupies 2 64B registers per * SIMD16 half. Coordinates only appear if they were enabled * using the "Barycentric Interpolation Mode" bits in WM_STATE. */ - for (int i = 0; i < BRW_BARYCENTRIC_MODE_COUNT; ++i) { + for (int i = 0; i < INTEL_BARYCENTRIC_MODE_COUNT; ++i) { if (prog_data->barycentric_interp_modes & (1 << i)) { payload.barycentric_coord_reg[i][j] = payload.num_regs; payload.num_regs += payload_width / 4; @@ -267,13 +267,13 @@ setup_fs_payload_gfx9(fs_thread_payload &payload, for (unsigned j = 0; j < v.dispatch_width / payload_width; j++) { /* R3-26: barycentric interpolation coordinates. These appear in the - * same order that they appear in the brw_barycentric_mode enum. Each + * same order that they appear in the intel_barycentric_mode enum. Each * set of coordinates occupies 2 registers if dispatch width == 8 and 4 * registers if dispatch width == 16. Coordinates only appear if they * were enabled using the "Barycentric Interpolation Mode" bits in * WM_STATE. */ - for (int i = 0; i < BRW_BARYCENTRIC_MODE_COUNT; ++i) { + for (int i = 0; i < INTEL_BARYCENTRIC_MODE_COUNT; ++i) { if (prog_data->barycentric_interp_modes & (1 << i)) { payload.barycentric_coord_reg[i][j] = payload.num_regs; payload.num_regs += payload_width / 4; diff --git a/src/intel/compiler/intel_shader_enums.h b/src/intel/compiler/intel_shader_enums.h index ce324dbfea3..0ea558879f2 100644 --- a/src/intel/compiler/intel_shader_enums.h +++ b/src/intel/compiler/intel_shader_enums.h @@ -102,6 +102,25 @@ enum intel_shader_dispatch_mode { INTEL_DISPATCH_MODE_TCS_MULTI_PATCH = 2, }; +enum intel_barycentric_mode { + INTEL_BARYCENTRIC_PERSPECTIVE_PIXEL = 0, + INTEL_BARYCENTRIC_PERSPECTIVE_CENTROID = 1, + INTEL_BARYCENTRIC_PERSPECTIVE_SAMPLE = 2, + INTEL_BARYCENTRIC_NONPERSPECTIVE_PIXEL = 3, + INTEL_BARYCENTRIC_NONPERSPECTIVE_CENTROID = 4, + INTEL_BARYCENTRIC_NONPERSPECTIVE_SAMPLE = 5, + INTEL_BARYCENTRIC_MODE_COUNT = 6 +}; +#define INTEL_BARYCENTRIC_PERSPECTIVE_BITS \ + ((1 << INTEL_BARYCENTRIC_PERSPECTIVE_PIXEL) | \ + (1 << INTEL_BARYCENTRIC_PERSPECTIVE_CENTROID) | \ + (1 << INTEL_BARYCENTRIC_PERSPECTIVE_SAMPLE)) +#define INTEL_BARYCENTRIC_NONPERSPECTIVE_BITS \ + ((1 << INTEL_BARYCENTRIC_NONPERSPECTIVE_PIXEL) | \ + (1 << INTEL_BARYCENTRIC_NONPERSPECTIVE_CENTROID) | \ + (1 << INTEL_BARYCENTRIC_NONPERSPECTIVE_SAMPLE)) + + /** * Data structure recording the relationship between the gl_varying_slot enum * and "slots" within the vertex URB entry (VUE). A "slot" is defined as a