From b9de7da421d2dde4e473c50cc9293e693836d7f7 Mon Sep 17 00:00:00 2001 From: Danylo Piliaiev Date: Tue, 4 Jul 2023 18:07:43 +0200 Subject: [PATCH] tu: Add missing dbg reg stomping to tu_CmdBeginRendering Also we shouldn't stomp PC_DRAW_INDX_BASE - we never use it and stomping it together with some other reg leads to a fault. Signed-off-by: Danylo Piliaiev Part-of: --- src/freedreno/common/freedreno_stompable_regs.h | 2 +- src/freedreno/vulkan/tu_cmd_buffer.cc | 4 ++++ 2 files changed, 5 insertions(+), 1 deletion(-) diff --git a/src/freedreno/common/freedreno_stompable_regs.h b/src/freedreno/common/freedreno_stompable_regs.h index f0ddd03b025..77dcca69bf1 100644 --- a/src/freedreno/common/freedreno_stompable_regs.h +++ b/src/freedreno/common/freedreno_stompable_regs.h @@ -59,7 +59,7 @@ static const struct fd_stompable_reg_range {REG_A6XX_PC_TESS_NUM_VERTEX, REG_A6XX_PC_DGEN_SU_CONSERVATIVE_RAS_CNTL}, {REG_A6XX_PC_POLYGON_MODE, REG_A6XX_PC_RASTER_CNTL}, {REG_A6XX_PC_PRIMITIVE_CNTL_0, REG_A6XX_PC_MULTIVIEW_MASK}, - {REG_A6XX_PC_DRAW_INDX_BASE, REG_A6XX_PC_TESSFACTOR_ADDR}, + {REG_A6XX_PC_TESSFACTOR_ADDR, REG_A6XX_PC_TESSFACTOR_ADDR}, {REG_A6XX_PC_VSTREAM_CONTROL, REG_A6XX_PC_BIN_DRAW_STRM}, {REG_A6XX_PC_VISIBILITY_OVERRIDE, REG_A6XX_PC_VISIBILITY_OVERRIDE}, {REG_A6XX_VFD_CONTROL_0, REG_A6XX_VFD_DEST_CNTL(31)}, diff --git a/src/freedreno/vulkan/tu_cmd_buffer.cc b/src/freedreno/vulkan/tu_cmd_buffer.cc index 217bb50028f..a9e0d77c844 100644 --- a/src/freedreno/vulkan/tu_cmd_buffer.cc +++ b/src/freedreno/vulkan/tu_cmd_buffer.cc @@ -3800,6 +3800,10 @@ tu_CmdBeginRendering(VkCommandBuffer commandBuffer, cmd->state.suspending = suspending; cmd->state.resuming = resuming; + if (!resuming && cmd->device->dbg_renderpass_stomp_cs) { + tu_cs_emit_call(&cmd->cs, cmd->device->dbg_renderpass_stomp_cs); + } + /* We can't track LRZ across command buffer boundaries, so we have to * disable LRZ when resuming/suspending unless we can track on the GPU. */