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radv: Use an ordered dispatch for BVH encoding

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Reviewed-by: Bas Nieuwenhuizen <bas@basnieuwenhuizen.nl>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/21071>
This commit is contained in:
Konstantin Seurer 2023-02-02 16:00:44 +01:00 • committed by Marge Bot
parent 22a028ea99
commit b9d7306edc
1 changed files with 9 additions and 4 deletions
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13
src/amd/vulkan/radv_acceleration_structure.c
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@ -953,10 +953,15 @@ encode_nodes(VkCommandBuffer commandBuffer, uint32_t infoCount,
radv_CmdPushConstants(commandBuffer,
cmd_buffer->device->meta_state.accel_struct_build.encode_p_layout,
VK_SHADER_STAGE_COMPUTE_BIT, 0, sizeof(args), &args);
radv_indirect_unaligned_dispatch(cmd_buffer, NULL,
pInfos[i].scratchData.deviceAddress +
bvh_states[i].scratch.header_offset +
offsetof(struct radv_ir_header, ir_internal_node_count));
struct radv_dispatch_info dispatch = {
.unaligned = true,
.ordered = true,
.va = pInfos[i].scratchData.deviceAddress + bvh_states[i].scratch.header_offset +
offsetof(struct radv_ir_header, ir_internal_node_count),
};
radv_compute_dispatch(cmd_buffer, &dispatch);
}
/* This is the final access to the leaf nodes, no need to flush */
}