From b971b42b149b9cfa33622c2250a1c5bda728ce42 Mon Sep 17 00:00:00 2001 From: Bas Nieuwenhuizen Date: Fri, 14 Aug 2020 00:58:06 +0200 Subject: [PATCH] radv,radeonsi: Disable compression on interop depth images MIME-Version: 1.0 Content-Type: text/plain; charset=UTF-8 Content-Transfer-Encoding: 8bit If we want to use HTILE correctly we need to communicate extra stuff like clear colors. (Unlike DCC there is no HTILE FCE) CC: mesa-stable Reviewed-by: Marek Olšák (cherry picked from commit d78df70c2a85fd846d40b71b9e213122347bea1b) Part-of: --- .pick_status.json | 2 +- src/amd/vulkan/radv_image.c | 1 + src/gallium/drivers/radeonsi/si_texture.c | 3 ++- 3 files changed, 4 insertions(+), 2 deletions(-) diff --git a/.pick_status.json b/.pick_status.json index 4d8b5ce3666..60ef7e5a3a8 100644 --- a/.pick_status.json +++ b/.pick_status.json @@ -4243,7 +4243,7 @@ "description": "radv,radeonsi: Disable compression on interop depth images", "nominated": true, "nomination_type": 0, - "resolution": 0, + "resolution": 3, "master_sha": null, "because_sha": null }, diff --git a/src/amd/vulkan/radv_image.c b/src/amd/vulkan/radv_image.c index 2bd152b964c..e2204c4add0 100644 --- a/src/amd/vulkan/radv_image.c +++ b/src/amd/vulkan/radv_image.c @@ -261,6 +261,7 @@ static inline bool radv_use_htile_for_image(const struct radv_image *image) { return image->info.levels == 1 && + !image->shareable && image->info.width * image->info.height >= 8 * 8; } diff --git a/src/gallium/drivers/radeonsi/si_texture.c b/src/gallium/drivers/radeonsi/si_texture.c index 01439114241..ad8196ba40d 100644 --- a/src/gallium/drivers/radeonsi/si_texture.c +++ b/src/gallium/drivers/radeonsi/si_texture.c @@ -237,7 +237,8 @@ static int si_init_surface(struct si_screen *sscreen, struct radeon_surf *surfac if (!is_flushed_depth && is_depth) { flags |= RADEON_SURF_ZBUFFER; - if (sscreen->debug_flags & DBG(NO_HYPERZ)) { + if ((sscreen->debug_flags & DBG(NO_HYPERZ)) || + (ptex->bind & PIPE_BIND_SHARED) || is_imported) { flags |= RADEON_SURF_NO_HTILE; } else if (tc_compatible_htile && (sscreen->info.chip_class >= GFX9 || array_mode == RADEON_SURF_MODE_2D)) {