From b8799a499e5cd9d97e7efd720548d59a8a33e4f8 Mon Sep 17 00:00:00 2001
From: Kenneth Graunke <kenneth@whitecape.org>
Date: Wed, 13 Apr 2022 22:59:12 -0700
Subject: [PATCH] iris: Add FLUSH_HDC to PIPE_CONTROL_CACHE_FLUSH_BITS

This is considered a bottom-of-pipe flush bit.

Fixes: a969ad1ddfd ("iris: Demote DC flush to HDC flush in cache tracker")
Reviewed-by: Francisco Jerez <currojerez@riseup.net>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/16565>
---
 src/gallium/drivers/iris/iris_context.h | 1 +
 1 file changed, 1 insertion(+)

diff --git a/src/gallium/drivers/iris/iris_context.h b/src/gallium/drivers/iris/iris_context.h
index 648c27411dc..05bbd177488 100644
--- a/src/gallium/drivers/iris/iris_context.h
+++ b/src/gallium/drivers/iris/iris_context.h
@@ -350,6 +350,7 @@ enum pipe_control_flags
    (PIPE_CONTROL_DEPTH_CACHE_FLUSH |  \
     PIPE_CONTROL_DATA_CACHE_FLUSH |   \
     PIPE_CONTROL_TILE_CACHE_FLUSH |   \
+    PIPE_CONTROL_FLUSH_HDC | \
     PIPE_CONTROL_RENDER_TARGET_FLUSH)
 
 #define PIPE_CONTROL_CACHE_INVALIDATE_BITS  \