diff --git a/src/intel/isl/isl.c b/src/intel/isl/isl.c index c47abdcbf64..5a4f9d257b1 100644 --- a/src/intel/isl/isl.c +++ b/src/intel/isl/isl.c @@ -313,16 +313,26 @@ isl_device_init(struct isl_device *dev, dev->ds.hiz_offset = 0; } - if (ISL_GFX_VER(dev) >= 7) { - /* From the IVB PRM, SURFACE_STATE::Height, - * - * For typed buffer and structured buffer surfaces, the number - * of entries in the buffer ranges from 1 to 2^27. For raw buffer - * surfaces, the number of entries in the buffer is the number of bytes - * which can range from 1 to 2^30. - * - * This limit is only concerned with raw buffers. - */ + /* From the IVB PRM, SURFACE_STATE::Height, + * + * For typed buffer and structured buffer surfaces, the number + * of entries in the buffer ranges from 1 to 2^27. For raw buffer + * surfaces, the number of entries in the buffer is the number of bytes + * which can range from 1 to 2^30. + * + * From the SKL PRM, SURFACE_STATE::Width/Height/Depth for RAW buffers, + * + * Width : bits [6:0] + * Height : bits [20:7] + * Depth : bits [31:21] + * + * So we can address 4Gb + * + * This limit is only concerned with raw buffers. + */ + if (ISL_GFX_VER(dev) >= 9) { + dev->max_buffer_size = 1ull << 32; + } else if (ISL_GFX_VER(dev) >= 7) { dev->max_buffer_size = 1ull << 30; } else { dev->max_buffer_size = 1ull << 27; diff --git a/src/intel/isl/isl_surface_state.c b/src/intel/isl/isl_surface_state.c index 4de64920a08..221e759e0f2 100644 --- a/src/intel/isl/isl_surface_state.c +++ b/src/intel/isl/isl_surface_state.c @@ -927,7 +927,11 @@ isl_genX(buffer_fill_state_s)(const struct isl_device *dev, void *state, #endif #endif -#if GFX_VER >= 7 +#if GFX_VER >= 9 + s.Height = ((num_elements - 1) >> 7) & 0x3fff; + s.Width = (num_elements - 1) & 0x7f; + s.Depth = ((num_elements - 1) >> 21) & 0x7ff; +#elif GFX_VER >= 7 s.Height = ((num_elements - 1) >> 7) & 0x3fff; s.Width = (num_elements - 1) & 0x7f; s.Depth = ((num_elements - 1) >> 21) & 0x3ff;