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ir3: Consider dst type in ubo_vec4 to ldc lowering

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The dst type could be either 16b or 32b.

Fixes validation failure in dEQP-VK.subgroups.* tests which deal with
16b types.

 validation fail: (type_size(instr->cat6.type) <= 16) == !!((instr->dsts[0])->flags & IR3_REG_HALF)
   -> for instruction: MESA: info: 0023:0000:000:        ldc.offset0.base0 hssa_23 (wrmask=0x3), ssa_1, ssa_22

Signed-off-by: Danylo Piliaiev <dpiliaiev@igalia.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/21316>
This commit is contained in:
Danylo Piliaiev 2023-02-14 19:24:59 +01:00 • committed by Marge Bot
parent e089166776
commit b7ab83d59f
1 changed files with 1 additions and 1 deletions
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2
src/freedreno/ir3/ir3_compiler_nir.c
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@ -881,7 +881,7 @@ emit_intrinsic_load_ubo_ldc(struct ir3_context *ctx, nir_intrinsic_instr *intr,
ldc->dsts[0]->wrmask = MASK(ncomp);
ldc->cat6.iim_val = ncomp;
ldc->cat6.d = nir_intrinsic_component(intr);
ldc->cat6.type = TYPE_U32;
ldc->cat6.type = utype_dst(intr->dest);
ir3_handle_bindless_cat6(ldc, intr->src[0]);
if (ldc->flags & IR3_INSTR_B)