fdo-mirrors/mesa
1
0
Fork 0
mirror of https://gitlab.freedesktop.org/mesa/mesa.git synced 2025-12-27 23:30:10 +01:00
Code Issues Projects Releases Packages Wiki Activity Actions 1

aco: add and use RegClass::get() helper

Browse source 
Eventually, we'll probably want to replace the current
RegClass(type, size) constructor with this.

This has a functional change in that get_reg_class() now creates v1/v2
instead of v4b/v8b.

Signed-off-by: Rhys Perry <pendingchaos02@gmail.com>
Reviewed-by: Daniel Schürmann <daniel@schuermann.dev>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4639>
This commit is contained in:
Rhys Perry 2020-04-14 20:32:39 +01:00 • committed by Marge Bot
parent 69b92db131
commit b77d638e1b
2 changed files with 12 additions and 14 deletions
Show stats Download patch file Download diff file Expand all files Collapse all files

17
src/amd/compiler/aco_instruction_selection_setup.cpp
View file

@ -226,21 +226,10 @@ sanitize_cf_list(nir_function_impl *impl, bool *divergent, struct exec_list *cf_
RegClass get_reg_class(isel_context *ctx, RegType type, unsigned components, unsigned bitsize)
{
switch (bitsize) {
case 1:
if (bitsize == 1)
return RegClass(RegType::sgpr, ctx->program->lane_mask.size() * components);
case 8:
return type == RegType::sgpr ? s1 : RegClass(type, components).as_subdword();
case 16:
return type == RegType::sgpr ? RegClass(type, DIV_ROUND_UP(components, 2)) :
RegClass(type, 2 * components).as_subdword();
case 32:
return RegClass(type, components);
case 64:
return RegClass(type, components * 2);
default:
unreachable("Unsupported bit size");
}
else
return RegClass::get(type, components * bitsize / 8u);
}
void init_context(isel_context *ctx, nir_shader *shader)

9
src/amd/compiler/aco_ir.h
View file

@ -230,6 +230,15 @@ struct RegClass {
constexpr RegClass as_linear() const { return RegClass((RC) (rc | (1 << 6))); }
constexpr RegClass as_subdword() const { return RegClass((RC) (rc | 1 << 7)); }
static constexpr RegClass get(RegType type, unsigned bytes) {
if (type == RegType::sgpr) {
return RegClass(type, DIV_ROUND_UP(bytes, 4u));
} else {
return bytes % 4u ? RegClass(type, bytes).as_subdword() :
RegClass(type, bytes / 4u);
}
}
private:
RC rc;
};