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radeonsi/vcn: Support H264 encode pic_order_cnt_type 1

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Reviewed-by: Benjamin Cheng <benjamin.cheng@amd.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/38052>
This commit is contained in:
David Rosca 2025-10-24 14:07:01 +02:00 • committed by Marge Bot
parent 8c2de21090
commit b6a00adb41
1 changed files with 12 additions and 1 deletions
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13
src/gallium/drivers/radeonsi/radeon_vcn_enc_1_2.c
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@ -208,8 +208,16 @@ unsigned int radeon_enc_write_sps(struct radeon_encoder *enc, uint8_t nal_byte,
radeon_bs_code_ue(&bs, sps->log2_max_frame_num_minus4);
radeon_bs_code_ue(&bs, sps->pic_order_cnt_type);
if (sps->pic_order_cnt_type == 0)
if (sps->pic_order_cnt_type == 0) {
radeon_bs_code_ue(&bs, sps->log2_max_pic_order_cnt_lsb_minus4);
} else if (sps->pic_order_cnt_type == 1) {
radeon_bs_code_fixed_bits(&bs, sps->delta_pic_order_always_zero_flag, 1);
radeon_bs_code_se(&bs, sps->offset_for_non_ref_pic);
radeon_bs_code_se(&bs, sps->offset_for_top_to_bottom_field);
radeon_bs_code_ue(&bs, sps->num_ref_frames_in_pic_order_cnt_cycle);
for (unsigned i = 0; i < sps->num_ref_frames_in_pic_order_cnt_cycle; i++)
radeon_bs_code_se(&bs, sps->offset_for_ref_frame[i]);
}
radeon_bs_code_ue(&bs, sps->max_num_ref_frames);
radeon_bs_code_fixed_bits(&bs, sps->gaps_in_frame_num_value_allowed_flag, 1);
@ -626,6 +634,9 @@ static void radeon_enc_slice_header(struct radeon_encoder *enc)
if (sps->pic_order_cnt_type == 0)
radeon_bs_code_fixed_bits(&bs, slice->pic_order_cnt_lsb, sps->log2_max_pic_order_cnt_lsb_minus4 + 4);
if (sps->pic_order_cnt_type == 1 && !sps->delta_pic_order_always_zero_flag)
radeon_bs_code_se(&bs, slice->delta_pic_order_cnt0);
if (pps->redundant_pic_cnt_present_flag)
radeon_bs_code_ue(&bs, slice->redundant_pic_cnt);