fdo-mirrors/mesa
1
0
Fork 0
mirror of https://gitlab.freedesktop.org/mesa/mesa.git synced 2026-05-08 15:38:09 +02:00
Code Issues Projects Releases Packages Wiki Activity Actions 1

blorp: Properly handle Z24X8 blits.

Browse source 
One of the reasons we didn't notice that R24_UNORM_X8_TYPELESS
destinations were broken was that an earlier layer was swapping it
out for B8G8R8A8_UNORM.  That made Z24X8 -> Z24X8 blits work.

However, R32_FLOAT -> R24_UNORM_X8_TYPELESS was still totally broken.
The old code only considered one format at a time, without thinking
that format conversion may need to occur.

This patch moves the translation out to a place where it can consider
both formats.  If both are Z24X8, we continue using B8G8R8A8_UNORM to
avoid having to do shader math workarounds.  If we have a Z24X8
destination, but a non-matching source, we use our shader hacks to
actually render to it properly.

Fixes: 804856fa57 (intel/blorp: Handle more exotic destination formats)
Reviewed-by: Jason Ekstrand <jason@jlekstrand.net>
(cherry picked from commit de57926dc9)
This commit is contained in:
Kenneth Graunke 2018-08-09 23:28:24 -07:00 • committed by Andres Gomez
parent f7e8bc0f23
commit b696ab172c
2 changed files with 11 additions and 12 deletions
Show stats Download patch file Download diff file Expand all files Collapse all files

12
src/intel/blorp/blorp.c
View file

@ -75,18 +75,6 @@ brw_blorp_surface_info_init(struct blorp_context *blorp,
if (format == ISL_FORMAT_UNSUPPORTED)
format = surf->surf->format;
if (format == ISL_FORMAT_R24_UNORM_X8_TYPELESS) {
/* Unfortunately, ISL_FORMAT_R24_UNORM_X8_TYPELESS it isn't supported as
* a render target, which would prevent us from blitting to 24-bit
* depth. The miptree consists of 32 bits per pixel, arranged as 24-bit
* depth values interleaved with 8 "don't care" bits. Since depth
* values don't require any blending, it doesn't matter how we interpret
* the bit pattern as long as we copy the right amount of data, so just
* map it as 8-bit BGRA.
*/
format = ISL_FORMAT_B8G8R8A8_UNORM;
}
info->surf = *surf->surf;
info->addr = surf->addr;

11
src/intel/blorp/blorp_blit.c
View file

@ -2250,6 +2250,17 @@ blorp_blit(struct blorp_batch *batch,
}
}
/* ISL_FORMAT_R24_UNORM_X8_TYPELESS it isn't supported as a render target,
* which requires shader math to render to it. Blitting Z24X8 to Z24X8
* is fairly common though, so we'd like to avoid it. Since we don't need
* to blend depth values, we can simply pick a renderable format with the
* right number of bits-per-pixel, like 8-bit BGRA.
*/
if (dst_surf->surf->format == ISL_FORMAT_R24_UNORM_X8_TYPELESS &&
src_surf->surf->format == ISL_FORMAT_R24_UNORM_X8_TYPELESS) {
src_format = dst_format = ISL_FORMAT_B8G8R8A8_UNORM;
}
brw_blorp_surface_info_init(batch->blorp, &params.src, src_surf, src_level,
src_layer, src_format, false);
brw_blorp_surface_info_init(batch->blorp, &params.dst, dst_surf, dst_level,