nir: Remove IB address and stride intrinsics.

RADV used these to emulate firstTask for NV_mesh_shader.
They are no longer needed.

Signed-off-by: Timur Kristóf <timur.kristof@gmail.com>
Reviewed-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/22139>
This commit is contained in:
Timur Kristóf 2023-03-28 01:35:08 +02:00 committed by Marge Bot
parent b0cae2fafe
commit b688a6d227
3 changed files with 0 additions and 11 deletions

View file

@ -272,12 +272,6 @@ lower_abi_instr(nir_builder *b, nir_instr *instr, void *state)
case nir_intrinsic_load_task_ring_entry_amd:
replacement = ac_nir_load_arg(b, &s->args->ac, s->args->ac.task_ring_entry);
break;
case nir_intrinsic_load_task_ib_addr:
replacement = nir_imm_zero(b, intrin->dest.ssa.num_components, intrin->dest.ssa.bit_size);
break;
case nir_intrinsic_load_task_ib_stride:
replacement = nir_imm_zero(b, intrin->dest.ssa.num_components, intrin->dest.ssa.bit_size);
break;
case nir_intrinsic_load_lshs_vertex_stride_amd: {
unsigned io_num = stage == MESA_SHADER_VERTEX ?
s->info->vs.num_linked_outputs :

View file

@ -162,8 +162,6 @@ visit_intrinsic(nir_shader *shader, nir_intrinsic_instr *instr)
case nir_intrinsic_load_streamout_write_index_amd:
case nir_intrinsic_load_streamout_offset_amd:
case nir_intrinsic_load_task_ring_entry_amd:
case nir_intrinsic_load_task_ib_addr:
case nir_intrinsic_load_task_ib_stride:
case nir_intrinsic_load_ring_attr_amd:
case nir_intrinsic_load_ring_attr_offset_amd:
case nir_intrinsic_load_sample_positions_pan:

View file

@ -1394,9 +1394,6 @@ system_value("ring_mesh_scratch_amd", 4)
system_value("ring_mesh_scratch_offset_amd", 1)
# Pointer into the draw and payload rings
system_value("task_ring_entry_amd", 1)
# Pointer into the draw and payload rings
system_value("task_ib_addr", 2)
system_value("task_ib_stride", 1)
# Descriptor where NGG attributes are stored on GFX11.
system_value("ring_attr_amd", 4)
system_value("ring_attr_offset_amd", 1)