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nvc0/ir: add emission for SULDB and SUSTx

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Signed-off-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Reviewed-by: Ilia Mirkin <imirkin@alum.mit.edu>
This commit is contained in:
Samuel Pitoiset 2016-04-27 19:14:59 +02:00
parent cd88d1a171
commit b663db44ba
1 changed files with 44 additions and 2 deletions
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46
src/gallium/drivers/nouveau/codegen/nv50_ir_emit_nvc0.cpp
View file

@ -139,6 +139,8 @@ private:
void emitSULDGB(const TexInstruction *);
void emitSUSTGx(const TexInstruction *);
void emitSULDB(const TexInstruction *);
void emitSUSTx(const TexInstruction *);
void emitSULEA(const TexInstruction *);
void emitVSHL(const Instruction *);
@ -2339,6 +2341,46 @@ CodeEmitterNVC0::emitSULEA(const TexInstruction *i)
emitSUDim(i);
}
void
CodeEmitterNVC0::emitSULDB(const TexInstruction *i)
{
assert(targ->getChipset() < NVISA_GK104_CHIPSET);
code[0] = 0x5;
code[1] = 0xd4000000 | (i->subOp << 15);
emitPredicate(i);
emitLoadStoreType(i->dType);
defId(i->def(0), 14);
emitCachingMode(i->cache);
emitSUAddr(i);
emitSUDim(i);
}
void
CodeEmitterNVC0::emitSUSTx(const TexInstruction *i)
{
assert(targ->getChipset() < NVISA_GK104_CHIPSET);
code[0] = 0x5;
code[1] = 0xdc000000 | (i->subOp << 15);
if (i->op == OP_SUSTP)
code[1] |= i->tex.mask << 17;
else
emitLoadStoreType(i->dType);
emitPredicate(i);
srcId(i->src(1), 14);
emitCachingMode(i->cache);
emitSUAddr(i);
emitSUDim(i);
}
void
CodeEmitterNVC0::emitVectorSubOp(const Instruction *i)
{
@ -2625,14 +2667,14 @@ CodeEmitterNVC0::emitInstruction(Instruction *insn)
if (targ->getChipset() >= NVISA_GK104_CHIPSET)
emitSULDGB(insn->asTex());
else
ERROR("SULDB not yet supported on < nve4\n");
emitSULDB(insn->asTex());
break;
case OP_SUSTB:
case OP_SUSTP:
if (targ->getChipset() >= NVISA_GK104_CHIPSET)
emitSUSTGx(insn->asTex());
else
ERROR("SUSTx not yet supported on < nve4\n");
emitSUSTx(insn->asTex());
break;
case OP_SULEA:
emitSULEA(insn->asTex());