anv: Add dummy workload for AV1 decode on affected platforms (Wa_1508208842)

Implement software workaround for AVP decoder corruption on Gen12
platforms. These platforms require a warmup workload before
the actual AV1 decode to prevent output corruption.

- Gen12: Tiger Lake, DG1, Rocket Lake, Alder Lake

Signed-off-by: Hyunjun Ko <zzoon@igalia.com>
Acked-by: Lionel Landwerlin <lionel.g.landwerlin@intel.com>
(cherry picked from commit 260908cecb)

Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/40752>
This commit is contained in:
Hyunjun Ko 2026-01-30 05:07:54 +01:00 committed by Eric Engestrom
parent ad17b864cb
commit b62216f82d
2 changed files with 535 additions and 1 deletions

View file

@ -26434,7 +26434,7 @@
"description": "anv: Add dummy workload for AV1 decode on affected platforms (Wa_1508208842)",
"nominated": false,
"nomination_type": 0,
"resolution": 4,
"resolution": 1,
"main_sha": null,
"because_sha": null,
"notes": null

View file

@ -1376,6 +1376,535 @@ find_cdf_index(const struct anv_video_session *vid,
return 0;
}
#if GFX_VER == 12
static void
anv_av1_decode_dummy(struct anv_cmd_buffer *cmd_buffer)
{
struct anv_video_session *vid = cmd_buffer->video.vid;
anv_batch_emit(&cmd_buffer->batch, GENX(MI_FORCE_WAKEUP), wake) {
wake.HEVCPowerWellControl = true;
wake.MaskBits = 768;
}
anv_batch_emit(&cmd_buffer->batch, GENX(MI_FORCE_WAKEUP), wake) {
wake.HEVCPowerWellControl = true;
wake.MaskBits = 768;
}
anv_batch_emit(&cmd_buffer->batch, GENX(MI_FLUSH_DW), flush) {
flush.DWordLength = 2;
flush.VideoPipelineCacheInvalidate = 1;
};
anv_batch_emit(&cmd_buffer->batch, GENX(AVP_VD_CONTROL_STATE), vd) {
vd.VDControlState.PipelineInitialization = 1;
}
anv_batch_emit(&cmd_buffer->batch, GENX(MFX_WAIT), mfx) {
mfx.MFXSyncControlFlag = 1;
}
anv_batch_emit(&cmd_buffer->batch, GENX(AVP_PIPE_MODE_SELECT), sel) {
sel.CodecSelect = Decode;
sel.MultiEngineMode = SingleEngineMode;
};
anv_batch_emit(&cmd_buffer->batch, GENX(MFX_WAIT), mfx) {
mfx.MFXSyncControlFlag = 1;
}
anv_batch_emit(&cmd_buffer->batch, GENX(AVP_SURFACE_STATE), ss) {
ss.SurfaceFormat = AVP_PLANAR_420_8;
ss.SurfacePitchMinus1 = 127;
ss.YOffsetforUCb = 32;
};
bool use_internal_cache_mem = true;
anv_batch_emit(&cmd_buffer->batch, GENX(AVP_PIPE_BUF_ADDR_STATE), buf) {
buf.DecodedOutputFrameBufferAddressAttributes = (struct GENX(MEMORYADDRESSATTRIBUTES)) {
.MOCS = anv_mocs(cmd_buffer->device, NULL, 0),
};
buf.CurrentFrameMVWriteBufferAddressAttributes = (struct GENX(MEMORYADDRESSATTRIBUTES)) {
.MOCS = anv_mocs(cmd_buffer->device, NULL, 0),
};
buf.IntraBCDecodedOutputFrameBufferAddressAttributes = (struct GENX(MEMORYADDRESSATTRIBUTES)) {
.MOCS = anv_mocs(cmd_buffer->device, buf.IntraBCDecodedOutputFrameBufferAddress.bo, 0),
};
if (use_internal_cache_mem) {
buf.BitstreamLineRowstoreBufferAddress = (struct anv_address) {
NULL,
btdl_cache_offset * 64
};
buf.BitstreamLineRowstoreBufferAddressAttributes = (struct GENX(MEMORYADDRESSATTRIBUTES)) {
.MOCS = anv_mocs(cmd_buffer->device, NULL, 0),
.RowStoreScratchBufferCacheSelect = 1,
};
} else {
buf.BitstreamLineRowstoreBufferAddress = (struct anv_address) {
vid->vid_mem[ANV_VID_MEM_AV1_BITSTREAM_LINE_ROWSTORE].mem->bo,
vid->vid_mem[ANV_VID_MEM_AV1_BITSTREAM_LINE_ROWSTORE].offset
};
buf.BitstreamLineRowstoreBufferAddressAttributes = (struct GENX(MEMORYADDRESSATTRIBUTES)) {
.MOCS = anv_mocs(cmd_buffer->device, vid->vid_mem[ANV_VID_MEM_AV1_BITSTREAM_LINE_ROWSTORE].mem->bo, 0),
};
}
buf.BitstreamTileLineRowstoreBufferAddress = (struct anv_address) {
vid->vid_mem[ANV_VID_MEM_AV1_BITSTREAM_TILE_LINE_ROWSTORE].mem->bo,
vid->vid_mem[ANV_VID_MEM_AV1_BITSTREAM_TILE_LINE_ROWSTORE].offset
};
buf.BitstreamTileLineRowstoreBufferAddressAttributes = (struct GENX(MEMORYADDRESSATTRIBUTES)) {
.MOCS = anv_mocs(cmd_buffer->device, vid->vid_mem[ANV_VID_MEM_AV1_BITSTREAM_TILE_LINE_ROWSTORE].mem->bo, 0),
};
if (use_internal_cache_mem) {
buf.IntraPredictionLineRowstoreBufferAddress = (struct anv_address) {
NULL,
ipdl_cache_offset * 64
};
buf.IntraPredictionLineRowstoreBufferAddressAttributes = (struct GENX(MEMORYADDRESSATTRIBUTES)) {
.MOCS = anv_mocs(cmd_buffer->device, NULL, 0),
.RowStoreScratchBufferCacheSelect = 1
};
} else {
buf.IntraPredictionLineRowstoreBufferAddress = (struct anv_address) {
vid->vid_mem[ANV_VID_MEM_AV1_INTRA_PREDICTION_LINE_ROWSTORE].mem->bo,
vid->vid_mem[ANV_VID_MEM_AV1_INTRA_PREDICTION_LINE_ROWSTORE].offset
};
buf.IntraPredictionLineRowstoreBufferAddressAttributes = (struct GENX(MEMORYADDRESSATTRIBUTES)) {
.MOCS = anv_mocs(cmd_buffer->device, vid->vid_mem[ANV_VID_MEM_AV1_INTRA_PREDICTION_LINE_ROWSTORE].mem->bo, 0),
};
}
buf.IntraPredictionTileLineRowstoreBufferAddress = (struct anv_address) {
vid->vid_mem[ANV_VID_MEM_AV1_INTRA_PREDICTION_TILE_LINE_ROWSTORE].mem->bo,
vid->vid_mem[ANV_VID_MEM_AV1_INTRA_PREDICTION_TILE_LINE_ROWSTORE].offset
};
buf.IntraPredictionTileLineRowstoreBufferAddressAttributes = (struct GENX(MEMORYADDRESSATTRIBUTES)) {
.MOCS = anv_mocs(cmd_buffer->device, vid->vid_mem[ANV_VID_MEM_AV1_INTRA_PREDICTION_TILE_LINE_ROWSTORE].mem->bo, 0),
};
if (use_internal_cache_mem) {
buf.SpatialMotionVectorLineBufferAddress = (struct anv_address) {
NULL,
smvl_cache_offset * 64
};
buf.SpatialMotionVectorLineBufferAddressAttributes = (struct GENX(MEMORYADDRESSATTRIBUTES)) {
.MOCS = anv_mocs(cmd_buffer->device, NULL, 0),
.RowStoreScratchBufferCacheSelect = 1
};
} else {
buf.SpatialMotionVectorLineBufferAddress = (struct anv_address) {
vid->vid_mem[ANV_VID_MEM_AV1_SPATIAL_MOTION_VECTOR_LINE].mem->bo,
vid->vid_mem[ANV_VID_MEM_AV1_SPATIAL_MOTION_VECTOR_LINE].offset
};
buf.SpatialMotionVectorLineBufferAddressAttributes = (struct GENX(MEMORYADDRESSATTRIBUTES)) {
.MOCS = anv_mocs(cmd_buffer->device, vid->vid_mem[ANV_VID_MEM_AV1_SPATIAL_MOTION_VECTOR_LINE].mem->bo, 0),
};
}
buf.SpatialMotionVectorTileLineBufferAddress = (struct anv_address) {
vid->vid_mem[ANV_VID_MEM_AV1_SPATIAL_MOTION_VECTOR_TILE_LINE].mem->bo,
vid->vid_mem[ANV_VID_MEM_AV1_SPATIAL_MOTION_VECTOR_TILE_LINE].offset
};
buf.SpatialMotionVectorTileLineBufferAddressAttributes = (struct GENX(MEMORYADDRESSATTRIBUTES)) {
.MOCS = anv_mocs(cmd_buffer->device, vid->vid_mem[ANV_VID_MEM_AV1_SPATIAL_MOTION_VECTOR_TILE_LINE].mem->bo, 0),
};
buf.LoopRestorationMetaTileColumnBufferAddress = (struct anv_address) {
vid->vid_mem[ANV_VID_MEM_AV1_LOOP_RESTORATION_META_TILE_COLUMN].mem->bo,
vid->vid_mem[ANV_VID_MEM_AV1_LOOP_RESTORATION_META_TILE_COLUMN].offset
};
buf.LoopRestorationMetaTileColumnBufferAddressAttributes = (struct GENX(MEMORYADDRESSATTRIBUTES)) {
.MOCS = anv_mocs(cmd_buffer->device, vid->vid_mem[ANV_VID_MEM_AV1_LOOP_RESTORATION_META_TILE_COLUMN].mem->bo, 0),
};
buf.LoopRestorationFilterTileLineYBufferAddress = (struct anv_address) {
vid->vid_mem[ANV_VID_MEM_AV1_LOOP_RESTORATION_FILTER_TILE_LINE_Y].mem->bo,
vid->vid_mem[ANV_VID_MEM_AV1_LOOP_RESTORATION_FILTER_TILE_LINE_Y].offset
};
buf.LoopRestorationFilterTileLineYBufferAddressAttributes = (struct GENX(MEMORYADDRESSATTRIBUTES)) {
.MOCS = anv_mocs(cmd_buffer->device, vid->vid_mem[ANV_VID_MEM_AV1_LOOP_RESTORATION_FILTER_TILE_LINE_Y].mem->bo, 0),
};
buf.LoopRestorationFilterTileLineUBufferAddress = (struct anv_address) {
vid->vid_mem[ANV_VID_MEM_AV1_LOOP_RESTORATION_FILTER_TILE_LINE_U].mem->bo,
vid->vid_mem[ANV_VID_MEM_AV1_LOOP_RESTORATION_FILTER_TILE_LINE_U].offset
};
buf.LoopRestorationFilterTileLineUBufferAddressAttributes = (struct GENX(MEMORYADDRESSATTRIBUTES)) {
.MOCS = anv_mocs(cmd_buffer->device, vid->vid_mem[ANV_VID_MEM_AV1_LOOP_RESTORATION_FILTER_TILE_LINE_U].mem->bo, 0),
};
buf.LoopRestorationFilterTileLineVBufferAddress = (struct anv_address) {
vid->vid_mem[ANV_VID_MEM_AV1_LOOP_RESTORATION_FILTER_TILE_LINE_V].mem->bo,
vid->vid_mem[ANV_VID_MEM_AV1_LOOP_RESTORATION_FILTER_TILE_LINE_V].offset
};
buf.LoopRestorationFilterTileLineVBufferAddressAttributes = (struct GENX(MEMORYADDRESSATTRIBUTES)) {
.MOCS = anv_mocs(cmd_buffer->device, vid->vid_mem[ANV_VID_MEM_AV1_LOOP_RESTORATION_FILTER_TILE_LINE_V].mem->bo, 0),
};
if (use_internal_cache_mem) {
buf.DeblockerFilterLineYBufferAddress = (struct anv_address) {
NULL,
dfly_cache_offset * 64
};
buf.DeblockerFilterLineYBufferAddressAttributes = (struct GENX(MEMORYADDRESSATTRIBUTES)) {
.MOCS = anv_mocs(cmd_buffer->device, NULL, 0),
.RowStoreScratchBufferCacheSelect = 1,
};
} else {
buf.DeblockerFilterLineYBufferAddress = (struct anv_address) {
vid->vid_mem[ANV_VID_MEM_AV1_DEBLOCKER_FILTER_LINE_Y].mem->bo,
vid->vid_mem[ANV_VID_MEM_AV1_DEBLOCKER_FILTER_LINE_Y].offset
};
buf.DeblockerFilterLineYBufferAddressAttributes = (struct GENX(MEMORYADDRESSATTRIBUTES)) {
.MOCS = anv_mocs(cmd_buffer->device, vid->vid_mem[ANV_VID_MEM_AV1_DEBLOCKER_FILTER_LINE_Y].mem->bo, 0),
};
}
if (use_internal_cache_mem) {
buf.DeblockerFilterLineUBufferAddress = (struct anv_address) {
NULL,
dflu_cache_offset * 64
};
buf.DeblockerFilterLineUBufferAddressAttributes = (struct GENX(MEMORYADDRESSATTRIBUTES)) {
.MOCS = anv_mocs(cmd_buffer->device, NULL, 0),
.RowStoreScratchBufferCacheSelect = 1,
};
} else {
buf.DeblockerFilterLineUBufferAddress = (struct anv_address) {
vid->vid_mem[ANV_VID_MEM_AV1_DEBLOCKER_FILTER_LINE_U].mem->bo,
vid->vid_mem[ANV_VID_MEM_AV1_DEBLOCKER_FILTER_LINE_U].offset
};
buf.DeblockerFilterLineUBufferAddressAttributes = (struct GENX(MEMORYADDRESSATTRIBUTES)) {
.MOCS = anv_mocs(cmd_buffer->device, vid->vid_mem[ANV_VID_MEM_AV1_DEBLOCKER_FILTER_LINE_U].mem->bo, 0),
};
}
if (use_internal_cache_mem) {
buf.DeblockerFilterLineVBufferAddress = (struct anv_address) {
NULL,
dflv_cache_offset * 64
};
buf.DeblockerFilterLineVBufferAddressAttributes = (struct GENX(MEMORYADDRESSATTRIBUTES)) {
.MOCS = anv_mocs(cmd_buffer->device, NULL, 0),
.RowStoreScratchBufferCacheSelect = 1,
};
} else {
buf.DeblockerFilterLineVBufferAddress = (struct anv_address) {
vid->vid_mem[ANV_VID_MEM_AV1_DEBLOCKER_FILTER_LINE_V].mem->bo,
vid->vid_mem[ANV_VID_MEM_AV1_DEBLOCKER_FILTER_LINE_V].offset
};
buf.DeblockerFilterLineVBufferAddressAttributes = (struct GENX(MEMORYADDRESSATTRIBUTES)) {
.MOCS = anv_mocs(cmd_buffer->device, vid->vid_mem[ANV_VID_MEM_AV1_DEBLOCKER_FILTER_LINE_V].mem->bo, 0),
};
}
buf.DeblockerFilterTileLineYBufferAddress = (struct anv_address) {
vid->vid_mem[ANV_VID_MEM_AV1_DEBLOCKER_FILTER_TILE_LINE_Y].mem->bo,
vid->vid_mem[ANV_VID_MEM_AV1_DEBLOCKER_FILTER_TILE_LINE_Y].offset
};
buf.DeblockerFilterTileLineYBufferAddressAttributes = (struct GENX(MEMORYADDRESSATTRIBUTES)) {
.MOCS = anv_mocs(cmd_buffer->device, vid->vid_mem[ANV_VID_MEM_AV1_DEBLOCKER_FILTER_TILE_LINE_Y].mem->bo, 0),
};
buf.DeblockerFilterTileLineUBufferAddress = (struct anv_address) {
vid->vid_mem[ANV_VID_MEM_AV1_DEBLOCKER_FILTER_TILE_LINE_U].mem->bo,
vid->vid_mem[ANV_VID_MEM_AV1_DEBLOCKER_FILTER_TILE_LINE_U].offset
};
buf.DeblockerFilterTileLineUBufferAddressAttributes = (struct GENX(MEMORYADDRESSATTRIBUTES)) {
.MOCS = anv_mocs(cmd_buffer->device, vid->vid_mem[ANV_VID_MEM_AV1_DEBLOCKER_FILTER_TILE_LINE_U].mem->bo, 0),
};
buf.DeblockerFilterTileLineVBufferAddress = (struct anv_address) {
vid->vid_mem[ANV_VID_MEM_AV1_DEBLOCKER_FILTER_TILE_LINE_V].mem->bo,
vid->vid_mem[ANV_VID_MEM_AV1_DEBLOCKER_FILTER_TILE_LINE_V].offset
};
buf.DeblockerFilterTileLineVBufferAddressAttributes = (struct GENX(MEMORYADDRESSATTRIBUTES)) {
.MOCS = anv_mocs(cmd_buffer->device, vid->vid_mem[ANV_VID_MEM_AV1_DEBLOCKER_FILTER_TILE_LINE_V].mem->bo, 0),
};
buf.DeblockerFilterTileColumnYBufferAddress = (struct anv_address) {
vid->vid_mem[ANV_VID_MEM_AV1_DEBLOCKER_FILTER_TILE_COLUMN_Y].mem->bo,
vid->vid_mem[ANV_VID_MEM_AV1_DEBLOCKER_FILTER_TILE_COLUMN_Y].offset
};
buf.DeblockerFilterTileColumnYBufferAddressAttributes = (struct GENX(MEMORYADDRESSATTRIBUTES)) {
.MOCS = anv_mocs(cmd_buffer->device, vid->vid_mem[ANV_VID_MEM_AV1_DEBLOCKER_FILTER_TILE_COLUMN_Y].mem->bo, 0),
};
buf.DeblockerFilterTileColumnUBufferAddress = (struct anv_address) {
vid->vid_mem[ANV_VID_MEM_AV1_DEBLOCKER_FILTER_TILE_COLUMN_U].mem->bo,
vid->vid_mem[ANV_VID_MEM_AV1_DEBLOCKER_FILTER_TILE_COLUMN_U].offset
};
buf.DeblockerFilterTileColumnUBufferAddressAttributes = (struct GENX(MEMORYADDRESSATTRIBUTES)) {
.MOCS = anv_mocs(cmd_buffer->device, vid->vid_mem[ANV_VID_MEM_AV1_DEBLOCKER_FILTER_TILE_COLUMN_U].mem->bo, 0),
};
buf.DeblockerFilterTileColumnVBufferAddress = (struct anv_address) {
vid->vid_mem[ANV_VID_MEM_AV1_DEBLOCKER_FILTER_TILE_COLUMN_V].mem->bo,
vid->vid_mem[ANV_VID_MEM_AV1_DEBLOCKER_FILTER_TILE_COLUMN_V].offset
};
buf.DeblockerFilterTileColumnVBufferAddressAttributes = (struct GENX(MEMORYADDRESSATTRIBUTES)) {
.MOCS = anv_mocs(cmd_buffer->device, vid->vid_mem[ANV_VID_MEM_AV1_DEBLOCKER_FILTER_TILE_COLUMN_V].mem->bo, 0),
};
if (use_internal_cache_mem) {
buf.CDEFFilterLineBufferAddress = (struct anv_address) { NULL, cdef_cache_offset * 64};
buf.CDEFFilterLineBufferAddressAttributes = (struct GENX(MEMORYADDRESSATTRIBUTES)) {
.MOCS = anv_mocs(cmd_buffer->device, NULL, 0),
.RowStoreScratchBufferCacheSelect = 1,
};
} else {
buf.CDEFFilterLineBufferAddress = (struct anv_address) {
vid->vid_mem[ANV_VID_MEM_AV1_CDEF_FILTER_LINE].mem->bo,
vid->vid_mem[ANV_VID_MEM_AV1_CDEF_FILTER_LINE].offset
};
buf.CDEFFilterLineBufferAddressAttributes = (struct GENX(MEMORYADDRESSATTRIBUTES)) {
.MOCS = anv_mocs(cmd_buffer->device, vid->vid_mem[ANV_VID_MEM_AV1_CDEF_FILTER_LINE].mem->bo, 0),
};
}
buf.CDEFFilterTileLineBufferAddress = (struct anv_address) {
vid->vid_mem[ANV_VID_MEM_AV1_CDEF_FILTER_TILE_LINE].mem->bo,
vid->vid_mem[ANV_VID_MEM_AV1_CDEF_FILTER_TILE_LINE].offset
};
buf.CDEFFilterTileLineBufferAddressAttributes = (struct GENX(MEMORYADDRESSATTRIBUTES)) {
.MOCS = anv_mocs(cmd_buffer->device, vid->vid_mem[ANV_VID_MEM_AV1_CDEF_FILTER_TILE_LINE].mem->bo, 0),
};
buf.CDEFFilterTileColumnBufferAddress = (struct anv_address) {
vid->vid_mem[ANV_VID_MEM_AV1_CDEF_FILTER_TILE_COLUMN].mem->bo,
vid->vid_mem[ANV_VID_MEM_AV1_CDEF_FILTER_TILE_COLUMN].offset
};
buf.CDEFFilterTileColumnBufferAddressAttributes = (struct GENX(MEMORYADDRESSATTRIBUTES)) {
.MOCS = anv_mocs(cmd_buffer->device, vid->vid_mem[ANV_VID_MEM_AV1_CDEF_FILTER_TILE_COLUMN].mem->bo, 0),
};
buf.CDEFFilterMetaTileLineBufferAddress = (struct anv_address) {
vid->vid_mem[ANV_VID_MEM_AV1_CDEF_FILTER_META_TILE_LINE].mem->bo,
vid->vid_mem[ANV_VID_MEM_AV1_CDEF_FILTER_META_TILE_LINE].offset
};
buf.CDEFFilterMetaTileLineBufferAddressAttributes = (struct GENX(MEMORYADDRESSATTRIBUTES)) {
.MOCS = anv_mocs(cmd_buffer->device, vid->vid_mem[ANV_VID_MEM_AV1_CDEF_FILTER_META_TILE_LINE].mem->bo, 0),
};
buf.CDEFFilterMetaTileColumnBufferAddress = (struct anv_address) {
vid->vid_mem[ANV_VID_MEM_AV1_CDEF_FILTER_META_TILE_COLUMN].mem->bo,
vid->vid_mem[ANV_VID_MEM_AV1_CDEF_FILTER_META_TILE_COLUMN].offset
};
buf.CDEFFilterMetaTileColumnBufferAddressAttributes = (struct GENX(MEMORYADDRESSATTRIBUTES)) {
.MOCS = anv_mocs(cmd_buffer->device, vid->vid_mem[ANV_VID_MEM_AV1_CDEF_FILTER_META_TILE_COLUMN].mem->bo, 0),
};
buf.CDEFFilterTopLeftCornerBufferAddress = (struct anv_address) {
vid->vid_mem[ANV_VID_MEM_AV1_CDEF_FILTER_TOP_LEFT_CORNER].mem->bo,
vid->vid_mem[ANV_VID_MEM_AV1_CDEF_FILTER_TOP_LEFT_CORNER].offset
};
buf.CDEFFilterTopLeftCornerBufferAddressAttributes = (struct GENX(MEMORYADDRESSATTRIBUTES)) {
.MOCS = anv_mocs(cmd_buffer->device, vid->vid_mem[ANV_VID_MEM_AV1_CDEF_FILTER_TOP_LEFT_CORNER].mem->bo, 0),
};
buf.SuperResTileColumnYBufferAddress = (struct anv_address) {
vid->vid_mem[ANV_VID_MEM_AV1_SUPER_RES_TILE_COLUMN_Y].mem->bo,
vid->vid_mem[ANV_VID_MEM_AV1_SUPER_RES_TILE_COLUMN_Y].offset
};
buf.SuperResTileColumnYBufferAddressAttributes = (struct GENX(MEMORYADDRESSATTRIBUTES)) {
.MOCS = anv_mocs(cmd_buffer->device, vid->vid_mem[ANV_VID_MEM_AV1_SUPER_RES_TILE_COLUMN_Y].mem->bo, 0),
};
buf.SuperResTileColumnUBufferAddress = (struct anv_address) {
vid->vid_mem[ANV_VID_MEM_AV1_SUPER_RES_TILE_COLUMN_U].mem->bo,
vid->vid_mem[ANV_VID_MEM_AV1_SUPER_RES_TILE_COLUMN_U].offset
};
buf.SuperResTileColumnUBufferAddressAttributes = (struct GENX(MEMORYADDRESSATTRIBUTES)) {
.MOCS = anv_mocs(cmd_buffer->device, vid->vid_mem[ANV_VID_MEM_AV1_SUPER_RES_TILE_COLUMN_U].mem->bo, 0),
};
buf.SuperResTileColumnVBufferAddress = (struct anv_address) {
vid->vid_mem[ANV_VID_MEM_AV1_SUPER_RES_TILE_COLUMN_V].mem->bo,
vid->vid_mem[ANV_VID_MEM_AV1_SUPER_RES_TILE_COLUMN_V].offset
};
buf.SuperResTileColumnVBufferAddressAttributes = (struct GENX(MEMORYADDRESSATTRIBUTES)) {
.MOCS = anv_mocs(cmd_buffer->device, vid->vid_mem[ANV_VID_MEM_AV1_SUPER_RES_TILE_COLUMN_V].mem->bo, 0),
};
buf.LoopRestorationFilterTileColumnYBufferAddress = (struct anv_address) {
vid->vid_mem[ANV_VID_MEM_AV1_LOOP_RESTORATION_FILTER_TILE_COLUMN_Y].mem->bo,
vid->vid_mem[ANV_VID_MEM_AV1_LOOP_RESTORATION_FILTER_TILE_COLUMN_Y].offset
};
buf.LoopRestorationFilterTileColumnYBufferAddressAttributes = (struct GENX(MEMORYADDRESSATTRIBUTES)) {
.MOCS = anv_mocs(cmd_buffer->device, vid->vid_mem[ANV_VID_MEM_AV1_LOOP_RESTORATION_FILTER_TILE_COLUMN_Y].mem->bo, 0),
};
buf.LoopRestorationFilterTileColumnUBufferAddress = (struct anv_address) {
vid->vid_mem[ANV_VID_MEM_AV1_LOOP_RESTORATION_FILTER_TILE_COLUMN_U].mem->bo,
vid->vid_mem[ANV_VID_MEM_AV1_LOOP_RESTORATION_FILTER_TILE_COLUMN_U].offset
};
buf.LoopRestorationFilterTileColumnUBufferAddressAttributes = (struct GENX(MEMORYADDRESSATTRIBUTES)) {
.MOCS = anv_mocs(cmd_buffer->device, vid->vid_mem[ANV_VID_MEM_AV1_LOOP_RESTORATION_FILTER_TILE_COLUMN_U].mem->bo, 0),
};
buf.LoopRestorationFilterTileColumnVBufferAddress = (struct anv_address) {
vid->vid_mem[ANV_VID_MEM_AV1_LOOP_RESTORATION_FILTER_TILE_COLUMN_V].mem->bo,
vid->vid_mem[ANV_VID_MEM_AV1_LOOP_RESTORATION_FILTER_TILE_COLUMN_V].offset
};
buf.LoopRestorationFilterTileColumnVBufferAddressAttributes = (struct GENX(MEMORYADDRESSATTRIBUTES)) {
.MOCS = anv_mocs(cmd_buffer->device, vid->vid_mem[ANV_VID_MEM_AV1_LOOP_RESTORATION_FILTER_TILE_COLUMN_V].mem->bo, 0),
};
buf.ReferencePictureAttributes = (struct GENX(MEMORYADDRESSATTRIBUTES)) {
.MOCS = anv_mocs(cmd_buffer->device, NULL, 0),
};
buf.CollocatedMVTemporalBufferAttributes = (struct GENX(MEMORYADDRESSATTRIBUTES)) {
.MOCS = anv_mocs(cmd_buffer->device, NULL, 0),
};
buf.CDFTablesInitializationBufferAddress = (struct anv_address) {
vid->vid_mem[ANV_VID_MEM_AV1_CDF_DEFAULTS_0 + 3].mem->bo,
vid->vid_mem[ANV_VID_MEM_AV1_CDF_DEFAULTS_0 + 3].offset
};
buf.CDFTablesInitializationBufferAddressAttributes = (struct GENX(MEMORYADDRESSATTRIBUTES)) {
.MOCS = anv_mocs(cmd_buffer->device, buf.CDFTablesInitializationBufferAddress.bo, 0),
};
buf.CDFTablesBackwardAdaptationBufferAddressAttributes = (struct GENX(MEMORYADDRESSATTRIBUTES)) {
.MOCS = anv_mocs(cmd_buffer->device, NULL, 0),
};
buf.AV1SegmentIDReadBufferAddressAttributes = (struct GENX(MEMORYADDRESSATTRIBUTES)) {
.MOCS = anv_mocs(cmd_buffer->device, NULL, 0),
};
buf.AV1SegmentIDWriteBufferAddressAttributes = (struct GENX(MEMORYADDRESSATTRIBUTES)) {
.MOCS = anv_mocs(cmd_buffer->device, NULL, 0),
};
buf.DecodedFrameStatusErrorBufferAddressAttributes = (struct GENX(MEMORYADDRESSATTRIBUTES)) {
.MOCS = anv_mocs(cmd_buffer->device, NULL, 0),
};
buf.DecodedBlockDataStreamoutBufferAddress = (struct anv_address) {
vid->vid_mem[ANV_VID_MEM_AV1_DBD_BUFFER].mem->bo,
vid->vid_mem[ANV_VID_MEM_AV1_DBD_BUFFER].offset
};
buf.DecodedBlockDataStreamoutBufferAddressAttributes = (struct GENX(MEMORYADDRESSATTRIBUTES)) {
.MOCS = anv_mocs(cmd_buffer->device, vid->vid_mem[ANV_VID_MEM_AV1_DBD_BUFFER].mem->bo, 0),
};
};
anv_batch_emit(&cmd_buffer->batch, GENX(AVP_IND_OBJ_BASE_ADDR_STATE), ind) {
ind.AVPIndirectBitstreamObjectAddressAttributes = (struct GENX(MEMORYADDRESSATTRIBUTES)) {
.MOCS = anv_mocs(cmd_buffer->device, NULL, 0),
};
}
anv_batch_emit(&cmd_buffer->batch, GENX(AVP_PIC_STATE), pic) {
pic.FrameWidth = 15;
pic.FrameHeight = 15;
pic.SequenceChromaSubSamplingFormat = SS_420;
pic.SequencePixelBitDepthIdc = SeqPix_8bit;
pic.SequenceEnableOrderHintFlag = true;
pic.SequenceOrderHintBitsMinus1 = 5;
pic.SequenceEnableFilterIntraFlag = true;
pic.SequenceEnableInterIntraCompoundFlag = true;
pic.SequenceEnableMaskedCompoundFlag = true;
pic.SequenceEnableJointCompoundFlag = true;
pic.AllowScreenContentToolsFlag = true;
pic.ForceIntegerMVFlag = true;
pic.UseCDEFFilterFlag = true;
pic.FrameLevelLoopRestorationFilterEnable = true;
pic.FrameType = 0;
pic.IntraOnlyFlag = true;
pic.PrimaryReferenceFrameIdx = 7;
pic.BaseQindex = 149;
pic.FrameTransformMode = 2;
pic.ReferenceFrameIdx0 = AV1_INTRA_FRAME;
pic.ReferenceFrameIdx1 = AV1_LAST_FRAME;
pic.ReferenceFrameIdx2 = AV1_LAST2_FRAME;
pic.ReferenceFrameIdx3 = AV1_LAST3_FRAME;
pic.ReferenceFrameIdx4 = AV1_GOLDEN_FRAME;
pic.ReferenceFrameIdx5 = AV1_BWDREF_FRAME;
pic.ReferenceFrameIdx6 = AV1_ALTREF2_FRAME;
pic.ReferenceFrameIdx7 = AV1_ALTREF_FRAME;
};
anv_batch_emit(&cmd_buffer->batch, GENX(AVP_INTER_PRED_STATE), inter);
anv_batch_emit(&cmd_buffer->batch, GENX(AVP_SEGMENT_STATE), seg) {
seg.SegmentLumaYQMLevel = 15;
seg.SegmentChromaUQMLevel = 15;
seg.SegmentChromaVQMLevel = 15;
};
anv_batch_emit(&cmd_buffer->batch, GENX(AVP_INLOOP_FILTER_STATE), fil) {
fil.LumaYDeblockerFilterLevelVertical = 46;
fil.LumaYDeblockerFilterLevelHorizontal = 50;
fil.ChromaUDeblockerFilterLevel = 52;
fil.ChromaVDeblockerFilterLevel = 11;
fil.DeblockerFilterSharpnessLevel = 2;
fil.DeblockerFilterRefDeltas0 = 1;
fil.DeblockerFilterRefDeltas4 = 63;
fil.DeblockerFilterRefDeltas6 = 63;
fil.DeblockerFilterRefDeltas7 = 63;
fil.CDEFYStrength0 = 2;
fil.CDEFYStrength1 = 48;
fil.CDEFBits = 1;
fil.CDEFFilterDmpaingFactorMinus3 = 3;
fil.CDEFUVStrength0 = 48;
fil.CDEFUVStrength1 = 2;
fil.SuperResUpscaledFrameWidthMinus1 = 15;
fil.SuperResDenom = 8;
fil.FrameLoopRestorationFilterChromaV = 1;
fil.LoopRestorationUnitSizeLumaY = 1;
};
anv_batch_emit(&cmd_buffer->batch, GENX(AVP_TILE_CODING), til) {
til.NumberofActiveBEPipes = 1;
til.IsLastTileofRowFlag = true;
til.IsLastTileofColumnFlag = true;
til.IsStartTileofTileGroupFlag = true;
til.IsEndTileofTileGroupFlag = true;
til.IsLastTileofFrameFlag = true;
til.DisableFrameContextUpdateFlag = true;
};
anv_batch_emit(&cmd_buffer->batch, GENX(AVP_BSD_OBJECT), bsd) {
bsd.TileIndirectBSDDataLength = 80;
bsd.TileIndirectDataStartAddress = 61;
};
anv_batch_emit(&cmd_buffer->batch, GENX(AVP_VD_CONTROL_STATE), vd) {
vd.VDControlState.MemoryImplicitFlush = 1;
};
anv_batch_emit(&cmd_buffer->batch, GENX(VD_PIPELINE_FLUSH), vd) {
vd.AVPPipelineDone = 1;
vd.VDCommandMessageParserDone = 1;
vd.AVPPipelineCommandFlush = 1;
};
}
#endif
static void
anv_av1_decode_video_tile(struct anv_cmd_buffer *cmd_buffer,
const VkVideoDecodeInfoKHR *frame_info,
@ -2767,6 +3296,11 @@ anv_av1_decode_video(struct anv_cmd_buffer *cmd_buffer,
anv_av1_tiles_info(frame_info, seq_hdr, &tile_col_start_sb, &tile_row_start_sb);
anv_av1_calculate_xstep_qn(cmd_buffer, frame_info, seq_hdr, tile_col_start_sb);
#if GFX_VER == 12
/* TODO: Use workaround infrastructure Wa_1508208842 */
anv_av1_decode_dummy(cmd_buffer);
#endif
for (unsigned t = 0; t < av1_pic_info->tileCount; t++) {
anv_av1_decode_video_tile(cmd_buffer, frame_info, seq_hdr, t,
tile_col_start_sb, tile_row_start_sb);