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i965: Gen4/5: use IEEE floating point mode for GLSL shaders.

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Fixes isinf(), isnan() from GLSL 1.30

Signed-off-by: Chris Forbes <chrisf@ijw.co.nz>
Reviewed-by: Kenneth Graunke <kenneth@whitecape.org>
This commit is contained in:
Chris Forbes 2013-06-10 08:01:41 +12:00
parent 1ec66f2fb2
commit b616d01661
2 changed files with 17 additions and 2 deletions
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9
src/mesa/drivers/dri/i965/brw_vs_state.c
View file

@ -55,7 +55,14 @@ brw_upload_vs_unit(struct brw_context *brw)
brw->vs.prog_offset +
(vs->thread0.grf_reg_count << 1)) >> 6;
vs->thread1.floating_point_mode = BRW_FLOATING_POINT_NON_IEEE_754;
/* Use ALT floating point mode for ARB vertex programs, because they
* require 0^0 == 1.
*/
if (brw->ctx.Shader.CurrentVertexProgram == NULL)
vs->thread1.floating_point_mode = BRW_FLOATING_POINT_NON_IEEE_754;
else
vs->thread1.floating_point_mode = BRW_FLOATING_POINT_IEEE_754;
/* Choosing multiple program flow means that we may get 2-vertex threads,
* which will have the channel mask for dwords 4-7 enabled in the thread,
* and those dwords will be written to the second URB handle when we

10
src/mesa/drivers/dri/i965/brw_wm_state.c
View file

@ -110,7 +110,15 @@ brw_upload_wm_unit(struct brw_context *brw)
(wm->wm9.grf_reg_count_2 << 1)) >> 6;
wm->thread1.depth_coef_urb_read_offset = 1;
wm->thread1.floating_point_mode = BRW_FLOATING_POINT_NON_IEEE_754;
/* Use ALT floating point mode for ARB fragment programs, because they
* require 0^0 == 1. Even though _CurrentFragmentProgram is used for
* rendering, CurrentFragmentProgram is used for this check to
* differentiate between the GLSL and non-GLSL cases.
*/
if (ctx->Shader.CurrentFragmentProgram == NULL)
wm->thread1.floating_point_mode = BRW_FLOATING_POINT_NON_IEEE_754;
else
wm->thread1.floating_point_mode = BRW_FLOATING_POINT_IEEE_754;
wm->thread1.binding_table_entry_count = 0;