From b5fc941f2f4856ce39895033488f8654a035077f Mon Sep 17 00:00:00 2001 From: Mike Blumenkrantz Date: Fri, 3 Mar 2023 10:43:04 -0500 Subject: [PATCH] zink: always set batch usage for descriptors after barrier this otherwise breaks unordered promotion calc Part-of: --- src/gallium/drivers/zink/zink_context.c | 6 +++--- 1 file changed, 3 insertions(+), 3 deletions(-) diff --git a/src/gallium/drivers/zink/zink_context.c b/src/gallium/drivers/zink/zink_context.c index e4874ff25e7..e9645526ba8 100644 --- a/src/gallium/drivers/zink/zink_context.c +++ b/src/gallium/drivers/zink/zink_context.c @@ -1299,10 +1299,10 @@ zink_set_vertex_buffers(struct pipe_context *pctx, update_res_bind_count(ctx, res, false, false); ctx_vb->stride = vb->stride; ctx_vb->buffer_offset = vb->buffer_offset; - zink_batch_resource_usage_set(&ctx->batch, res, false, true); /* always barrier before possible rebind */ zink_screen(ctx->base.screen)->buffer_barrier(ctx, res, VK_ACCESS_VERTEX_ATTRIBUTE_READ_BIT, VK_PIPELINE_STAGE_VERTEX_INPUT_BIT); + zink_batch_resource_usage_set(&ctx->batch, res, false, true); res->obj->unordered_read = false; } else { enabled_buffers &= ~BITFIELD_BIT(start_slot + i); @@ -1458,9 +1458,9 @@ zink_set_constant_buffer(struct pipe_context *pctx, new_res->barrier_access[shader == MESA_SHADER_COMPUTE] |= VK_ACCESS_UNIFORM_READ_BIT; update_res_bind_count(ctx, new_res, shader == MESA_SHADER_COMPUTE, false); } - zink_batch_resource_usage_set(&ctx->batch, new_res, false, true); zink_screen(ctx->base.screen)->buffer_barrier(ctx, new_res, VK_ACCESS_UNIFORM_READ_BIT, new_res->gfx_barrier); + zink_batch_resource_usage_set(&ctx->batch, new_res, false, true); new_res->obj->unordered_read = false; } update |= ctx->ubos[shader][index].buffer_offset != offset || @@ -1572,13 +1572,13 @@ zink_set_shader_buffers(struct pipe_context *pctx, } pipe_resource_reference(&ssbo->buffer, &new_res->base.b); new_res->barrier_access[p_stage == MESA_SHADER_COMPUTE] |= access; - zink_batch_resource_usage_set(&ctx->batch, new_res, access & VK_ACCESS_SHADER_WRITE_BIT, true); ssbo->buffer_offset = buffers[i].buffer_offset; ssbo->buffer_size = MIN2(buffers[i].buffer_size, new_res->base.b.width0 - ssbo->buffer_offset); util_range_add(&new_res->base.b, &new_res->valid_buffer_range, ssbo->buffer_offset, ssbo->buffer_offset + ssbo->buffer_size); zink_screen(ctx->base.screen)->buffer_barrier(ctx, new_res, access, new_res->gfx_barrier); + zink_batch_resource_usage_set(&ctx->batch, new_res, access & VK_ACCESS_SHADER_WRITE_BIT, true); update = true; max_slot = MAX2(max_slot, start_slot + i); update_descriptor_state_ssbo(ctx, p_stage, start_slot + i, new_res);