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aco,radv,radeonsi: rename is_monolithic to merged_shader_compiled_separately

Browse source 
Reviewed-by: Marek Olšák <marek.olsak@amd.com>
Reviewed-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Signed-off-by: Qiang Yu <yuq825@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/24990>
This commit is contained in:
Qiang Yu 2023-09-01 15:21:11 +08:00
parent 6b4d213a6f
commit b5eaec6c80
8 changed files with 28 additions and 32 deletions
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2
src/amd/compiler/aco_assembler.cpp
View file

@ -1023,7 +1023,7 @@ fix_exports(asm_context& ctx, std::vector<uint32_t>& out, Program* program)
*/
exported |= (program->stage.sw == SWStage::VS || program->stage.sw == SWStage::TES) &&
program->stage.hw == AC_HW_NEXT_GEN_GEOMETRY_SHADER &&
!program->info.is_monolithic;
program->info.merged_shader_compiled_separately;
}
++it;
}

6
src/amd/compiler/aco_instruction_selection.cpp
View file

@ -199,7 +199,7 @@ emit_bpermute(isel_context* ctx, Builder& bld, Temp index, Temp data)
const bool avoid_shared_vgprs =
ctx->options->gfx_level >= GFX10 && ctx->options->gfx_level < GFX11 &&
ctx->program->wave_size == 64 &&
(ctx->program->info.has_epilog || !ctx->program->info.is_monolithic ||
(ctx->program->info.has_epilog || ctx->program->info.merged_shader_compiled_separately ||
ctx->stage == raytracing_cs);
if (ctx->options->gfx_level <= GFX7 || avoid_shared_vgprs) {
@ -11609,7 +11609,7 @@ select_shader(isel_context& ctx, nir_shader* nir, const bool need_startpgm, cons
end_divergent_if(&ctx, ic_merged_wave_info);
}
if (!ctx.program->info.is_monolithic &&
if (ctx.program->info.merged_shader_compiled_separately &&
(ctx.stage.sw == SWStage::VS || ctx.stage.sw == SWStage::TES)) {
assert(program->gfx_level >= GFX9);
create_merged_jump_to_epilog(&ctx);
@ -11799,7 +11799,7 @@ select_program(Program* program, unsigned shader_count, struct nir_shader* const
if_context ic_merged_wave_info;
/* Handle separate compilation of VS+TCS and {VS,TES}+GS on GFX9+. */
if (!ctx.program->info.is_monolithic) {
if (ctx.program->info.merged_shader_compiled_separately) {
assert(ctx.program->gfx_level >= GFX9);
if (ctx.stage.sw == SWStage::VS || ctx.stage.sw == SWStage::TES) {
check_merged_wave_info = endif_merged_wave_info = true;

4
src/amd/compiler/aco_shader_info.h
View file

@ -111,8 +111,8 @@ struct aco_shader_info {
bool has_ngg_early_prim_export;
bool image_2d_view_of_3d;
unsigned workgroup_size;
bool has_epilog; /* Only for TCS or PS. */
bool is_monolithic;
bool has_epilog; /* Only for TCS or PS. */
bool merged_shader_compiled_separately; /* GFX9+ */
struct ac_arg next_stage_pc;
struct {
bool tcs_in_out_eq;

2
src/amd/vulkan/radv_aco_shader_info.h
View file

@ -49,7 +49,7 @@ radv_aco_convert_shader_info(struct aco_shader_info *aco_info, const struct radv
ASSIGN_FIELD(has_ngg_early_prim_export);
ASSIGN_FIELD(workgroup_size);
ASSIGN_FIELD(has_epilog);
ASSIGN_FIELD(is_monolithic);
ASSIGN_FIELD(merged_shader_compiled_separately);
ASSIGN_FIELD(vs.tcs_in_out_eq);
ASSIGN_FIELD(vs.tcs_temp_only_input_mask);
ASSIGN_FIELD(vs.has_prolog);

4
src/amd/vulkan/radv_shader.h
View file

@ -311,8 +311,8 @@ struct radv_shader_info {
uint32_t user_data_0;
bool inputs_linked;
bool outputs_linked;
bool has_epilog; /* Only for TCS or PS */
bool is_monolithic; /* False only for merged shaders which are compiled separately */
bool has_epilog; /* Only for TCS or PS */
bool merged_shader_compiled_separately; /* GFX9+ */
struct {
uint8_t input_usage_mask[RADV_VERT_ATTRIB_MAX];

25
src/amd/vulkan/radv_shader_args.c
View file

@ -114,7 +114,8 @@ declare_global_input_sgprs(const struct radv_shader_info *info, const struct use
add_ud_arg(args, 1, AC_ARG_CONST_PTR_PTR, &args->descriptor_sets[0], AC_UD_INDIRECT_DESCRIPTOR_SETS);
}
if (!info->is_monolithic || (info->loads_push_constants && !user_sgpr_info->inlined_all_push_consts)) {
if (info->merged_shader_compiled_separately ||
(info->loads_push_constants && !user_sgpr_info->inlined_all_push_consts)) {
/* 1 for push constants and dynamic descriptors */
add_ud_arg(args, 1, AC_ARG_CONST_PTR, &args->ac.push_constants, AC_UD_PUSH_CONSTANTS);
}
@ -286,7 +287,7 @@ declare_ps_input_vgprs(const struct radv_shader_info *info, struct radv_shader_a
static void
declare_ngg_sgprs(const struct radv_shader_info *info, struct radv_shader_args *args, bool has_ngg_provoking_vtx)
{
if (!info->is_monolithic || has_ngg_provoking_vtx)
if (info->merged_shader_compiled_separately || has_ngg_provoking_vtx)
add_ud_arg(args, 1, AC_ARG_INT, &args->ngg_provoking_vtx, AC_UD_NGG_PROVOKING_VTX);
if (info->has_ngg_culling) {
@ -519,7 +520,7 @@ declare_shader_args(const struct radv_device *device, const struct radv_pipeline
declare_global_input_sgprs(info, user_sgpr_info, args);
if (!info->is_monolithic || info->uses_view_index) {
if (info->merged_shader_compiled_separately || info->uses_view_index) {
add_ud_arg(args, 1, AC_ARG_INT, &args->ac.view_index, AC_UD_VIEW_INDEX);
}
@ -527,11 +528,11 @@ declare_shader_args(const struct radv_device *device, const struct radv_pipeline
add_ud_arg(args, 1, AC_ARG_INT, &args->tcs_offchip_layout, AC_UD_TCS_OFFCHIP_LAYOUT);
}
if (!info->is_monolithic || info->has_epilog) {
if (info->merged_shader_compiled_separately || info->has_epilog) {
add_ud_arg(args, 1, AC_ARG_INT, &args->tcs_epilog_pc, AC_UD_TCS_EPILOG_PC);
}
if (!info->is_monolithic)
if (info->merged_shader_compiled_separately)
add_ud_arg(args, 1, AC_ARG_INT, &args->next_stage_pc, AC_UD_NEXT_STAGE_PC);
ac_add_arg(&args->ac, AC_ARG_VGPR, 1, AC_ARG_INT, &args->ac.tcs_patch_id);
@ -539,7 +540,7 @@ declare_shader_args(const struct radv_device *device, const struct radv_pipeline
declare_vs_input_vgprs(gfx_level, info, args, true);
if (!info->is_monolithic) {
if (info->merged_shader_compiled_separately) {
/* SGPRs */
ac_add_preserved(&args->ac, &args->ac.ring_offsets);
ac_add_preserved(&args->ac, &args->ac.tess_offchip_offset);
@ -640,7 +641,7 @@ declare_shader_args(const struct radv_device *device, const struct radv_pipeline
declare_global_input_sgprs(info, user_sgpr_info, args);
if (!info->is_monolithic || info->uses_view_index) {
if (info->merged_shader_compiled_separately || info->uses_view_index) {
add_ud_arg(args, 1, AC_ARG_INT, &args->ac.view_index, AC_UD_VIEW_INDEX);
}
@ -655,14 +656,14 @@ declare_shader_args(const struct radv_device *device, const struct radv_pipeline
add_ud_arg(args, 1, AC_ARG_INT, &args->ac.force_vrs_rates, AC_UD_FORCE_VRS_RATES);
}
if (!info->is_monolithic || has_shader_query)
if (info->merged_shader_compiled_separately || has_shader_query)
add_ud_arg(args, 1, AC_ARG_INT, &args->shader_query_state, AC_UD_SHADER_QUERY_STATE);
if (info->is_ngg) {
declare_ngg_sgprs(info, args, has_ngg_provoking_vtx);
}
if (!info->is_monolithic)
if (info->merged_shader_compiled_separately)
add_ud_arg(args, 1, AC_ARG_INT, &args->next_stage_pc, AC_UD_NEXT_STAGE_PC);
ac_add_arg(&args->ac, AC_ARG_VGPR, 1, AC_ARG_INT, &args->ac.gs_vtx_offset[0]);
@ -679,7 +680,7 @@ declare_shader_args(const struct radv_device *device, const struct radv_pipeline
declare_ms_input_vgprs(args);
}
if (!info->is_monolithic) {
if (info->merged_shader_compiled_separately) {
/* SGPRs */
ac_add_preserved(&args->ac, &args->ac.ring_offsets);
if (info->is_ngg) {
@ -791,14 +792,14 @@ radv_declare_shader_args(const struct radv_device *device, const struct radv_pip
uint32_t num_desc_set = util_bitcount(info->desc_set_used_mask);
if (!info->is_monolithic || remaining_sgprs < num_desc_set) {
if (info->merged_shader_compiled_separately || remaining_sgprs < num_desc_set) {
user_sgpr_info.indirect_all_descriptor_sets = true;
user_sgpr_info.remaining_sgprs--;
} else {
user_sgpr_info.remaining_sgprs -= num_desc_set;
}
if (info->is_monolithic)
if (!info->merged_shader_compiled_separately)
allocate_inline_push_consts(info, &user_sgpr_info);
declare_shader_args(device, key, info, stage, previous_stage, args, &user_sgpr_info);

12
src/amd/vulkan/radv_shader_info.c
View file

@ -1012,7 +1012,7 @@ radv_get_user_data_0(const struct radv_device *device, struct radv_shader_info *
}
static bool
radv_is_shader_monolithic(const struct radv_device *device, const struct radv_shader_info *info)
radv_is_merged_shader_compiled_separately(const struct radv_device *device, const struct radv_shader_info *info)
{
const enum amd_gfx_level gfx_level = device->physical_device->rad_info.gfx_level;
@ -1020,21 +1020,21 @@ radv_is_shader_monolithic(const struct radv_device *device, const struct radv_sh
switch (info->stage) {
case MESA_SHADER_VERTEX:
if (info->next_stage == MESA_SHADER_TESS_CTRL || info->next_stage == MESA_SHADER_GEOMETRY)
return info->outputs_linked;
return !info->outputs_linked;
break;
case MESA_SHADER_TESS_EVAL:
if (info->next_stage == MESA_SHADER_GEOMETRY)
return info->outputs_linked;
return !info->outputs_linked;
break;
case MESA_SHADER_TESS_CTRL:
case MESA_SHADER_GEOMETRY:
return info->inputs_linked;
return !info->inputs_linked;
default:
break;
}
}
return true;
return false;
}
void
@ -1160,7 +1160,7 @@ radv_nir_shader_info_pass(struct radv_device *device, const struct nir_shader *n
}
info->user_data_0 = radv_get_user_data_0(device, info);
info->is_monolithic = radv_is_shader_monolithic(device, info);
info->merged_shader_compiled_separately = radv_is_merged_shader_compiled_separately(device, info);
switch (nir->info.stage) {
case MESA_SHADER_COMPUTE:

5
src/gallium/drivers/radeonsi/si_shader_aco.c
View file

@ -73,11 +73,6 @@ si_fill_aco_shader_info(struct si_shader *shader, struct aco_shader_info *info,
if (!info->workgroup_size)
info->workgroup_size = info->wave_size;
/* is_monolithic is false when merged shader parts compiled separately, we'd better
* change the name to is_separately_compiled_merged_shader
*/
info->is_monolithic = true;
info->image_2d_view_of_3d = gfx_level == GFX9;
info->hw_stage = si_select_hw_stage(stage, key, gfx_level);