From b5d1b0d7e3e479ce3caddbbe33f56360fd42e1bc Mon Sep 17 00:00:00 2001 From: Dave Airlie Date: Thu, 10 Apr 2025 07:49:23 +1000 Subject: [PATCH] nvk: update nvidia class header files. This adds Ada/Hopper compute headers. Part-of: --- src/nouveau/headers/nvidia/classes/clc9c0.h | 848 ++++++++++++++++++ .../headers/nvidia/classes/clc9c0qmd.h | 528 +++++++++++ src/nouveau/headers/nvidia/classes/clcbc0.h | 843 +++++++++++++++++ .../headers/nvidia/classes/clcbc0qmd.h | 552 ++++++++++++ 4 files changed, 2771 insertions(+) create mode 100644 src/nouveau/headers/nvidia/classes/clc9c0.h create mode 100644 src/nouveau/headers/nvidia/classes/clc9c0qmd.h create mode 100644 src/nouveau/headers/nvidia/classes/clcbc0.h create mode 100644 src/nouveau/headers/nvidia/classes/clcbc0qmd.h diff --git a/src/nouveau/headers/nvidia/classes/clc9c0.h b/src/nouveau/headers/nvidia/classes/clc9c0.h new file mode 100644 index 00000000000..1579ddde177 --- /dev/null +++ b/src/nouveau/headers/nvidia/classes/clc9c0.h @@ -0,0 +1,848 @@ +/******************************************************************************* + Copyright (c) 2023, NVIDIA CORPORATION. All rights reserved. + + Permission is hereby granted, free of charge, to any person obtaining a + copy of this software and associated documentation files (the "Software"), + to deal in the Software without restriction, including without limitation + the rights to use, copy, modify, merge, publish, distribute, sublicense, + and/or sell copies of the Software, and to permit persons to whom the + Software is furnished to do so, subject to the following conditions: + + The above copyright notice and this permission notice shall be included in + all copies or substantial portions of the Software. + + THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR + IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, + FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL + THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER + LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING + FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER + DEALINGS IN THE SOFTWARE. + +*******************************************************************************/ + +#ifndef _cl_ada_compute_a_h_ +#define _cl_ada_compute_a_h_ + +/* AUTO GENERATED FILE -- DO NOT EDIT */ +/* Command: ../../../../class/bin/sw_header.pl ada_compute_a */ + +#include "nvtypes.h" + +#define ADA_COMPUTE_A 0xC9C0 + +#define NVC9C0_SET_OBJECT 0x0000 +#define NVC9C0_SET_OBJECT_CLASS_ID 15:0 +#define NVC9C0_SET_OBJECT_ENGINE_ID 20:16 + +#define NVC9C0_NO_OPERATION 0x0100 +#define NVC9C0_NO_OPERATION_V 31:0 + +#define NVC9C0_SET_NOTIFY_A 0x0104 +#define NVC9C0_SET_NOTIFY_A_ADDRESS_UPPER 7:0 + +#define NVC9C0_SET_NOTIFY_B 0x0108 +#define NVC9C0_SET_NOTIFY_B_ADDRESS_LOWER 31:0 + +#define NVC9C0_NOTIFY 0x010c +#define NVC9C0_NOTIFY_TYPE 31:0 +#define NVC9C0_NOTIFY_TYPE_WRITE_ONLY 0x00000000 +#define NVC9C0_NOTIFY_TYPE_WRITE_THEN_AWAKEN 0x00000001 + +#define NVC9C0_WAIT_FOR_IDLE 0x0110 +#define NVC9C0_WAIT_FOR_IDLE_V 31:0 + +#define NVC9C0_LOAD_MME_INSTRUCTION_RAM_POINTER 0x0114 +#define NVC9C0_LOAD_MME_INSTRUCTION_RAM_POINTER_V 31:0 + +#define NVC9C0_LOAD_MME_INSTRUCTION_RAM 0x0118 +#define NVC9C0_LOAD_MME_INSTRUCTION_RAM_V 31:0 + +#define NVC9C0_LOAD_MME_START_ADDRESS_RAM_POINTER 0x011c +#define NVC9C0_LOAD_MME_START_ADDRESS_RAM_POINTER_V 31:0 + +#define NVC9C0_LOAD_MME_START_ADDRESS_RAM 0x0120 +#define NVC9C0_LOAD_MME_START_ADDRESS_RAM_V 31:0 + +#define NVC9C0_SET_MME_SHADOW_RAM_CONTROL 0x0124 +#define NVC9C0_SET_MME_SHADOW_RAM_CONTROL_MODE 1:0 +#define NVC9C0_SET_MME_SHADOW_RAM_CONTROL_MODE_METHOD_TRACK 0x00000000 +#define NVC9C0_SET_MME_SHADOW_RAM_CONTROL_MODE_METHOD_TRACK_WITH_FILTER 0x00000001 +#define NVC9C0_SET_MME_SHADOW_RAM_CONTROL_MODE_METHOD_PASSTHROUGH 0x00000002 +#define NVC9C0_SET_MME_SHADOW_RAM_CONTROL_MODE_METHOD_REPLAY 0x00000003 + +#define NVC9C0_SET_GLOBAL_RENDER_ENABLE_A 0x0130 +#define NVC9C0_SET_GLOBAL_RENDER_ENABLE_A_OFFSET_UPPER 7:0 + +#define NVC9C0_SET_GLOBAL_RENDER_ENABLE_B 0x0134 +#define NVC9C0_SET_GLOBAL_RENDER_ENABLE_B_OFFSET_LOWER 31:0 + +#define NVC9C0_SET_GLOBAL_RENDER_ENABLE_C 0x0138 +#define NVC9C0_SET_GLOBAL_RENDER_ENABLE_C_MODE 2:0 +#define NVC9C0_SET_GLOBAL_RENDER_ENABLE_C_MODE_FALSE 0x00000000 +#define NVC9C0_SET_GLOBAL_RENDER_ENABLE_C_MODE_TRUE 0x00000001 +#define NVC9C0_SET_GLOBAL_RENDER_ENABLE_C_MODE_CONDITIONAL 0x00000002 +#define NVC9C0_SET_GLOBAL_RENDER_ENABLE_C_MODE_RENDER_IF_EQUAL 0x00000003 +#define NVC9C0_SET_GLOBAL_RENDER_ENABLE_C_MODE_RENDER_IF_NOT_EQUAL 0x00000004 + +#define NVC9C0_SEND_GO_IDLE 0x013c +#define NVC9C0_SEND_GO_IDLE_V 31:0 + +#define NVC9C0_PM_TRIGGER 0x0140 +#define NVC9C0_PM_TRIGGER_V 31:0 + +#define NVC9C0_PM_TRIGGER_WFI 0x0144 +#define NVC9C0_PM_TRIGGER_WFI_V 31:0 + +#define NVC9C0_FE_ATOMIC_SEQUENCE_BEGIN 0x0148 +#define NVC9C0_FE_ATOMIC_SEQUENCE_BEGIN_V 31:0 + +#define NVC9C0_FE_ATOMIC_SEQUENCE_END 0x014c +#define NVC9C0_FE_ATOMIC_SEQUENCE_END_V 31:0 + +#define NVC9C0_SET_INSTRUMENTATION_METHOD_HEADER 0x0150 +#define NVC9C0_SET_INSTRUMENTATION_METHOD_HEADER_V 31:0 + +#define NVC9C0_SET_INSTRUMENTATION_METHOD_DATA 0x0154 +#define NVC9C0_SET_INSTRUMENTATION_METHOD_DATA_V 31:0 + +#define NVC9C0_SET_REPORT_SEMAPHORE_PAYLOAD_LOWER 0x0158 +#define NVC9C0_SET_REPORT_SEMAPHORE_PAYLOAD_LOWER_PAYLOAD_LOWER 31:0 + +#define NVC9C0_SET_REPORT_SEMAPHORE_PAYLOAD_UPPER 0x015c +#define NVC9C0_SET_REPORT_SEMAPHORE_PAYLOAD_UPPER_PAYLOAD_UPPER 31:0 + +#define NVC9C0_SET_REPORT_SEMAPHORE_ADDRESS_LOWER 0x0160 +#define NVC9C0_SET_REPORT_SEMAPHORE_ADDRESS_LOWER_LOWER 31:0 + +#define NVC9C0_SET_REPORT_SEMAPHORE_ADDRESS_UPPER 0x0164 +#define NVC9C0_SET_REPORT_SEMAPHORE_ADDRESS_UPPER_UPPER 7:0 + +#define NVC9C0_REPORT_SEMAPHORE_EXECUTE 0x0168 +#define NVC9C0_REPORT_SEMAPHORE_EXECUTE_OPERATION 1:0 +#define NVC9C0_REPORT_SEMAPHORE_EXECUTE_OPERATION_RELEASE 0x00000000 +#define NVC9C0_REPORT_SEMAPHORE_EXECUTE_OPERATION_ACQUIRE 0x00000001 +#define NVC9C0_REPORT_SEMAPHORE_EXECUTE_OPERATION_REPORT_ONLY 0x00000002 +#define NVC9C0_REPORT_SEMAPHORE_EXECUTE_OPERATION_TRAP 0x00000003 +#define NVC9C0_REPORT_SEMAPHORE_EXECUTE_AWAKEN_ENABLE 2:2 +#define NVC9C0_REPORT_SEMAPHORE_EXECUTE_AWAKEN_ENABLE_FALSE 0x00000000 +#define NVC9C0_REPORT_SEMAPHORE_EXECUTE_AWAKEN_ENABLE_TRUE 0x00000001 +#define NVC9C0_REPORT_SEMAPHORE_EXECUTE_STRUCTURE_SIZE 4:3 +#define NVC9C0_REPORT_SEMAPHORE_EXECUTE_STRUCTURE_SIZE_SEMAPHORE_FOUR_WORDS 0x00000000 +#define NVC9C0_REPORT_SEMAPHORE_EXECUTE_STRUCTURE_SIZE_SEMAPHORE_ONE_WORD 0x00000001 +#define NVC9C0_REPORT_SEMAPHORE_EXECUTE_STRUCTURE_SIZE_SEMAPHORE_TWO_WORDS 0x00000002 +#define NVC9C0_REPORT_SEMAPHORE_EXECUTE_FLUSH_DISABLE 5:5 +#define NVC9C0_REPORT_SEMAPHORE_EXECUTE_FLUSH_DISABLE_FALSE 0x00000000 +#define NVC9C0_REPORT_SEMAPHORE_EXECUTE_FLUSH_DISABLE_TRUE 0x00000001 +#define NVC9C0_REPORT_SEMAPHORE_EXECUTE_REDUCTION_ENABLE 6:6 +#define NVC9C0_REPORT_SEMAPHORE_EXECUTE_REDUCTION_ENABLE_FALSE 0x00000000 +#define NVC9C0_REPORT_SEMAPHORE_EXECUTE_REDUCTION_ENABLE_TRUE 0x00000001 +#define NVC9C0_REPORT_SEMAPHORE_EXECUTE_REDUCTION_OP 9:7 +#define NVC9C0_REPORT_SEMAPHORE_EXECUTE_REDUCTION_OP_RED_ADD 0x00000000 +#define NVC9C0_REPORT_SEMAPHORE_EXECUTE_REDUCTION_OP_RED_MIN 0x00000001 +#define NVC9C0_REPORT_SEMAPHORE_EXECUTE_REDUCTION_OP_RED_MAX 0x00000002 +#define NVC9C0_REPORT_SEMAPHORE_EXECUTE_REDUCTION_OP_RED_INC 0x00000003 +#define NVC9C0_REPORT_SEMAPHORE_EXECUTE_REDUCTION_OP_RED_DEC 0x00000004 +#define NVC9C0_REPORT_SEMAPHORE_EXECUTE_REDUCTION_OP_RED_AND 0x00000005 +#define NVC9C0_REPORT_SEMAPHORE_EXECUTE_REDUCTION_OP_RED_OR 0x00000006 +#define NVC9C0_REPORT_SEMAPHORE_EXECUTE_REDUCTION_OP_RED_XOR 0x00000007 +#define NVC9C0_REPORT_SEMAPHORE_EXECUTE_REDUCTION_FORMAT 11:10 +#define NVC9C0_REPORT_SEMAPHORE_EXECUTE_REDUCTION_FORMAT_UNSIGNED 0x00000000 +#define NVC9C0_REPORT_SEMAPHORE_EXECUTE_REDUCTION_FORMAT_SIGNED 0x00000001 +#define NVC9C0_REPORT_SEMAPHORE_EXECUTE_PAYLOAD_SIZE64 12:12 +#define NVC9C0_REPORT_SEMAPHORE_EXECUTE_PAYLOAD_SIZE64_FALSE 0x00000000 +#define NVC9C0_REPORT_SEMAPHORE_EXECUTE_PAYLOAD_SIZE64_TRUE 0x00000001 +#define NVC9C0_REPORT_SEMAPHORE_EXECUTE_TRAP_TYPE 14:13 +#define NVC9C0_REPORT_SEMAPHORE_EXECUTE_TRAP_TYPE_TRAP_NONE 0x00000000 +#define NVC9C0_REPORT_SEMAPHORE_EXECUTE_TRAP_TYPE_TRAP_UNCONDITIONAL 0x00000001 +#define NVC9C0_REPORT_SEMAPHORE_EXECUTE_TRAP_TYPE_TRAP_CONDITIONAL 0x00000002 +#define NVC9C0_REPORT_SEMAPHORE_EXECUTE_TRAP_TYPE_TRAP_CONDITIONAL_EXT 0x00000003 + +#define NVC9C0_LINE_LENGTH_IN 0x0180 +#define NVC9C0_LINE_LENGTH_IN_VALUE 31:0 + +#define NVC9C0_LINE_COUNT 0x0184 +#define NVC9C0_LINE_COUNT_VALUE 31:0 + +#define NVC9C0_OFFSET_OUT_UPPER 0x0188 +#define NVC9C0_OFFSET_OUT_UPPER_VALUE 16:0 + +#define NVC9C0_OFFSET_OUT 0x018c +#define NVC9C0_OFFSET_OUT_VALUE 31:0 + +#define NVC9C0_PITCH_OUT 0x0190 +#define NVC9C0_PITCH_OUT_VALUE 31:0 + +#define NVC9C0_SET_DST_BLOCK_SIZE 0x0194 +#define NVC9C0_SET_DST_BLOCK_SIZE_WIDTH 3:0 +#define NVC9C0_SET_DST_BLOCK_SIZE_WIDTH_ONE_GOB 0x00000000 +#define NVC9C0_SET_DST_BLOCK_SIZE_HEIGHT 7:4 +#define NVC9C0_SET_DST_BLOCK_SIZE_HEIGHT_ONE_GOB 0x00000000 +#define NVC9C0_SET_DST_BLOCK_SIZE_HEIGHT_TWO_GOBS 0x00000001 +#define NVC9C0_SET_DST_BLOCK_SIZE_HEIGHT_FOUR_GOBS 0x00000002 +#define NVC9C0_SET_DST_BLOCK_SIZE_HEIGHT_EIGHT_GOBS 0x00000003 +#define NVC9C0_SET_DST_BLOCK_SIZE_HEIGHT_SIXTEEN_GOBS 0x00000004 +#define NVC9C0_SET_DST_BLOCK_SIZE_HEIGHT_THIRTYTWO_GOBS 0x00000005 +#define NVC9C0_SET_DST_BLOCK_SIZE_DEPTH 11:8 +#define NVC9C0_SET_DST_BLOCK_SIZE_DEPTH_ONE_GOB 0x00000000 +#define NVC9C0_SET_DST_BLOCK_SIZE_DEPTH_TWO_GOBS 0x00000001 +#define NVC9C0_SET_DST_BLOCK_SIZE_DEPTH_FOUR_GOBS 0x00000002 +#define NVC9C0_SET_DST_BLOCK_SIZE_DEPTH_EIGHT_GOBS 0x00000003 +#define NVC9C0_SET_DST_BLOCK_SIZE_DEPTH_SIXTEEN_GOBS 0x00000004 +#define NVC9C0_SET_DST_BLOCK_SIZE_DEPTH_THIRTYTWO_GOBS 0x00000005 + +#define NVC9C0_SET_DST_WIDTH 0x0198 +#define NVC9C0_SET_DST_WIDTH_V 31:0 + +#define NVC9C0_SET_DST_HEIGHT 0x019c +#define NVC9C0_SET_DST_HEIGHT_V 31:0 + +#define NVC9C0_SET_DST_DEPTH 0x01a0 +#define NVC9C0_SET_DST_DEPTH_V 31:0 + +#define NVC9C0_SET_DST_LAYER 0x01a4 +#define NVC9C0_SET_DST_LAYER_V 31:0 + +#define NVC9C0_SET_DST_ORIGIN_BYTES_X 0x01a8 +#define NVC9C0_SET_DST_ORIGIN_BYTES_X_V 20:0 + +#define NVC9C0_SET_DST_ORIGIN_SAMPLES_Y 0x01ac +#define NVC9C0_SET_DST_ORIGIN_SAMPLES_Y_V 16:0 + +#define NVC9C0_LAUNCH_DMA 0x01b0 +#define NVC9C0_LAUNCH_DMA_DST_MEMORY_LAYOUT 0:0 +#define NVC9C0_LAUNCH_DMA_DST_MEMORY_LAYOUT_BLOCKLINEAR 0x00000000 +#define NVC9C0_LAUNCH_DMA_DST_MEMORY_LAYOUT_PITCH 0x00000001 +#define NVC9C0_LAUNCH_DMA_COMPLETION_TYPE 5:4 +#define NVC9C0_LAUNCH_DMA_COMPLETION_TYPE_FLUSH_DISABLE 0x00000000 +#define NVC9C0_LAUNCH_DMA_COMPLETION_TYPE_FLUSH_ONLY 0x00000001 +#define NVC9C0_LAUNCH_DMA_COMPLETION_TYPE_RELEASE_SEMAPHORE 0x00000002 +#define NVC9C0_LAUNCH_DMA_INTERRUPT_TYPE 9:8 +#define NVC9C0_LAUNCH_DMA_INTERRUPT_TYPE_NONE 0x00000000 +#define NVC9C0_LAUNCH_DMA_INTERRUPT_TYPE_INTERRUPT 0x00000001 +#define NVC9C0_LAUNCH_DMA_SEMAPHORE_STRUCT_SIZE 12:12 +#define NVC9C0_LAUNCH_DMA_SEMAPHORE_STRUCT_SIZE_FOUR_WORDS 0x00000000 +#define NVC9C0_LAUNCH_DMA_SEMAPHORE_STRUCT_SIZE_ONE_WORD 0x00000001 +#define NVC9C0_LAUNCH_DMA_REDUCTION_ENABLE 1:1 +#define NVC9C0_LAUNCH_DMA_REDUCTION_ENABLE_FALSE 0x00000000 +#define NVC9C0_LAUNCH_DMA_REDUCTION_ENABLE_TRUE 0x00000001 +#define NVC9C0_LAUNCH_DMA_REDUCTION_OP 15:13 +#define NVC9C0_LAUNCH_DMA_REDUCTION_OP_RED_ADD 0x00000000 +#define NVC9C0_LAUNCH_DMA_REDUCTION_OP_RED_MIN 0x00000001 +#define NVC9C0_LAUNCH_DMA_REDUCTION_OP_RED_MAX 0x00000002 +#define NVC9C0_LAUNCH_DMA_REDUCTION_OP_RED_INC 0x00000003 +#define NVC9C0_LAUNCH_DMA_REDUCTION_OP_RED_DEC 0x00000004 +#define NVC9C0_LAUNCH_DMA_REDUCTION_OP_RED_AND 0x00000005 +#define NVC9C0_LAUNCH_DMA_REDUCTION_OP_RED_OR 0x00000006 +#define NVC9C0_LAUNCH_DMA_REDUCTION_OP_RED_XOR 0x00000007 +#define NVC9C0_LAUNCH_DMA_REDUCTION_FORMAT 3:2 +#define NVC9C0_LAUNCH_DMA_REDUCTION_FORMAT_UNSIGNED_32 0x00000000 +#define NVC9C0_LAUNCH_DMA_REDUCTION_FORMAT_SIGNED_32 0x00000001 +#define NVC9C0_LAUNCH_DMA_SYSMEMBAR_DISABLE 6:6 +#define NVC9C0_LAUNCH_DMA_SYSMEMBAR_DISABLE_FALSE 0x00000000 +#define NVC9C0_LAUNCH_DMA_SYSMEMBAR_DISABLE_TRUE 0x00000001 + +#define NVC9C0_LOAD_INLINE_DATA 0x01b4 +#define NVC9C0_LOAD_INLINE_DATA_V 31:0 + +#define NVC9C0_SET_I2M_SEMAPHORE_A 0x01dc +#define NVC9C0_SET_I2M_SEMAPHORE_A_OFFSET_UPPER 7:0 + +#define NVC9C0_SET_I2M_SEMAPHORE_B 0x01e0 +#define NVC9C0_SET_I2M_SEMAPHORE_B_OFFSET_LOWER 31:0 + +#define NVC9C0_SET_I2M_SEMAPHORE_C 0x01e4 +#define NVC9C0_SET_I2M_SEMAPHORE_C_PAYLOAD 31:0 + +#define NVC9C0_SET_SM_SCG_CONTROL 0x01e8 +#define NVC9C0_SET_SM_SCG_CONTROL_COMPUTE_IN_GRAPHICS 0:0 +#define NVC9C0_SET_SM_SCG_CONTROL_COMPUTE_IN_GRAPHICS_FALSE 0x00000000 +#define NVC9C0_SET_SM_SCG_CONTROL_COMPUTE_IN_GRAPHICS_TRUE 0x00000001 + +#define NVC9C0_SET_MME_SWITCH_STATE 0x01ec +#define NVC9C0_SET_MME_SWITCH_STATE_VALID 0:0 +#define NVC9C0_SET_MME_SWITCH_STATE_VALID_FALSE 0x00000000 +#define NVC9C0_SET_MME_SWITCH_STATE_VALID_TRUE 0x00000001 +#define NVC9C0_SET_MME_SWITCH_STATE_SAVE_MACRO 11:4 +#define NVC9C0_SET_MME_SWITCH_STATE_RESTORE_MACRO 19:12 + +#define NVC9C0_SET_I2M_SPARE_NOOP00 0x01f0 +#define NVC9C0_SET_I2M_SPARE_NOOP00_V 31:0 + +#define NVC9C0_SET_I2M_SPARE_NOOP01 0x01f4 +#define NVC9C0_SET_I2M_SPARE_NOOP01_V 31:0 + +#define NVC9C0_SET_I2M_SPARE_NOOP02 0x01f8 +#define NVC9C0_SET_I2M_SPARE_NOOP02_V 31:0 + +#define NVC9C0_SET_I2M_SPARE_NOOP03 0x01fc +#define NVC9C0_SET_I2M_SPARE_NOOP03_V 31:0 + +#define NVC9C0_SET_VALID_SPAN_OVERFLOW_AREA_A 0x0200 +#define NVC9C0_SET_VALID_SPAN_OVERFLOW_AREA_A_ADDRESS_UPPER 7:0 + +#define NVC9C0_SET_VALID_SPAN_OVERFLOW_AREA_B 0x0204 +#define NVC9C0_SET_VALID_SPAN_OVERFLOW_AREA_B_ADDRESS_LOWER 31:0 + +#define NVC9C0_SET_VALID_SPAN_OVERFLOW_AREA_C 0x0208 +#define NVC9C0_SET_VALID_SPAN_OVERFLOW_AREA_C_SIZE 31:0 + +#define NVC9C0_PERFMON_TRANSFER 0x0210 +#define NVC9C0_PERFMON_TRANSFER_V 31:0 + +#define NVC9C0_SET_QMD_VIRTUALIZATION_BASE_A 0x0214 +#define NVC9C0_SET_QMD_VIRTUALIZATION_BASE_A_ADDRESS_UPPER 7:0 + +#define NVC9C0_SET_QMD_VIRTUALIZATION_BASE_B 0x0218 +#define NVC9C0_SET_QMD_VIRTUALIZATION_BASE_B_ADDRESS_LOWER 31:0 + +#define NVC9C0_INVALIDATE_SHADER_CACHES 0x021c +#define NVC9C0_INVALIDATE_SHADER_CACHES_INSTRUCTION 0:0 +#define NVC9C0_INVALIDATE_SHADER_CACHES_INSTRUCTION_FALSE 0x00000000 +#define NVC9C0_INVALIDATE_SHADER_CACHES_INSTRUCTION_TRUE 0x00000001 +#define NVC9C0_INVALIDATE_SHADER_CACHES_DATA 4:4 +#define NVC9C0_INVALIDATE_SHADER_CACHES_DATA_FALSE 0x00000000 +#define NVC9C0_INVALIDATE_SHADER_CACHES_DATA_TRUE 0x00000001 +#define NVC9C0_INVALIDATE_SHADER_CACHES_CONSTANT 12:12 +#define NVC9C0_INVALIDATE_SHADER_CACHES_CONSTANT_FALSE 0x00000000 +#define NVC9C0_INVALIDATE_SHADER_CACHES_CONSTANT_TRUE 0x00000001 +#define NVC9C0_INVALIDATE_SHADER_CACHES_LOCKS 1:1 +#define NVC9C0_INVALIDATE_SHADER_CACHES_LOCKS_FALSE 0x00000000 +#define NVC9C0_INVALIDATE_SHADER_CACHES_LOCKS_TRUE 0x00000001 +#define NVC9C0_INVALIDATE_SHADER_CACHES_FLUSH_DATA 2:2 +#define NVC9C0_INVALIDATE_SHADER_CACHES_FLUSH_DATA_FALSE 0x00000000 +#define NVC9C0_INVALIDATE_SHADER_CACHES_FLUSH_DATA_TRUE 0x00000001 + +#define NVC9C0_SET_RESERVED_SW_METHOD00 0x0220 +#define NVC9C0_SET_RESERVED_SW_METHOD00_V 31:0 + +#define NVC9C0_SET_RESERVED_SW_METHOD01 0x0224 +#define NVC9C0_SET_RESERVED_SW_METHOD01_V 31:0 + +#define NVC9C0_SET_RESERVED_SW_METHOD02 0x0228 +#define NVC9C0_SET_RESERVED_SW_METHOD02_V 31:0 + +#define NVC9C0_SET_RESERVED_SW_METHOD03 0x022c +#define NVC9C0_SET_RESERVED_SW_METHOD03_V 31:0 + +#define NVC9C0_SET_RESERVED_SW_METHOD04 0x0230 +#define NVC9C0_SET_RESERVED_SW_METHOD04_V 31:0 + +#define NVC9C0_SET_RESERVED_SW_METHOD05 0x0234 +#define NVC9C0_SET_RESERVED_SW_METHOD05_V 31:0 + +#define NVC9C0_SET_RESERVED_SW_METHOD06 0x0238 +#define NVC9C0_SET_RESERVED_SW_METHOD06_V 31:0 + +#define NVC9C0_SET_RESERVED_SW_METHOD07 0x023c +#define NVC9C0_SET_RESERVED_SW_METHOD07_V 31:0 + +#define NVC9C0_INVALIDATE_TEXTURE_HEADER_CACHE_NO_WFI 0x0244 +#define NVC9C0_INVALIDATE_TEXTURE_HEADER_CACHE_NO_WFI_LINES 0:0 +#define NVC9C0_INVALIDATE_TEXTURE_HEADER_CACHE_NO_WFI_LINES_ALL 0x00000000 +#define NVC9C0_INVALIDATE_TEXTURE_HEADER_CACHE_NO_WFI_LINES_ONE 0x00000001 +#define NVC9C0_INVALIDATE_TEXTURE_HEADER_CACHE_NO_WFI_TAG 25:4 + +#define NVC9C0_SET_CWD_REF_COUNTER 0x0248 +#define NVC9C0_SET_CWD_REF_COUNTER_SELECT 5:0 +#define NVC9C0_SET_CWD_REF_COUNTER_VALUE 23:8 + +#define NVC9C0_SET_RESERVED_SW_METHOD08 0x024c +#define NVC9C0_SET_RESERVED_SW_METHOD08_V 31:0 + +#define NVC9C0_SET_RESERVED_SW_METHOD09 0x0250 +#define NVC9C0_SET_RESERVED_SW_METHOD09_V 31:0 + +#define NVC9C0_SET_RESERVED_SW_METHOD10 0x0254 +#define NVC9C0_SET_RESERVED_SW_METHOD10_V 31:0 + +#define NVC9C0_SET_RESERVED_SW_METHOD11 0x0258 +#define NVC9C0_SET_RESERVED_SW_METHOD11_V 31:0 + +#define NVC9C0_SET_RESERVED_SW_METHOD12 0x025c +#define NVC9C0_SET_RESERVED_SW_METHOD12_V 31:0 + +#define NVC9C0_SET_RESERVED_SW_METHOD13 0x0260 +#define NVC9C0_SET_RESERVED_SW_METHOD13_V 31:0 + +#define NVC9C0_SET_RESERVED_SW_METHOD14 0x0264 +#define NVC9C0_SET_RESERVED_SW_METHOD14_V 31:0 + +#define NVC9C0_SET_RESERVED_SW_METHOD15 0x0268 +#define NVC9C0_SET_RESERVED_SW_METHOD15_V 31:0 + +#define NVC9C0_SET_SCG_CONTROL 0x0270 +#define NVC9C0_SET_SCG_CONTROL_COMPUTE1_MAX_SM_COUNT 8:0 +#define NVC9C0_SET_SCG_CONTROL_COMPUTE1_MIN_SM_COUNT 20:12 +#define NVC9C0_SET_SCG_CONTROL_DISABLE_COMPUTE1_LIMIT_IN_ALL_COMPUTE 24:24 +#define NVC9C0_SET_SCG_CONTROL_DISABLE_COMPUTE1_LIMIT_IN_ALL_COMPUTE_FALSE 0x00000000 +#define NVC9C0_SET_SCG_CONTROL_DISABLE_COMPUTE1_LIMIT_IN_ALL_COMPUTE_TRUE 0x00000001 + +#define NVC9C0_SET_COMPUTE_CLASS_VERSION 0x0280 +#define NVC9C0_SET_COMPUTE_CLASS_VERSION_CURRENT 15:0 +#define NVC9C0_SET_COMPUTE_CLASS_VERSION_OLDEST_SUPPORTED 31:16 + +#define NVC9C0_CHECK_COMPUTE_CLASS_VERSION 0x0284 +#define NVC9C0_CHECK_COMPUTE_CLASS_VERSION_CURRENT 15:0 +#define NVC9C0_CHECK_COMPUTE_CLASS_VERSION_OLDEST_SUPPORTED 31:16 + +#define NVC9C0_SET_QMD_VERSION 0x0288 +#define NVC9C0_SET_QMD_VERSION_CURRENT 15:0 +#define NVC9C0_SET_QMD_VERSION_OLDEST_SUPPORTED 31:16 + +#define NVC9C0_CHECK_QMD_VERSION 0x0290 +#define NVC9C0_CHECK_QMD_VERSION_CURRENT 15:0 +#define NVC9C0_CHECK_QMD_VERSION_OLDEST_SUPPORTED 31:16 + +#define NVC9C0_INVALIDATE_SKED_CACHES 0x0298 +#define NVC9C0_INVALIDATE_SKED_CACHES_V 0:0 + +#define NVC9C0_SET_QMD_VIRTUALIZATION_CONTROL 0x029c +#define NVC9C0_SET_QMD_VIRTUALIZATION_CONTROL_CONSTANT_BUFFER_MASK 7:0 +#define NVC9C0_SET_QMD_VIRTUALIZATION_CONTROL_I2M_ADDR_ENABLE 8:8 +#define NVC9C0_SET_QMD_VIRTUALIZATION_CONTROL_I2M_ADDR_ENABLE_FALSE 0x00000000 +#define NVC9C0_SET_QMD_VIRTUALIZATION_CONTROL_I2M_ADDR_ENABLE_TRUE 0x00000001 +#define NVC9C0_SET_QMD_VIRTUALIZATION_CONTROL_I2M_CONSTANT_BUFFER_ENABLE 12:12 +#define NVC9C0_SET_QMD_VIRTUALIZATION_CONTROL_I2M_CONSTANT_BUFFER_ENABLE_FALSE 0x00000000 +#define NVC9C0_SET_QMD_VIRTUALIZATION_CONTROL_I2M_CONSTANT_BUFFER_ENABLE_TRUE 0x00000001 +#define NVC9C0_SET_QMD_VIRTUALIZATION_CONTROL_I2M_DEPENDENT_ENABLE 9:9 +#define NVC9C0_SET_QMD_VIRTUALIZATION_CONTROL_I2M_DEPENDENT_ENABLE_FALSE 0x00000000 +#define NVC9C0_SET_QMD_VIRTUALIZATION_CONTROL_I2M_DEPENDENT_ENABLE_TRUE 0x00000001 +#define NVC9C0_SET_QMD_VIRTUALIZATION_CONTROL_IQ2M_ADDR_ENABLE 16:16 +#define NVC9C0_SET_QMD_VIRTUALIZATION_CONTROL_IQ2M_ADDR_ENABLE_FALSE 0x00000000 +#define NVC9C0_SET_QMD_VIRTUALIZATION_CONTROL_IQ2M_ADDR_ENABLE_TRUE 0x00000001 +#define NVC9C0_SET_QMD_VIRTUALIZATION_CONTROL_IQ2M_CONSTANT_BUFFER_ENABLE 20:20 +#define NVC9C0_SET_QMD_VIRTUALIZATION_CONTROL_IQ2M_CONSTANT_BUFFER_ENABLE_FALSE 0x00000000 +#define NVC9C0_SET_QMD_VIRTUALIZATION_CONTROL_IQ2M_CONSTANT_BUFFER_ENABLE_TRUE 0x00000001 +#define NVC9C0_SET_QMD_VIRTUALIZATION_CONTROL_IQ2M_DEPENDENT_ENABLE 10:10 +#define NVC9C0_SET_QMD_VIRTUALIZATION_CONTROL_IQ2M_DEPENDENT_ENABLE_FALSE 0x00000000 +#define NVC9C0_SET_QMD_VIRTUALIZATION_CONTROL_IQ2M_DEPENDENT_ENABLE_TRUE 0x00000001 +#define NVC9C0_SET_QMD_VIRTUALIZATION_CONTROL_SEND_PCAS_ENABLE 24:24 +#define NVC9C0_SET_QMD_VIRTUALIZATION_CONTROL_SEND_PCAS_ENABLE_FALSE 0x00000000 +#define NVC9C0_SET_QMD_VIRTUALIZATION_CONTROL_SEND_PCAS_ENABLE_TRUE 0x00000001 + +#define NVC9C0_SET_SHADER_SHARED_MEMORY_WINDOW_A 0x02a0 +#define NVC9C0_SET_SHADER_SHARED_MEMORY_WINDOW_A_BASE_ADDRESS_UPPER 16:0 + +#define NVC9C0_SET_SHADER_SHARED_MEMORY_WINDOW_B 0x02a4 +#define NVC9C0_SET_SHADER_SHARED_MEMORY_WINDOW_B_BASE_ADDRESS 31:0 + +#define NVC9C0_SCG_HYSTERESIS_CONTROL 0x02a8 +#define NVC9C0_SCG_HYSTERESIS_CONTROL_USE_TIMEOUT_ONCE 0:0 +#define NVC9C0_SCG_HYSTERESIS_CONTROL_USE_TIMEOUT_ONCE_FALSE 0x00000000 +#define NVC9C0_SCG_HYSTERESIS_CONTROL_USE_TIMEOUT_ONCE_TRUE 0x00000001 +#define NVC9C0_SCG_HYSTERESIS_CONTROL_USE_NULL_TIMEOUT_ONCE 1:1 +#define NVC9C0_SCG_HYSTERESIS_CONTROL_USE_NULL_TIMEOUT_ONCE_FALSE 0x00000000 +#define NVC9C0_SCG_HYSTERESIS_CONTROL_USE_NULL_TIMEOUT_ONCE_TRUE 0x00000001 + +#define NVC9C0_SET_CWD_SLOT_COUNT 0x02b0 +#define NVC9C0_SET_CWD_SLOT_COUNT_V 7:0 + +#define NVC9C0_SEND_PCAS_A 0x02b4 +#define NVC9C0_SEND_PCAS_A_QMD_ADDRESS_SHIFTED8 31:0 + +#define NVC9C0_SEND_PCAS_B 0x02b8 +#define NVC9C0_SEND_PCAS_B_FROM 23:0 +#define NVC9C0_SEND_PCAS_B_DELTA 31:24 + +#define NVC9C0_SEND_SIGNALING_PCAS_B 0x02bc +#define NVC9C0_SEND_SIGNALING_PCAS_B_INVALIDATE 0:0 +#define NVC9C0_SEND_SIGNALING_PCAS_B_INVALIDATE_FALSE 0x00000000 +#define NVC9C0_SEND_SIGNALING_PCAS_B_INVALIDATE_TRUE 0x00000001 +#define NVC9C0_SEND_SIGNALING_PCAS_B_SCHEDULE 1:1 +#define NVC9C0_SEND_SIGNALING_PCAS_B_SCHEDULE_FALSE 0x00000000 +#define NVC9C0_SEND_SIGNALING_PCAS_B_SCHEDULE_TRUE 0x00000001 + +#define NVC9C0_SEND_SIGNALING_PCAS2_B 0x02c0 +#define NVC9C0_SEND_SIGNALING_PCAS2_B_PCAS_ACTION 3:0 +#define NVC9C0_SEND_SIGNALING_PCAS2_B_PCAS_ACTION_NOP 0x00000000 +#define NVC9C0_SEND_SIGNALING_PCAS2_B_PCAS_ACTION_INVALIDATE 0x00000001 +#define NVC9C0_SEND_SIGNALING_PCAS2_B_PCAS_ACTION_SCHEDULE 0x00000002 +#define NVC9C0_SEND_SIGNALING_PCAS2_B_PCAS_ACTION_INVALIDATE_COPY_SCHEDULE 0x00000003 +#define NVC9C0_SEND_SIGNALING_PCAS2_B_PCAS_ACTION_INCREMENT_PUT 0x00000006 +#define NVC9C0_SEND_SIGNALING_PCAS2_B_PCAS_ACTION_DECREMENT_DEPENDENCE 0x00000007 +#define NVC9C0_SEND_SIGNALING_PCAS2_B_PCAS_ACTION_PREFETCH 0x00000008 +#define NVC9C0_SEND_SIGNALING_PCAS2_B_PCAS_ACTION_PREFETCH_SCHEDULE 0x00000009 +#define NVC9C0_SEND_SIGNALING_PCAS2_B_PCAS_ACTION_INVALIDATE_PREFETCH_COPY_SCHEDULE 0x0000000A +#define NVC9C0_SEND_SIGNALING_PCAS2_B_PCAS_ACTION_INVALIDATE_PREFETCH_COPY_FORCE_REQUIRE_SCHEDULING 0x0000000B +#define NVC9C0_SEND_SIGNALING_PCAS2_B_PCAS_ACTION_INCREMENT_DEPENDENCE 0x0000000C +#define NVC9C0_SEND_SIGNALING_PCAS2_B_PCAS_ACTION_INCREMENT_CWD_REF_COUNTER 0x0000000D +#define NVC9C0_SEND_SIGNALING_PCAS2_B_SELECT 13:8 +#define NVC9C0_SEND_SIGNALING_PCAS2_B_OFFSET_MINUS_ONE 23:14 + +#define NVC9C0_SET_SKED_CACHE_CONTROL 0x02cc +#define NVC9C0_SET_SKED_CACHE_CONTROL_IGNORE_VEID 0:0 +#define NVC9C0_SET_SKED_CACHE_CONTROL_IGNORE_VEID_FALSE 0x00000000 +#define NVC9C0_SET_SKED_CACHE_CONTROL_IGNORE_VEID_TRUE 0x00000001 + +#define NVC9C0_SET_SHADER_LOCAL_MEMORY_NON_THROTTLED_A 0x02e4 +#define NVC9C0_SET_SHADER_LOCAL_MEMORY_NON_THROTTLED_A_SIZE_UPPER 7:0 + +#define NVC9C0_SET_SHADER_LOCAL_MEMORY_NON_THROTTLED_B 0x02e8 +#define NVC9C0_SET_SHADER_LOCAL_MEMORY_NON_THROTTLED_B_SIZE_LOWER 31:0 + +#define NVC9C0_SET_SHADER_LOCAL_MEMORY_NON_THROTTLED_C 0x02ec +#define NVC9C0_SET_SHADER_LOCAL_MEMORY_NON_THROTTLED_C_MAX_SM_COUNT 8:0 + +#define NVC9C0_SET_SPA_VERSION 0x0310 +#define NVC9C0_SET_SPA_VERSION_MINOR 7:0 +#define NVC9C0_SET_SPA_VERSION_MAJOR 15:8 + +#define NVC9C0_SET_INLINE_QMD_ADDRESS_A 0x0318 +#define NVC9C0_SET_INLINE_QMD_ADDRESS_A_QMD_ADDRESS_SHIFTED8_UPPER 31:0 + +#define NVC9C0_SET_INLINE_QMD_ADDRESS_B 0x031c +#define NVC9C0_SET_INLINE_QMD_ADDRESS_B_QMD_ADDRESS_SHIFTED8_LOWER 31:0 + +#define NVC9C0_LOAD_INLINE_QMD_DATA(i) (0x0320+(i)*4) +#define NVC9C0_LOAD_INLINE_QMD_DATA_V 31:0 + +#define NVC9C0_SET_FALCON00 0x0500 +#define NVC9C0_SET_FALCON00_V 31:0 + +#define NVC9C0_SET_FALCON01 0x0504 +#define NVC9C0_SET_FALCON01_V 31:0 + +#define NVC9C0_SET_FALCON02 0x0508 +#define NVC9C0_SET_FALCON02_V 31:0 + +#define NVC9C0_SET_FALCON03 0x050c +#define NVC9C0_SET_FALCON03_V 31:0 + +#define NVC9C0_SET_FALCON04 0x0510 +#define NVC9C0_SET_FALCON04_V 31:0 + +#define NVC9C0_SET_FALCON05 0x0514 +#define NVC9C0_SET_FALCON05_V 31:0 + +#define NVC9C0_SET_FALCON06 0x0518 +#define NVC9C0_SET_FALCON06_V 31:0 + +#define NVC9C0_SET_FALCON07 0x051c +#define NVC9C0_SET_FALCON07_V 31:0 + +#define NVC9C0_SET_FALCON08 0x0520 +#define NVC9C0_SET_FALCON08_V 31:0 + +#define NVC9C0_SET_FALCON09 0x0524 +#define NVC9C0_SET_FALCON09_V 31:0 + +#define NVC9C0_SET_FALCON10 0x0528 +#define NVC9C0_SET_FALCON10_V 31:0 + +#define NVC9C0_SET_FALCON11 0x052c +#define NVC9C0_SET_FALCON11_V 31:0 + +#define NVC9C0_SET_FALCON12 0x0530 +#define NVC9C0_SET_FALCON12_V 31:0 + +#define NVC9C0_SET_FALCON13 0x0534 +#define NVC9C0_SET_FALCON13_V 31:0 + +#define NVC9C0_SET_FALCON14 0x0538 +#define NVC9C0_SET_FALCON14_V 31:0 + +#define NVC9C0_SET_FALCON15 0x053c +#define NVC9C0_SET_FALCON15_V 31:0 + +#define NVC9C0_SET_MME_MEM_ADDRESS_A 0x0550 +#define NVC9C0_SET_MME_MEM_ADDRESS_A_UPPER 16:0 + +#define NVC9C0_SET_MME_MEM_ADDRESS_B 0x0554 +#define NVC9C0_SET_MME_MEM_ADDRESS_B_LOWER 31:0 + +#define NVC9C0_SET_MME_DATA_RAM_ADDRESS 0x0558 +#define NVC9C0_SET_MME_DATA_RAM_ADDRESS_WORD 31:0 + +#define NVC9C0_MME_DMA_READ 0x055c +#define NVC9C0_MME_DMA_READ_LENGTH 31:0 + +#define NVC9C0_MME_DMA_READ_FIFOED 0x0560 +#define NVC9C0_MME_DMA_READ_FIFOED_LENGTH 31:0 + +#define NVC9C0_MME_DMA_WRITE 0x0564 +#define NVC9C0_MME_DMA_WRITE_LENGTH 31:0 + +#define NVC9C0_MME_DMA_REDUCTION 0x0568 +#define NVC9C0_MME_DMA_REDUCTION_REDUCTION_OP 2:0 +#define NVC9C0_MME_DMA_REDUCTION_REDUCTION_OP_RED_ADD 0x00000000 +#define NVC9C0_MME_DMA_REDUCTION_REDUCTION_OP_RED_MIN 0x00000001 +#define NVC9C0_MME_DMA_REDUCTION_REDUCTION_OP_RED_MAX 0x00000002 +#define NVC9C0_MME_DMA_REDUCTION_REDUCTION_OP_RED_INC 0x00000003 +#define NVC9C0_MME_DMA_REDUCTION_REDUCTION_OP_RED_DEC 0x00000004 +#define NVC9C0_MME_DMA_REDUCTION_REDUCTION_OP_RED_AND 0x00000005 +#define NVC9C0_MME_DMA_REDUCTION_REDUCTION_OP_RED_OR 0x00000006 +#define NVC9C0_MME_DMA_REDUCTION_REDUCTION_OP_RED_XOR 0x00000007 +#define NVC9C0_MME_DMA_REDUCTION_REDUCTION_FORMAT 5:4 +#define NVC9C0_MME_DMA_REDUCTION_REDUCTION_FORMAT_UNSIGNED 0x00000000 +#define NVC9C0_MME_DMA_REDUCTION_REDUCTION_FORMAT_SIGNED 0x00000001 +#define NVC9C0_MME_DMA_REDUCTION_REDUCTION_SIZE 8:8 +#define NVC9C0_MME_DMA_REDUCTION_REDUCTION_SIZE_FOUR_BYTES 0x00000000 +#define NVC9C0_MME_DMA_REDUCTION_REDUCTION_SIZE_EIGHT_BYTES 0x00000001 + +#define NVC9C0_MME_DMA_SYSMEMBAR 0x056c +#define NVC9C0_MME_DMA_SYSMEMBAR_V 0:0 + +#define NVC9C0_MME_DMA_SYNC 0x0570 +#define NVC9C0_MME_DMA_SYNC_VALUE 31:0 + +#define NVC9C0_SET_MME_DATA_FIFO_CONFIG 0x0574 +#define NVC9C0_SET_MME_DATA_FIFO_CONFIG_FIFO_SIZE 2:0 +#define NVC9C0_SET_MME_DATA_FIFO_CONFIG_FIFO_SIZE_SIZE_0KB 0x00000000 +#define NVC9C0_SET_MME_DATA_FIFO_CONFIG_FIFO_SIZE_SIZE_4KB 0x00000001 +#define NVC9C0_SET_MME_DATA_FIFO_CONFIG_FIFO_SIZE_SIZE_8KB 0x00000002 +#define NVC9C0_SET_MME_DATA_FIFO_CONFIG_FIFO_SIZE_SIZE_12KB 0x00000003 +#define NVC9C0_SET_MME_DATA_FIFO_CONFIG_FIFO_SIZE_SIZE_16KB 0x00000004 + +#define NVC9C0_SET_SHADER_LOCAL_MEMORY_A 0x0790 +#define NVC9C0_SET_SHADER_LOCAL_MEMORY_A_ADDRESS_UPPER 16:0 + +#define NVC9C0_SET_SHADER_LOCAL_MEMORY_B 0x0794 +#define NVC9C0_SET_SHADER_LOCAL_MEMORY_B_ADDRESS_LOWER 31:0 + +#define NVC9C0_SET_SHADER_LOCAL_MEMORY_WINDOW_A 0x07b0 +#define NVC9C0_SET_SHADER_LOCAL_MEMORY_WINDOW_A_BASE_ADDRESS_UPPER 16:0 + +#define NVC9C0_SET_SHADER_LOCAL_MEMORY_WINDOW_B 0x07b4 +#define NVC9C0_SET_SHADER_LOCAL_MEMORY_WINDOW_B_BASE_ADDRESS 31:0 + +#define NVC9C0_THROTTLE_SM 0x07fc +#define NVC9C0_THROTTLE_SM_MULTIPLY_ADD 0:0 +#define NVC9C0_THROTTLE_SM_MULTIPLY_ADD_FALSE 0x00000000 +#define NVC9C0_THROTTLE_SM_MULTIPLY_ADD_TRUE 0x00000001 + +#define NVC9C0_SET_SHADER_CACHE_CONTROL 0x0d94 +#define NVC9C0_SET_SHADER_CACHE_CONTROL_ICACHE_PREFETCH_ENABLE 0:0 +#define NVC9C0_SET_SHADER_CACHE_CONTROL_ICACHE_PREFETCH_ENABLE_FALSE 0x00000000 +#define NVC9C0_SET_SHADER_CACHE_CONTROL_ICACHE_PREFETCH_ENABLE_TRUE 0x00000001 + +#define NVC9C0_SET_SCG_COMPUTE_SCHEDULING_PARAMETERS(i) (0x0da0+(i)*4) +#define NVC9C0_SET_SCG_COMPUTE_SCHEDULING_PARAMETERS_V 31:0 + +#define NVC9C0_SET_SM_TIMEOUT_INTERVAL 0x0de4 +#define NVC9C0_SET_SM_TIMEOUT_INTERVAL_COUNTER_BIT 5:0 + +#define NVC9C0_MME_DMA_WRITE_METHOD_BARRIER 0x0dec +#define NVC9C0_MME_DMA_WRITE_METHOD_BARRIER_V 0:0 + +#define NVC9C0_INVALIDATE_TEXTURE_DATA_CACHE_NO_WFI 0x1288 +#define NVC9C0_INVALIDATE_TEXTURE_DATA_CACHE_NO_WFI_LINES 0:0 +#define NVC9C0_INVALIDATE_TEXTURE_DATA_CACHE_NO_WFI_LINES_ALL 0x00000000 +#define NVC9C0_INVALIDATE_TEXTURE_DATA_CACHE_NO_WFI_LINES_ONE 0x00000001 +#define NVC9C0_INVALIDATE_TEXTURE_DATA_CACHE_NO_WFI_TAG 25:4 + +#define NVC9C0_ACTIVATE_PERF_SETTINGS_FOR_COMPUTE_CONTEXT 0x12a8 +#define NVC9C0_ACTIVATE_PERF_SETTINGS_FOR_COMPUTE_CONTEXT_ALL 0:0 +#define NVC9C0_ACTIVATE_PERF_SETTINGS_FOR_COMPUTE_CONTEXT_ALL_FALSE 0x00000000 +#define NVC9C0_ACTIVATE_PERF_SETTINGS_FOR_COMPUTE_CONTEXT_ALL_TRUE 0x00000001 + +#define NVC9C0_INVALIDATE_SAMPLER_CACHE 0x1330 +#define NVC9C0_INVALIDATE_SAMPLER_CACHE_LINES 0:0 +#define NVC9C0_INVALIDATE_SAMPLER_CACHE_LINES_ALL 0x00000000 +#define NVC9C0_INVALIDATE_SAMPLER_CACHE_LINES_ONE 0x00000001 +#define NVC9C0_INVALIDATE_SAMPLER_CACHE_TAG 25:4 + +#define NVC9C0_INVALIDATE_TEXTURE_HEADER_CACHE 0x1334 +#define NVC9C0_INVALIDATE_TEXTURE_HEADER_CACHE_LINES 0:0 +#define NVC9C0_INVALIDATE_TEXTURE_HEADER_CACHE_LINES_ALL 0x00000000 +#define NVC9C0_INVALIDATE_TEXTURE_HEADER_CACHE_LINES_ONE 0x00000001 +#define NVC9C0_INVALIDATE_TEXTURE_HEADER_CACHE_TAG 25:4 + +#define NVC9C0_INVALIDATE_TEXTURE_DATA_CACHE 0x1338 +#define NVC9C0_INVALIDATE_TEXTURE_DATA_CACHE_LINES 0:0 +#define NVC9C0_INVALIDATE_TEXTURE_DATA_CACHE_LINES_ALL 0x00000000 +#define NVC9C0_INVALIDATE_TEXTURE_DATA_CACHE_LINES_ONE 0x00000001 +#define NVC9C0_INVALIDATE_TEXTURE_DATA_CACHE_TAG 25:4 + +#define NVC9C0_INVALIDATE_SAMPLER_CACHE_NO_WFI 0x1424 +#define NVC9C0_INVALIDATE_SAMPLER_CACHE_NO_WFI_LINES 0:0 +#define NVC9C0_INVALIDATE_SAMPLER_CACHE_NO_WFI_LINES_ALL 0x00000000 +#define NVC9C0_INVALIDATE_SAMPLER_CACHE_NO_WFI_LINES_ONE 0x00000001 +#define NVC9C0_INVALIDATE_SAMPLER_CACHE_NO_WFI_TAG 25:4 + +#define NVC9C0_SET_SHADER_EXCEPTIONS 0x1528 +#define NVC9C0_SET_SHADER_EXCEPTIONS_ENABLE 0:0 +#define NVC9C0_SET_SHADER_EXCEPTIONS_ENABLE_FALSE 0x00000000 +#define NVC9C0_SET_SHADER_EXCEPTIONS_ENABLE_TRUE 0x00000001 + +#define NVC9C0_SET_RENDER_ENABLE_A 0x1550 +#define NVC9C0_SET_RENDER_ENABLE_A_OFFSET_UPPER 7:0 + +#define NVC9C0_SET_RENDER_ENABLE_B 0x1554 +#define NVC9C0_SET_RENDER_ENABLE_B_OFFSET_LOWER 31:0 + +#define NVC9C0_SET_RENDER_ENABLE_C 0x1558 +#define NVC9C0_SET_RENDER_ENABLE_C_MODE 2:0 +#define NVC9C0_SET_RENDER_ENABLE_C_MODE_FALSE 0x00000000 +#define NVC9C0_SET_RENDER_ENABLE_C_MODE_TRUE 0x00000001 +#define NVC9C0_SET_RENDER_ENABLE_C_MODE_CONDITIONAL 0x00000002 +#define NVC9C0_SET_RENDER_ENABLE_C_MODE_RENDER_IF_EQUAL 0x00000003 +#define NVC9C0_SET_RENDER_ENABLE_C_MODE_RENDER_IF_NOT_EQUAL 0x00000004 + +#define NVC9C0_SET_TEX_SAMPLER_POOL_A 0x155c +#define NVC9C0_SET_TEX_SAMPLER_POOL_A_OFFSET_UPPER 16:0 + +#define NVC9C0_SET_TEX_SAMPLER_POOL_B 0x1560 +#define NVC9C0_SET_TEX_SAMPLER_POOL_B_OFFSET_LOWER 31:0 + +#define NVC9C0_SET_TEX_SAMPLER_POOL_C 0x1564 +#define NVC9C0_SET_TEX_SAMPLER_POOL_C_MAXIMUM_INDEX 19:0 + +#define NVC9C0_SET_TEX_HEADER_POOL_A 0x1574 +#define NVC9C0_SET_TEX_HEADER_POOL_A_OFFSET_UPPER 16:0 + +#define NVC9C0_SET_TEX_HEADER_POOL_B 0x1578 +#define NVC9C0_SET_TEX_HEADER_POOL_B_OFFSET_LOWER 31:0 + +#define NVC9C0_SET_TEX_HEADER_POOL_C 0x157c +#define NVC9C0_SET_TEX_HEADER_POOL_C_MAXIMUM_INDEX 21:0 + +#define NVC9C0_INVALIDATE_SHADER_CACHES_NO_WFI 0x1698 +#define NVC9C0_INVALIDATE_SHADER_CACHES_NO_WFI_INSTRUCTION 0:0 +#define NVC9C0_INVALIDATE_SHADER_CACHES_NO_WFI_INSTRUCTION_FALSE 0x00000000 +#define NVC9C0_INVALIDATE_SHADER_CACHES_NO_WFI_INSTRUCTION_TRUE 0x00000001 +#define NVC9C0_INVALIDATE_SHADER_CACHES_NO_WFI_GLOBAL_DATA 4:4 +#define NVC9C0_INVALIDATE_SHADER_CACHES_NO_WFI_GLOBAL_DATA_FALSE 0x00000000 +#define NVC9C0_INVALIDATE_SHADER_CACHES_NO_WFI_GLOBAL_DATA_TRUE 0x00000001 +#define NVC9C0_INVALIDATE_SHADER_CACHES_NO_WFI_CONSTANT 12:12 +#define NVC9C0_INVALIDATE_SHADER_CACHES_NO_WFI_CONSTANT_FALSE 0x00000000 +#define NVC9C0_INVALIDATE_SHADER_CACHES_NO_WFI_CONSTANT_TRUE 0x00000001 + +#define NVC9C0_SET_RENDER_ENABLE_OVERRIDE 0x1944 +#define NVC9C0_SET_RENDER_ENABLE_OVERRIDE_MODE 1:0 +#define NVC9C0_SET_RENDER_ENABLE_OVERRIDE_MODE_USE_RENDER_ENABLE 0x00000000 +#define NVC9C0_SET_RENDER_ENABLE_OVERRIDE_MODE_ALWAYS_RENDER 0x00000001 +#define NVC9C0_SET_RENDER_ENABLE_OVERRIDE_MODE_NEVER_RENDER 0x00000002 + +#define NVC9C0_PIPE_NOP 0x1a2c +#define NVC9C0_PIPE_NOP_V 31:0 + +#define NVC9C0_SET_SPARE00 0x1a30 +#define NVC9C0_SET_SPARE00_V 31:0 + +#define NVC9C0_SET_SPARE01 0x1a34 +#define NVC9C0_SET_SPARE01_V 31:0 + +#define NVC9C0_SET_SPARE02 0x1a38 +#define NVC9C0_SET_SPARE02_V 31:0 + +#define NVC9C0_SET_SPARE03 0x1a3c +#define NVC9C0_SET_SPARE03_V 31:0 + +#define NVC9C0_SET_REPORT_SEMAPHORE_A 0x1b00 +#define NVC9C0_SET_REPORT_SEMAPHORE_A_OFFSET_UPPER 7:0 + +#define NVC9C0_SET_REPORT_SEMAPHORE_B 0x1b04 +#define NVC9C0_SET_REPORT_SEMAPHORE_B_OFFSET_LOWER 31:0 + +#define NVC9C0_SET_REPORT_SEMAPHORE_C 0x1b08 +#define NVC9C0_SET_REPORT_SEMAPHORE_C_PAYLOAD 31:0 + +#define NVC9C0_SET_REPORT_SEMAPHORE_D 0x1b0c +#define NVC9C0_SET_REPORT_SEMAPHORE_D_OPERATION 1:0 +#define NVC9C0_SET_REPORT_SEMAPHORE_D_OPERATION_RELEASE 0x00000000 +#define NVC9C0_SET_REPORT_SEMAPHORE_D_OPERATION_TRAP 0x00000003 +#define NVC9C0_SET_REPORT_SEMAPHORE_D_AWAKEN_ENABLE 20:20 +#define NVC9C0_SET_REPORT_SEMAPHORE_D_AWAKEN_ENABLE_FALSE 0x00000000 +#define NVC9C0_SET_REPORT_SEMAPHORE_D_AWAKEN_ENABLE_TRUE 0x00000001 +#define NVC9C0_SET_REPORT_SEMAPHORE_D_STRUCTURE_SIZE 28:28 +#define NVC9C0_SET_REPORT_SEMAPHORE_D_STRUCTURE_SIZE_FOUR_WORDS 0x00000000 +#define NVC9C0_SET_REPORT_SEMAPHORE_D_STRUCTURE_SIZE_ONE_WORD 0x00000001 +#define NVC9C0_SET_REPORT_SEMAPHORE_D_FLUSH_DISABLE 2:2 +#define NVC9C0_SET_REPORT_SEMAPHORE_D_FLUSH_DISABLE_FALSE 0x00000000 +#define NVC9C0_SET_REPORT_SEMAPHORE_D_FLUSH_DISABLE_TRUE 0x00000001 +#define NVC9C0_SET_REPORT_SEMAPHORE_D_REDUCTION_ENABLE 3:3 +#define NVC9C0_SET_REPORT_SEMAPHORE_D_REDUCTION_ENABLE_FALSE 0x00000000 +#define NVC9C0_SET_REPORT_SEMAPHORE_D_REDUCTION_ENABLE_TRUE 0x00000001 +#define NVC9C0_SET_REPORT_SEMAPHORE_D_REDUCTION_OP 11:9 +#define NVC9C0_SET_REPORT_SEMAPHORE_D_REDUCTION_OP_RED_ADD 0x00000000 +#define NVC9C0_SET_REPORT_SEMAPHORE_D_REDUCTION_OP_RED_MIN 0x00000001 +#define NVC9C0_SET_REPORT_SEMAPHORE_D_REDUCTION_OP_RED_MAX 0x00000002 +#define NVC9C0_SET_REPORT_SEMAPHORE_D_REDUCTION_OP_RED_INC 0x00000003 +#define NVC9C0_SET_REPORT_SEMAPHORE_D_REDUCTION_OP_RED_DEC 0x00000004 +#define NVC9C0_SET_REPORT_SEMAPHORE_D_REDUCTION_OP_RED_AND 0x00000005 +#define NVC9C0_SET_REPORT_SEMAPHORE_D_REDUCTION_OP_RED_OR 0x00000006 +#define NVC9C0_SET_REPORT_SEMAPHORE_D_REDUCTION_OP_RED_XOR 0x00000007 +#define NVC9C0_SET_REPORT_SEMAPHORE_D_REDUCTION_FORMAT 18:17 +#define NVC9C0_SET_REPORT_SEMAPHORE_D_REDUCTION_FORMAT_UNSIGNED_32 0x00000000 +#define NVC9C0_SET_REPORT_SEMAPHORE_D_REDUCTION_FORMAT_SIGNED_32 0x00000001 +#define NVC9C0_SET_REPORT_SEMAPHORE_D_CONDITIONAL_TRAP 19:19 +#define NVC9C0_SET_REPORT_SEMAPHORE_D_CONDITIONAL_TRAP_FALSE 0x00000000 +#define NVC9C0_SET_REPORT_SEMAPHORE_D_CONDITIONAL_TRAP_TRUE 0x00000001 + +#define NVC9C0_SET_TRAP_HANDLER_A 0x25f8 +#define NVC9C0_SET_TRAP_HANDLER_A_ADDRESS_UPPER 16:0 + +#define NVC9C0_SET_TRAP_HANDLER_B 0x25fc +#define NVC9C0_SET_TRAP_HANDLER_B_ADDRESS_LOWER 31:0 + +#define NVC9C0_SET_BINDLESS_TEXTURE 0x2608 +#define NVC9C0_SET_BINDLESS_TEXTURE_CONSTANT_BUFFER_SLOT_SELECT 2:0 + +#define NVC9C0_SET_SHADER_PERFORMANCE_SNAPSHOT_COUNTER_VALUE(i) (0x32f4+(i)*4) +#define NVC9C0_SET_SHADER_PERFORMANCE_SNAPSHOT_COUNTER_VALUE_V 31:0 + +#define NVC9C0_SET_SHADER_PERFORMANCE_SNAPSHOT_COUNTER_VALUE_UPPER(i) (0x3314+(i)*4) +#define NVC9C0_SET_SHADER_PERFORMANCE_SNAPSHOT_COUNTER_VALUE_UPPER_V 31:0 + +#define NVC9C0_ENABLE_SHADER_PERFORMANCE_SNAPSHOT_COUNTER 0x3334 +#define NVC9C0_ENABLE_SHADER_PERFORMANCE_SNAPSHOT_COUNTER_V 0:0 + +#define NVC9C0_DISABLE_SHADER_PERFORMANCE_SNAPSHOT_COUNTER 0x3338 +#define NVC9C0_DISABLE_SHADER_PERFORMANCE_SNAPSHOT_COUNTER_V 0:0 + +#define NVC9C0_SET_SHADER_PERFORMANCE_COUNTER_VALUE_UPPER(i) (0x333c+(i)*4) +#define NVC9C0_SET_SHADER_PERFORMANCE_COUNTER_VALUE_UPPER_V 31:0 + +#define NVC9C0_SET_SHADER_PERFORMANCE_COUNTER_VALUE(i) (0x335c+(i)*4) +#define NVC9C0_SET_SHADER_PERFORMANCE_COUNTER_VALUE_V 31:0 + +#define NVC9C0_SET_SHADER_PERFORMANCE_COUNTER_EVENT(i) (0x337c+(i)*4) +#define NVC9C0_SET_SHADER_PERFORMANCE_COUNTER_EVENT_EVENT 7:0 + +#define NVC9C0_SET_SHADER_PERFORMANCE_COUNTER_CONTROL_A(i) (0x339c+(i)*4) +#define NVC9C0_SET_SHADER_PERFORMANCE_COUNTER_CONTROL_A_EVENT0 1:0 +#define NVC9C0_SET_SHADER_PERFORMANCE_COUNTER_CONTROL_A_BIT_SELECT0 4:2 +#define NVC9C0_SET_SHADER_PERFORMANCE_COUNTER_CONTROL_A_EVENT1 6:5 +#define NVC9C0_SET_SHADER_PERFORMANCE_COUNTER_CONTROL_A_BIT_SELECT1 9:7 +#define NVC9C0_SET_SHADER_PERFORMANCE_COUNTER_CONTROL_A_EVENT2 11:10 +#define NVC9C0_SET_SHADER_PERFORMANCE_COUNTER_CONTROL_A_BIT_SELECT2 14:12 +#define NVC9C0_SET_SHADER_PERFORMANCE_COUNTER_CONTROL_A_EVENT3 16:15 +#define NVC9C0_SET_SHADER_PERFORMANCE_COUNTER_CONTROL_A_BIT_SELECT3 19:17 +#define NVC9C0_SET_SHADER_PERFORMANCE_COUNTER_CONTROL_A_EVENT4 21:20 +#define NVC9C0_SET_SHADER_PERFORMANCE_COUNTER_CONTROL_A_BIT_SELECT4 24:22 +#define NVC9C0_SET_SHADER_PERFORMANCE_COUNTER_CONTROL_A_EVENT5 26:25 +#define NVC9C0_SET_SHADER_PERFORMANCE_COUNTER_CONTROL_A_BIT_SELECT5 29:27 +#define NVC9C0_SET_SHADER_PERFORMANCE_COUNTER_CONTROL_A_SPARE 31:30 + +#define NVC9C0_SET_SHADER_PERFORMANCE_COUNTER_CONTROL_B(i) (0x33bc+(i)*4) +#define NVC9C0_SET_SHADER_PERFORMANCE_COUNTER_CONTROL_B_EDGE 0:0 +#define NVC9C0_SET_SHADER_PERFORMANCE_COUNTER_CONTROL_B_MODE 2:1 +#define NVC9C0_SET_SHADER_PERFORMANCE_COUNTER_CONTROL_B_WINDOWED 3:3 +#define NVC9C0_SET_SHADER_PERFORMANCE_COUNTER_CONTROL_B_FUNC 19:4 + +#define NVC9C0_SET_SHADER_PERFORMANCE_COUNTER_TRAP_CONTROL 0x33dc +#define NVC9C0_SET_SHADER_PERFORMANCE_COUNTER_TRAP_CONTROL_MASK 7:0 + +#define NVC9C0_START_SHADER_PERFORMANCE_COUNTER 0x33e0 +#define NVC9C0_START_SHADER_PERFORMANCE_COUNTER_COUNTER_MASK 7:0 + +#define NVC9C0_STOP_SHADER_PERFORMANCE_COUNTER 0x33e4 +#define NVC9C0_STOP_SHADER_PERFORMANCE_COUNTER_COUNTER_MASK 7:0 + +#define NVC9C0_SET_SHADER_PERFORMANCE_COUNTER_SCTL_FILTER 0x33e8 +#define NVC9C0_SET_SHADER_PERFORMANCE_COUNTER_SCTL_FILTER_V 31:0 + +#define NVC9C0_SET_SHADER_PERFORMANCE_COUNTER_CORE_MIO_FILTER 0x33ec +#define NVC9C0_SET_SHADER_PERFORMANCE_COUNTER_CORE_MIO_FILTER_V 31:0 + +#define NVC9C0_SET_MME_SHADOW_SCRATCH(i) (0x3400+(i)*4) +#define NVC9C0_SET_MME_SHADOW_SCRATCH_V 31:0 + +#define NVC9C0_CALL_MME_MACRO(j) (0x3800+(j)*8) +#define NVC9C0_CALL_MME_MACRO_V 31:0 + +#define NVC9C0_CALL_MME_DATA(j) (0x3804+(j)*8) +#define NVC9C0_CALL_MME_DATA_V 31:0 + +#endif /* _cl_ada_compute_a_h_ */ diff --git a/src/nouveau/headers/nvidia/classes/clc9c0qmd.h b/src/nouveau/headers/nvidia/classes/clc9c0qmd.h new file mode 100644 index 00000000000..5a87f54c71e --- /dev/null +++ b/src/nouveau/headers/nvidia/classes/clc9c0qmd.h @@ -0,0 +1,528 @@ +/******************************************************************************* + Copyright (c) 2023, NVIDIA CORPORATION. All rights reserved. + + Permission is hereby granted, free of charge, to any person obtaining a + copy of this software and associated documentation files (the "Software"), + to deal in the Software without restriction, including without limitation + the rights to use, copy, modify, merge, publish, distribute, sublicense, + and/or sell copies of the Software, and to permit persons to whom the + Software is furnished to do so, subject to the following conditions: + + The above copyright notice and this permission notice shall be included in + all copies or substantial portions of the Software. + + THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR + IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, + FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL + THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER + LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING + FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER + DEALINGS IN THE SOFTWARE. + +*******************************************************************************/ + +/* AUTO GENERATED FILE -- DO NOT EDIT */ + +#ifndef __CLC9C0QMD_H__ +#define __CLC9C0QMD_H__ + +/* +** Queue Meta Data, Version 02_04 + */ + +#define NVC9C0_QMDV02_04_OUTER_PUT MW(30:0) +#define NVC9C0_QMDV02_04_OUTER_OVERFLOW MW(31:31) +#define NVC9C0_QMDV02_04_OUTER_GET MW(62:32) +#define NVC9C0_QMDV02_04_OUTER_STICKY_OVERFLOW MW(63:63) +#define NVC9C0_QMDV02_04_INNER_GET MW(94:64) +#define NVC9C0_QMDV02_04_INNER_OVERFLOW MW(95:95) +#define NVC9C0_QMDV02_04_INNER_PUT MW(126:96) +#define NVC9C0_QMDV02_04_INNER_STICKY_OVERFLOW MW(127:127) +#define NVC9C0_QMDV02_04_QMD_GROUP_ID MW(133:128) +#define NVC9C0_QMDV02_04_SM_GLOBAL_CACHING_ENABLE MW(134:134) +#define NVC9C0_QMDV02_04_RUN_CTA_IN_ONE_SM_PARTITION MW(135:135) +#define NVC9C0_QMDV02_04_RUN_CTA_IN_ONE_SM_PARTITION_FALSE 0x00000000 +#define NVC9C0_QMDV02_04_RUN_CTA_IN_ONE_SM_PARTITION_TRUE 0x00000001 +#define NVC9C0_QMDV02_04_IS_QUEUE MW(136:136) +#define NVC9C0_QMDV02_04_IS_QUEUE_FALSE 0x00000000 +#define NVC9C0_QMDV02_04_IS_QUEUE_TRUE 0x00000001 +#define NVC9C0_QMDV02_04_ADD_TO_HEAD_OF_QMD_GROUP_LINKED_LIST MW(137:137) +#define NVC9C0_QMDV02_04_ADD_TO_HEAD_OF_QMD_GROUP_LINKED_LIST_FALSE 0x00000000 +#define NVC9C0_QMDV02_04_ADD_TO_HEAD_OF_QMD_GROUP_LINKED_LIST_TRUE 0x00000001 +#define NVC9C0_QMDV02_04_SEMAPHORE_RELEASE_ENABLE0 MW(138:138) +#define NVC9C0_QMDV02_04_SEMAPHORE_RELEASE_ENABLE0_FALSE 0x00000000 +#define NVC9C0_QMDV02_04_SEMAPHORE_RELEASE_ENABLE0_TRUE 0x00000001 +#define NVC9C0_QMDV02_04_SEMAPHORE_RELEASE_ENABLE1 MW(139:139) +#define NVC9C0_QMDV02_04_SEMAPHORE_RELEASE_ENABLE1_FALSE 0x00000000 +#define NVC9C0_QMDV02_04_SEMAPHORE_RELEASE_ENABLE1_TRUE 0x00000001 +#define NVC9C0_QMDV02_04_REQUIRE_SCHEDULING_PCAS MW(140:140) +#define NVC9C0_QMDV02_04_REQUIRE_SCHEDULING_PCAS_FALSE 0x00000000 +#define NVC9C0_QMDV02_04_REQUIRE_SCHEDULING_PCAS_TRUE 0x00000001 +#define NVC9C0_QMDV02_04_DEPENDENT_QMD0_ENABLE MW(141:141) +#define NVC9C0_QMDV02_04_DEPENDENT_QMD0_ENABLE_FALSE 0x00000000 +#define NVC9C0_QMDV02_04_DEPENDENT_QMD0_ENABLE_TRUE 0x00000001 +#define NVC9C0_QMDV02_04_DEPENDENT_QMD0_ACTION MW(144:142) +#define NVC9C0_QMDV02_04_DEPENDENT_QMD0_ACTION_QMD_INCREMENT_PUT 0x00000000 +#define NVC9C0_QMDV02_04_DEPENDENT_QMD0_ACTION_QMD_SCHEDULE 0x00000001 +#define NVC9C0_QMDV02_04_DEPENDENT_QMD0_ACTION_QMD_INVALIDATE_COPY_SCHEDULE 0x00000003 +#define NVC9C0_QMDV02_04_DEPENDENT_QMD0_ACTION_QMD_DECREMENT_DEPENDENCE 0x00000004 +#define NVC9C0_QMDV02_04_DEPENDENT_QMD0_PREFETCH MW(145:145) +#define NVC9C0_QMDV02_04_DEPENDENT_QMD0_PREFETCH_FALSE 0x00000000 +#define NVC9C0_QMDV02_04_DEPENDENT_QMD0_PREFETCH_TRUE 0x00000001 +#define NVC9C0_QMDV02_04_DEPENDENT_QMD1_ENABLE MW(146:146) +#define NVC9C0_QMDV02_04_DEPENDENT_QMD1_ENABLE_FALSE 0x00000000 +#define NVC9C0_QMDV02_04_DEPENDENT_QMD1_ENABLE_TRUE 0x00000001 +#define NVC9C0_QMDV02_04_DEPENDENT_QMD1_ACTION MW(149:147) +#define NVC9C0_QMDV02_04_DEPENDENT_QMD1_ACTION_QMD_INCREMENT_PUT 0x00000000 +#define NVC9C0_QMDV02_04_DEPENDENT_QMD1_ACTION_QMD_SCHEDULE 0x00000001 +#define NVC9C0_QMDV02_04_DEPENDENT_QMD1_ACTION_QMD_INVALIDATE_COPY_SCHEDULE 0x00000003 +#define NVC9C0_QMDV02_04_DEPENDENT_QMD1_ACTION_QMD_DECREMENT_DEPENDENCE 0x00000004 +#define NVC9C0_QMDV02_04_DEPENDENT_QMD1_PREFETCH MW(150:150) +#define NVC9C0_QMDV02_04_DEPENDENT_QMD1_PREFETCH_FALSE 0x00000000 +#define NVC9C0_QMDV02_04_DEPENDENT_QMD1_PREFETCH_TRUE 0x00000001 +#define NVC9C0_QMDV02_04_DEPENDENCE_COUNTER MW(157:151) +#define NVC9C0_QMDV02_04_SELF_COPY_ON_COMPLETION MW(158:158) +#define NVC9C0_QMDV02_04_SELF_COPY_ON_COMPLETION_FALSE 0x00000000 +#define NVC9C0_QMDV02_04_SELF_COPY_ON_COMPLETION_TRUE 0x00000001 +#define NVC9C0_QMDV02_04_CIRCULAR_QUEUE_SIZE MW(184:160) +#define NVC9C0_QMDV02_04_DEMOTE_L2_EVICT_LAST MW(185:185) +#define NVC9C0_QMDV02_04_INVALIDATE_TEXTURE_HEADER_CACHE MW(186:186) +#define NVC9C0_QMDV02_04_INVALIDATE_TEXTURE_HEADER_CACHE_FALSE 0x00000000 +#define NVC9C0_QMDV02_04_INVALIDATE_TEXTURE_HEADER_CACHE_TRUE 0x00000001 +#define NVC9C0_QMDV02_04_INVALIDATE_TEXTURE_SAMPLER_CACHE MW(187:187) +#define NVC9C0_QMDV02_04_INVALIDATE_TEXTURE_SAMPLER_CACHE_FALSE 0x00000000 +#define NVC9C0_QMDV02_04_INVALIDATE_TEXTURE_SAMPLER_CACHE_TRUE 0x00000001 +#define NVC9C0_QMDV02_04_INVALIDATE_TEXTURE_DATA_CACHE MW(188:188) +#define NVC9C0_QMDV02_04_INVALIDATE_TEXTURE_DATA_CACHE_FALSE 0x00000000 +#define NVC9C0_QMDV02_04_INVALIDATE_TEXTURE_DATA_CACHE_TRUE 0x00000001 +#define NVC9C0_QMDV02_04_INVALIDATE_SHADER_DATA_CACHE MW(189:189) +#define NVC9C0_QMDV02_04_INVALIDATE_SHADER_DATA_CACHE_FALSE 0x00000000 +#define NVC9C0_QMDV02_04_INVALIDATE_SHADER_DATA_CACHE_TRUE 0x00000001 +#define NVC9C0_QMDV02_04_INVALIDATE_INSTRUCTION_CACHE MW(190:190) +#define NVC9C0_QMDV02_04_INVALIDATE_INSTRUCTION_CACHE_FALSE 0x00000000 +#define NVC9C0_QMDV02_04_INVALIDATE_INSTRUCTION_CACHE_TRUE 0x00000001 +#define NVC9C0_QMDV02_04_INVALIDATE_SHADER_CONSTANT_CACHE MW(191:191) +#define NVC9C0_QMDV02_04_INVALIDATE_SHADER_CONSTANT_CACHE_FALSE 0x00000000 +#define NVC9C0_QMDV02_04_INVALIDATE_SHADER_CONSTANT_CACHE_TRUE 0x00000001 +#define NVC9C0_QMDV02_04_CTA_RASTER_WIDTH_RESUME MW(223:192) +#define NVC9C0_QMDV02_04_CTA_RASTER_HEIGHT_RESUME MW(239:224) +#define NVC9C0_QMDV02_04_CTA_RASTER_DEPTH_RESUME MW(255:240) +#define NVC9C0_QMDV02_04_PROGRAM_PREFETCH_ADDR_LOWER_SHIFTED MW(287:256) +#define NVC9C0_QMDV02_04_CIRCULAR_QUEUE_ADDR_LOWER MW(319:288) +#define NVC9C0_QMDV02_04_CIRCULAR_QUEUE_ADDR_UPPER MW(327:320) +#define NVC9C0_QMDV02_04_CIRCULAR_QUEUE_ENTRY_SIZE MW(351:336) +#define NVC9C0_QMDV02_04_CWD_REFERENCE_COUNT_ID MW(357:352) +#define NVC9C0_QMDV02_04_CWD_REFERENCE_COUNT_DELTA_MINUS_ONE MW(365:358) +#define NVC9C0_QMDV02_04_RELEASE_MEMBAR_TYPE MW(366:366) +#define NVC9C0_QMDV02_04_RELEASE_MEMBAR_TYPE_FE_NONE 0x00000000 +#define NVC9C0_QMDV02_04_RELEASE_MEMBAR_TYPE_FE_SYSMEMBAR 0x00000001 +#define NVC9C0_QMDV02_04_CWD_REFERENCE_COUNT_INCR_ENABLE MW(367:367) +#define NVC9C0_QMDV02_04_CWD_REFERENCE_COUNT_INCR_ENABLE_FALSE 0x00000000 +#define NVC9C0_QMDV02_04_CWD_REFERENCE_COUNT_INCR_ENABLE_TRUE 0x00000001 +#define NVC9C0_QMDV02_04_CWD_MEMBAR_TYPE MW(369:368) +#define NVC9C0_QMDV02_04_CWD_MEMBAR_TYPE_L1_NONE 0x00000000 +#define NVC9C0_QMDV02_04_CWD_MEMBAR_TYPE_L1_SYSMEMBAR 0x00000001 +#define NVC9C0_QMDV02_04_CWD_MEMBAR_TYPE_L1_MEMBAR 0x00000003 +#define NVC9C0_QMDV02_04_SEQUENTIALLY_RUN_CTAS MW(370:370) +#define NVC9C0_QMDV02_04_SEQUENTIALLY_RUN_CTAS_FALSE 0x00000000 +#define NVC9C0_QMDV02_04_SEQUENTIALLY_RUN_CTAS_TRUE 0x00000001 +#define NVC9C0_QMDV02_04_CWD_REFERENCE_COUNT_DECR_ENABLE MW(371:371) +#define NVC9C0_QMDV02_04_CWD_REFERENCE_COUNT_DECR_ENABLE_FALSE 0x00000000 +#define NVC9C0_QMDV02_04_CWD_REFERENCE_COUNT_DECR_ENABLE_TRUE 0x00000001 +#define NVC9C0_QMDV02_04_API_VISIBLE_CALL_LIMIT MW(378:378) +#define NVC9C0_QMDV02_04_API_VISIBLE_CALL_LIMIT__32 0x00000000 +#define NVC9C0_QMDV02_04_API_VISIBLE_CALL_LIMIT_NO_CHECK 0x00000001 +#define NVC9C0_QMDV02_04_SAMPLER_INDEX MW(382:382) +#define NVC9C0_QMDV02_04_SAMPLER_INDEX_INDEPENDENTLY 0x00000000 +#define NVC9C0_QMDV02_04_SAMPLER_INDEX_VIA_HEADER_INDEX 0x00000001 +#define NVC9C0_QMDV02_04_DISABLE_AUTO_INVALIDATE MW(383:383) +#define NVC9C0_QMDV02_04_DISABLE_AUTO_INVALIDATE_FALSE 0x00000000 +#define NVC9C0_QMDV02_04_DISABLE_AUTO_INVALIDATE_TRUE 0x00000001 +#define NVC9C0_QMDV02_04_CTA_RASTER_WIDTH MW(415:384) +#define NVC9C0_QMDV02_04_CTA_RASTER_HEIGHT MW(431:416) +#define NVC9C0_QMDV02_04_CTA_RASTER_DEPTH MW(463:448) +#define NVC9C0_QMDV02_04_DEPENDENT_QMD0_POINTER MW(511:480) +#define NVC9C0_QMDV02_04_COALESCE_WAITING_PERIOD MW(529:522) +#define NVC9C0_QMDV02_04_QUEUE_ENTRIES_PER_CTA_LOG2 MW(534:530) +#define NVC9C0_QMDV02_04_SHARED_MEMORY_SIZE MW(561:544) +#define NVC9C0_QMDV02_04_MIN_SM_CONFIG_SHARED_MEM_SIZE MW(568:562) +#define NVC9C0_QMDV02_04_MAX_SM_CONFIG_SHARED_MEM_SIZE MW(575:569) +#define NVC9C0_QMDV02_04_QMD_VERSION MW(579:576) +#define NVC9C0_QMDV02_04_QMD_MAJOR_VERSION MW(583:580) +#define NVC9C0_QMDV02_04_CTA_THREAD_DIMENSION0 MW(607:592) +#define NVC9C0_QMDV02_04_CTA_THREAD_DIMENSION1 MW(623:608) +#define NVC9C0_QMDV02_04_CTA_THREAD_DIMENSION2 MW(639:624) +#define NVC9C0_QMDV02_04_CONSTANT_BUFFER_VALID(i) MW((640+(i)*1):(640+(i)*1)) +#define NVC9C0_QMDV02_04_CONSTANT_BUFFER_VALID_FALSE 0x00000000 +#define NVC9C0_QMDV02_04_CONSTANT_BUFFER_VALID_TRUE 0x00000001 +#define NVC9C0_QMDV02_04_REGISTER_COUNT_V MW(656:648) +#define NVC9C0_QMDV02_04_TARGET_SM_CONFIG_SHARED_MEM_SIZE MW(663:657) +#define NVC9C0_QMDV02_04_FREE_CTA_SLOTS_EMPTY_SM MW(671:664) +#define NVC9C0_QMDV02_04_SM_DISABLE_MASK_LOWER MW(703:672) +#define NVC9C0_QMDV02_04_SM_DISABLE_MASK_UPPER MW(735:704) +#define NVC9C0_QMDV02_04_RELEASE0_ADDRESS_LOWER MW(767:736) +#define NVC9C0_QMDV02_04_RELEASE0_ADDRESS_UPPER MW(775:768) +#define NVC9C0_QMDV02_04_RELEASE0_REDUCTION_OP MW(790:788) +#define NVC9C0_QMDV02_04_RELEASE0_REDUCTION_OP_RED_ADD 0x00000000 +#define NVC9C0_QMDV02_04_RELEASE0_REDUCTION_OP_RED_MIN 0x00000001 +#define NVC9C0_QMDV02_04_RELEASE0_REDUCTION_OP_RED_MAX 0x00000002 +#define NVC9C0_QMDV02_04_RELEASE0_REDUCTION_OP_RED_INC 0x00000003 +#define NVC9C0_QMDV02_04_RELEASE0_REDUCTION_OP_RED_DEC 0x00000004 +#define NVC9C0_QMDV02_04_RELEASE0_REDUCTION_OP_RED_AND 0x00000005 +#define NVC9C0_QMDV02_04_RELEASE0_REDUCTION_OP_RED_OR 0x00000006 +#define NVC9C0_QMDV02_04_RELEASE0_REDUCTION_OP_RED_XOR 0x00000007 +#define NVC9C0_QMDV02_04_RELEASE0_REDUCTION_FORMAT MW(793:792) +#define NVC9C0_QMDV02_04_RELEASE0_REDUCTION_FORMAT_UNSIGNED_32 0x00000000 +#define NVC9C0_QMDV02_04_RELEASE0_REDUCTION_FORMAT_SIGNED_32 0x00000001 +#define NVC9C0_QMDV02_04_RELEASE0_REDUCTION_ENABLE MW(794:794) +#define NVC9C0_QMDV02_04_RELEASE0_REDUCTION_ENABLE_FALSE 0x00000000 +#define NVC9C0_QMDV02_04_RELEASE0_REDUCTION_ENABLE_TRUE 0x00000001 +#define NVC9C0_QMDV02_04_RELEASE0_STRUCTURE_SIZE MW(799:799) +#define NVC9C0_QMDV02_04_RELEASE0_STRUCTURE_SIZE_FOUR_WORDS 0x00000000 +#define NVC9C0_QMDV02_04_RELEASE0_STRUCTURE_SIZE_ONE_WORD 0x00000001 +#define NVC9C0_QMDV02_04_RELEASE0_PAYLOAD MW(831:800) +#define NVC9C0_QMDV02_04_RELEASE1_ADDRESS_LOWER MW(863:832) +#define NVC9C0_QMDV02_04_RELEASE1_ADDRESS_UPPER MW(871:864) +#define NVC9C0_QMDV02_04_RELEASE1_REDUCTION_OP MW(886:884) +#define NVC9C0_QMDV02_04_RELEASE1_REDUCTION_OP_RED_ADD 0x00000000 +#define NVC9C0_QMDV02_04_RELEASE1_REDUCTION_OP_RED_MIN 0x00000001 +#define NVC9C0_QMDV02_04_RELEASE1_REDUCTION_OP_RED_MAX 0x00000002 +#define NVC9C0_QMDV02_04_RELEASE1_REDUCTION_OP_RED_INC 0x00000003 +#define NVC9C0_QMDV02_04_RELEASE1_REDUCTION_OP_RED_DEC 0x00000004 +#define NVC9C0_QMDV02_04_RELEASE1_REDUCTION_OP_RED_AND 0x00000005 +#define NVC9C0_QMDV02_04_RELEASE1_REDUCTION_OP_RED_OR 0x00000006 +#define NVC9C0_QMDV02_04_RELEASE1_REDUCTION_OP_RED_XOR 0x00000007 +#define NVC9C0_QMDV02_04_RELEASE1_REDUCTION_FORMAT MW(889:888) +#define NVC9C0_QMDV02_04_RELEASE1_REDUCTION_FORMAT_UNSIGNED_32 0x00000000 +#define NVC9C0_QMDV02_04_RELEASE1_REDUCTION_FORMAT_SIGNED_32 0x00000001 +#define NVC9C0_QMDV02_04_RELEASE1_REDUCTION_ENABLE MW(890:890) +#define NVC9C0_QMDV02_04_RELEASE1_REDUCTION_ENABLE_FALSE 0x00000000 +#define NVC9C0_QMDV02_04_RELEASE1_REDUCTION_ENABLE_TRUE 0x00000001 +#define NVC9C0_QMDV02_04_RELEASE1_STRUCTURE_SIZE MW(895:895) +#define NVC9C0_QMDV02_04_RELEASE1_STRUCTURE_SIZE_FOUR_WORDS 0x00000000 +#define NVC9C0_QMDV02_04_RELEASE1_STRUCTURE_SIZE_ONE_WORD 0x00000001 +#define NVC9C0_QMDV02_04_RELEASE1_PAYLOAD MW(927:896) +#define NVC9C0_QMDV02_04_SHADER_LOCAL_MEMORY_LOW_SIZE MW(951:928) +#define NVC9C0_QMDV02_04_BARRIER_COUNT MW(959:955) +#define NVC9C0_QMDV02_04_SHADER_LOCAL_MEMORY_HIGH_SIZE MW(983:960) +#define NVC9C0_QMDV02_04_PROGRAM_PREFETCH_ADDR_UPPER_SHIFTED MW(1000:992) +#define NVC9C0_QMDV02_04_PROGRAM_PREFETCH_SIZE MW(1009:1001) +#define NVC9C0_QMDV02_04_PROGRAM_PREFETCH_TYPE MW(1011:1010) +#define NVC9C0_QMDV02_04_PROGRAM_PREFETCH_TYPE_PREFETCH_LAUNCH 0x00000000 +#define NVC9C0_QMDV02_04_PROGRAM_PREFETCH_TYPE_PREFTECH_POST 0x00000001 +#define NVC9C0_QMDV02_04_SASS_VERSION MW(1023:1016) +#define NVC9C0_QMDV02_04_CONSTANT_BUFFER_ADDR_LOWER(i) MW((1055+(i)*64):(1024+(i)*64)) +#define NVC9C0_QMDV02_04_CONSTANT_BUFFER_ADDR_UPPER(i) MW((1072+(i)*64):(1056+(i)*64)) +#define NVC9C0_QMDV02_04_CONSTANT_BUFFER_PREFETCH_POST(i) MW((1073+(i)*64):(1073+(i)*64)) +#define NVC9C0_QMDV02_04_CONSTANT_BUFFER_PREFETCH_POST_FALSE 0x00000000 +#define NVC9C0_QMDV02_04_CONSTANT_BUFFER_PREFETCH_POST_TRUE 0x00000001 +#define NVC9C0_QMDV02_04_CONSTANT_BUFFER_INVALIDATE(i) MW((1074+(i)*64):(1074+(i)*64)) +#define NVC9C0_QMDV02_04_CONSTANT_BUFFER_INVALIDATE_FALSE 0x00000000 +#define NVC9C0_QMDV02_04_CONSTANT_BUFFER_INVALIDATE_TRUE 0x00000001 +#define NVC9C0_QMDV02_04_CONSTANT_BUFFER_SIZE_SHIFTED4(i) MW((1087+(i)*64):(1075+(i)*64)) +#define NVC9C0_QMDV02_04_PROGRAM_ADDRESS_LOWER MW(1567:1536) +#define NVC9C0_QMDV02_04_PROGRAM_ADDRESS_UPPER MW(1584:1568) +#define NVC9C0_QMDV02_04_HW_ONLY_INNER_GET MW(1630:1600) +#define NVC9C0_QMDV02_04_HW_ONLY_REQUIRE_SCHEDULING_PCAS MW(1631:1631) +#define NVC9C0_QMDV02_04_HW_ONLY_INNER_PUT MW(1662:1632) +#define NVC9C0_QMDV02_04_HW_ONLY_SCG_TYPE MW(1663:1663) +#define NVC9C0_QMDV02_04_HW_ONLY_SPAN_LIST_HEAD_INDEX MW(1693:1664) +#define NVC9C0_QMDV02_04_HW_ONLY_SPAN_LIST_HEAD_INDEX_VALID MW(1695:1695) +#define NVC9C0_QMDV02_04_HW_ONLY_SPAN_LIST_HEAD_INDEX_VALID_FALSE 0x00000000 +#define NVC9C0_QMDV02_04_HW_ONLY_SPAN_LIST_HEAD_INDEX_VALID_TRUE 0x00000001 +#define NVC9C0_QMDV02_04_HW_ONLY_SKED_NEXT_QMD_POINTER MW(1727:1696) +#define NVC9C0_QMDV02_04_HW_ONLY_DEPENDENCE_COUNTER MW(1734:1728) +#define NVC9C0_QMDV02_04_QMD_SPARE_H MW(1791:1760) +#define NVC9C0_QMDV02_04_QMD_SPARE_I MW(1823:1792) +#define NVC9C0_QMDV02_04_QMD_SPARE_J MW(1855:1824) +#define NVC9C0_QMDV02_04_QMD_SPARE_K MW(1887:1856) +#define NVC9C0_QMDV02_04_QMD_SPARE_L MW(1919:1888) +#define NVC9C0_QMDV02_04_QMD_SPARE_M MW(1951:1920) +#define NVC9C0_QMDV02_04_QMD_SPARE_N MW(1983:1952) +#define NVC9C0_QMDV02_04_DEBUG_ID_UPPER MW(2015:1984) +#define NVC9C0_QMDV02_04_DEBUG_ID_LOWER MW(2047:2016) + + +/* +** Queue Meta Data, Version 03_00 + */ + +#define NVC9C0_QMDV03_00_OUTER_PUT MW(30:0) +#define NVC9C0_QMDV03_00_OUTER_OVERFLOW MW(31:31) +#define NVC9C0_QMDV03_00_OUTER_GET MW(62:32) +#define NVC9C0_QMDV03_00_OUTER_STICKY_OVERFLOW MW(63:63) +#define NVC9C0_QMDV03_00_INNER_GET MW(94:64) +#define NVC9C0_QMDV03_00_INNER_OVERFLOW MW(95:95) +#define NVC9C0_QMDV03_00_INNER_PUT MW(126:96) +#define NVC9C0_QMDV03_00_INNER_STICKY_OVERFLOW MW(127:127) +#define NVC9C0_QMDV03_00_QMD_GROUP_ID MW(133:128) +#define NVC9C0_QMDV03_00_SM_GLOBAL_CACHING_ENABLE MW(134:134) +#define NVC9C0_QMDV03_00_RUN_CTA_IN_ONE_SM_PARTITION MW(135:135) +#define NVC9C0_QMDV03_00_RUN_CTA_IN_ONE_SM_PARTITION_FALSE 0x00000000 +#define NVC9C0_QMDV03_00_RUN_CTA_IN_ONE_SM_PARTITION_TRUE 0x00000001 +#define NVC9C0_QMDV03_00_IS_QUEUE MW(136:136) +#define NVC9C0_QMDV03_00_IS_QUEUE_FALSE 0x00000000 +#define NVC9C0_QMDV03_00_IS_QUEUE_TRUE 0x00000001 +#define NVC9C0_QMDV03_00_ADD_TO_HEAD_OF_QMD_GROUP_LINKED_LIST MW(137:137) +#define NVC9C0_QMDV03_00_ADD_TO_HEAD_OF_QMD_GROUP_LINKED_LIST_FALSE 0x00000000 +#define NVC9C0_QMDV03_00_ADD_TO_HEAD_OF_QMD_GROUP_LINKED_LIST_TRUE 0x00000001 +#define NVC9C0_QMDV03_00_REQUIRE_SCHEDULING_PCAS MW(140:140) +#define NVC9C0_QMDV03_00_REQUIRE_SCHEDULING_PCAS_FALSE 0x00000000 +#define NVC9C0_QMDV03_00_REQUIRE_SCHEDULING_PCAS_TRUE 0x00000001 +#define NVC9C0_QMDV03_00_DEPENDENCE_COUNTER MW(157:142) +#define NVC9C0_QMDV03_00_SELF_COPY_ON_COMPLETION MW(158:158) +#define NVC9C0_QMDV03_00_SELF_COPY_ON_COMPLETION_FALSE 0x00000000 +#define NVC9C0_QMDV03_00_SELF_COPY_ON_COMPLETION_TRUE 0x00000001 +#define NVC9C0_QMDV03_00_CIRCULAR_QUEUE_SIZE MW(184:160) +#define NVC9C0_QMDV03_00_DEMOTE_L2_EVICT_LAST MW(185:185) +#define NVC9C0_QMDV03_00_INVALIDATE_TEXTURE_HEADER_CACHE MW(186:186) +#define NVC9C0_QMDV03_00_INVALIDATE_TEXTURE_HEADER_CACHE_FALSE 0x00000000 +#define NVC9C0_QMDV03_00_INVALIDATE_TEXTURE_HEADER_CACHE_TRUE 0x00000001 +#define NVC9C0_QMDV03_00_INVALIDATE_TEXTURE_SAMPLER_CACHE MW(187:187) +#define NVC9C0_QMDV03_00_INVALIDATE_TEXTURE_SAMPLER_CACHE_FALSE 0x00000000 +#define NVC9C0_QMDV03_00_INVALIDATE_TEXTURE_SAMPLER_CACHE_TRUE 0x00000001 +#define NVC9C0_QMDV03_00_INVALIDATE_TEXTURE_DATA_CACHE MW(188:188) +#define NVC9C0_QMDV03_00_INVALIDATE_TEXTURE_DATA_CACHE_FALSE 0x00000000 +#define NVC9C0_QMDV03_00_INVALIDATE_TEXTURE_DATA_CACHE_TRUE 0x00000001 +#define NVC9C0_QMDV03_00_INVALIDATE_SHADER_DATA_CACHE MW(189:189) +#define NVC9C0_QMDV03_00_INVALIDATE_SHADER_DATA_CACHE_FALSE 0x00000000 +#define NVC9C0_QMDV03_00_INVALIDATE_SHADER_DATA_CACHE_TRUE 0x00000001 +#define NVC9C0_QMDV03_00_INVALIDATE_INSTRUCTION_CACHE MW(190:190) +#define NVC9C0_QMDV03_00_INVALIDATE_INSTRUCTION_CACHE_FALSE 0x00000000 +#define NVC9C0_QMDV03_00_INVALIDATE_INSTRUCTION_CACHE_TRUE 0x00000001 +#define NVC9C0_QMDV03_00_INVALIDATE_SHADER_CONSTANT_CACHE MW(191:191) +#define NVC9C0_QMDV03_00_INVALIDATE_SHADER_CONSTANT_CACHE_FALSE 0x00000000 +#define NVC9C0_QMDV03_00_INVALIDATE_SHADER_CONSTANT_CACHE_TRUE 0x00000001 +#define NVC9C0_QMDV03_00_CTA_RASTER_WIDTH_RESUME MW(223:192) +#define NVC9C0_QMDV03_00_CTA_RASTER_HEIGHT_RESUME MW(239:224) +#define NVC9C0_QMDV03_00_CTA_RASTER_DEPTH_RESUME MW(255:240) +#define NVC9C0_QMDV03_00_PROGRAM_PREFETCH_ADDR_LOWER_SHIFTED MW(287:256) +#define NVC9C0_QMDV03_00_CIRCULAR_QUEUE_ADDR_LOWER MW(319:288) +#define NVC9C0_QMDV03_00_CIRCULAR_QUEUE_ADDR_UPPER MW(327:320) +#define NVC9C0_QMDV03_00_CIRCULAR_QUEUE_ENTRY_SIZE MW(351:336) +#define NVC9C0_QMDV03_00_CWD_REFERENCE_COUNT_ID MW(357:352) +#define NVC9C0_QMDV03_00_CWD_REFERENCE_COUNT_DELTA_MINUS_ONE MW(365:358) +#define NVC9C0_QMDV03_00_CWD_REFERENCE_COUNT_INCR_ENABLE MW(367:367) +#define NVC9C0_QMDV03_00_CWD_REFERENCE_COUNT_INCR_ENABLE_FALSE 0x00000000 +#define NVC9C0_QMDV03_00_CWD_REFERENCE_COUNT_INCR_ENABLE_TRUE 0x00000001 +#define NVC9C0_QMDV03_00_CWD_MEMBAR_TYPE MW(369:368) +#define NVC9C0_QMDV03_00_CWD_MEMBAR_TYPE_L1_NONE 0x00000000 +#define NVC9C0_QMDV03_00_CWD_MEMBAR_TYPE_L1_SYSMEMBAR 0x00000001 +#define NVC9C0_QMDV03_00_CWD_MEMBAR_TYPE_L1_MEMBAR 0x00000003 +#define NVC9C0_QMDV03_00_SEQUENTIALLY_RUN_CTAS MW(370:370) +#define NVC9C0_QMDV03_00_SEQUENTIALLY_RUN_CTAS_FALSE 0x00000000 +#define NVC9C0_QMDV03_00_SEQUENTIALLY_RUN_CTAS_TRUE 0x00000001 +#define NVC9C0_QMDV03_00_CWD_REFERENCE_COUNT_DECR_ENABLE MW(371:371) +#define NVC9C0_QMDV03_00_CWD_REFERENCE_COUNT_DECR_ENABLE_FALSE 0x00000000 +#define NVC9C0_QMDV03_00_CWD_REFERENCE_COUNT_DECR_ENABLE_TRUE 0x00000001 +#define NVC9C0_QMDV03_00_SM_DISABLE_MASK_EXT_LOWER MW(377:372) +#define NVC9C0_QMDV03_00_API_VISIBLE_CALL_LIMIT MW(378:378) +#define NVC9C0_QMDV03_00_API_VISIBLE_CALL_LIMIT__32 0x00000000 +#define NVC9C0_QMDV03_00_API_VISIBLE_CALL_LIMIT_NO_CHECK 0x00000001 +#define NVC9C0_QMDV03_00_SM_DISABLE_MASK_EXT_UPPER MW(380:379) +#define NVC9C0_QMDV03_00_SAMPLER_INDEX MW(382:382) +#define NVC9C0_QMDV03_00_SAMPLER_INDEX_INDEPENDENTLY 0x00000000 +#define NVC9C0_QMDV03_00_SAMPLER_INDEX_VIA_HEADER_INDEX 0x00000001 +#define NVC9C0_QMDV03_00_DISABLE_AUTO_INVALIDATE MW(383:383) +#define NVC9C0_QMDV03_00_DISABLE_AUTO_INVALIDATE_FALSE 0x00000000 +#define NVC9C0_QMDV03_00_DISABLE_AUTO_INVALIDATE_TRUE 0x00000001 +#define NVC9C0_QMDV03_00_CTA_RASTER_WIDTH MW(415:384) +#define NVC9C0_QMDV03_00_CTA_RASTER_HEIGHT MW(431:416) +#define NVC9C0_QMDV03_00_CTA_RASTER_DEPTH MW(463:448) +#define NVC9C0_QMDV03_00_DEPENDENT_QMD0_POINTER MW(511:480) +#define NVC9C0_QMDV03_00_DEPENDENT_QMD0_ENABLE MW(512:512) +#define NVC9C0_QMDV03_00_DEPENDENT_QMD0_ENABLE_FALSE 0x00000000 +#define NVC9C0_QMDV03_00_DEPENDENT_QMD0_ENABLE_TRUE 0x00000001 +#define NVC9C0_QMDV03_00_DEPENDENT_QMD0_ACTION MW(515:513) +#define NVC9C0_QMDV03_00_DEPENDENT_QMD0_ACTION_QMD_INCREMENT_PUT 0x00000000 +#define NVC9C0_QMDV03_00_DEPENDENT_QMD0_ACTION_QMD_SCHEDULE 0x00000001 +#define NVC9C0_QMDV03_00_DEPENDENT_QMD0_ACTION_QMD_INVALIDATE_COPY_SCHEDULE 0x00000003 +#define NVC9C0_QMDV03_00_DEPENDENT_QMD0_ACTION_QMD_DECREMENT_DEPENDENCE 0x00000004 +#define NVC9C0_QMDV03_00_DEPENDENT_QMD0_PREFETCH MW(516:516) +#define NVC9C0_QMDV03_00_DEPENDENT_QMD0_PREFETCH_FALSE 0x00000000 +#define NVC9C0_QMDV03_00_DEPENDENT_QMD0_PREFETCH_TRUE 0x00000001 +#define NVC9C0_QMDV03_00_DEPENDENT_QMD1_ENABLE MW(517:517) +#define NVC9C0_QMDV03_00_DEPENDENT_QMD1_ENABLE_FALSE 0x00000000 +#define NVC9C0_QMDV03_00_DEPENDENT_QMD1_ENABLE_TRUE 0x00000001 +#define NVC9C0_QMDV03_00_DEPENDENT_QMD1_ACTION MW(520:518) +#define NVC9C0_QMDV03_00_DEPENDENT_QMD1_ACTION_QMD_INCREMENT_PUT 0x00000000 +#define NVC9C0_QMDV03_00_DEPENDENT_QMD1_ACTION_QMD_SCHEDULE 0x00000001 +#define NVC9C0_QMDV03_00_DEPENDENT_QMD1_ACTION_QMD_INVALIDATE_COPY_SCHEDULE 0x00000003 +#define NVC9C0_QMDV03_00_DEPENDENT_QMD1_ACTION_QMD_DECREMENT_DEPENDENCE 0x00000004 +#define NVC9C0_QMDV03_00_DEPENDENT_QMD1_PREFETCH MW(521:521) +#define NVC9C0_QMDV03_00_DEPENDENT_QMD1_PREFETCH_FALSE 0x00000000 +#define NVC9C0_QMDV03_00_DEPENDENT_QMD1_PREFETCH_TRUE 0x00000001 +#define NVC9C0_QMDV03_00_COALESCE_WAITING_PERIOD MW(529:522) +#define NVC9C0_QMDV03_00_QUEUE_ENTRIES_PER_CTA_LOG2 MW(534:530) +#define NVC9C0_QMDV03_00_OCCUPANCY_THRESHOLD_SHARED_MEM MW(542:535) +#define NVC9C0_QMDV03_00_CTA_LAUNCH_QUEUE MW(543:543) +#define NVC9C0_QMDV03_00_SHARED_MEMORY_SIZE MW(561:544) +#define NVC9C0_QMDV03_00_MIN_SM_CONFIG_SHARED_MEM_SIZE MW(567:562) +#define NVC9C0_QMDV03_00_MAX_SM_CONFIG_SHARED_MEM_SIZE MW(574:569) +#define NVC9C0_QMDV03_00_QMD_VERSION MW(579:576) +#define NVC9C0_QMDV03_00_QMD_MAJOR_VERSION MW(583:580) +#define NVC9C0_QMDV03_00_OCCUPANCY_MAX_SHARED_MEM MW(591:584) +#define NVC9C0_QMDV03_00_CTA_THREAD_DIMENSION0 MW(607:592) +#define NVC9C0_QMDV03_00_CTA_THREAD_DIMENSION1 MW(623:608) +#define NVC9C0_QMDV03_00_CTA_THREAD_DIMENSION2 MW(639:624) +#define NVC9C0_QMDV03_00_CONSTANT_BUFFER_VALID(i) MW((640+(i)*1):(640+(i)*1)) +#define NVC9C0_QMDV03_00_CONSTANT_BUFFER_VALID_FALSE 0x00000000 +#define NVC9C0_QMDV03_00_CONSTANT_BUFFER_VALID_TRUE 0x00000001 +#define NVC9C0_QMDV03_00_REGISTER_COUNT_V MW(656:648) +#define NVC9C0_QMDV03_00_TARGET_SM_CONFIG_SHARED_MEM_SIZE MW(662:657) +#define NVC9C0_QMDV03_00_SHARED_ALLOCATION_ENABLE MW(663:663) +#define NVC9C0_QMDV03_00_SHARED_ALLOCATION_ENABLE_FALSE 0x00000000 +#define NVC9C0_QMDV03_00_SHARED_ALLOCATION_ENABLE_TRUE 0x00000001 +#define NVC9C0_QMDV03_00_FREE_CTA_SLOTS_EMPTY_SM MW(671:664) +#define NVC9C0_QMDV03_00_SM_DISABLE_MASK_LOWER MW(703:672) +#define NVC9C0_QMDV03_00_SM_DISABLE_MASK_UPPER MW(735:704) +#define NVC9C0_QMDV03_00_SHADER_LOCAL_MEMORY_LOW_SIZE MW(759:736) +#define NVC9C0_QMDV03_00_BARRIER_COUNT MW(767:763) +#define NVC9C0_QMDV03_00_RELEASE0_ADDRESS_LOWER MW(799:768) +#define NVC9C0_QMDV03_00_RELEASE0_ADDRESS_UPPER MW(807:800) +#define NVC9C0_QMDV03_00_RELEASE0_MEMBAR_TYPE MW(819:819) +#define NVC9C0_QMDV03_00_RELEASE0_MEMBAR_TYPE_FE_NONE 0x00000000 +#define NVC9C0_QMDV03_00_RELEASE0_MEMBAR_TYPE_FE_SYSMEMBAR 0x00000001 +#define NVC9C0_QMDV03_00_RELEASE0_REDUCTION_OP MW(822:820) +#define NVC9C0_QMDV03_00_RELEASE0_REDUCTION_OP_RED_ADD 0x00000000 +#define NVC9C0_QMDV03_00_RELEASE0_REDUCTION_OP_RED_MIN 0x00000001 +#define NVC9C0_QMDV03_00_RELEASE0_REDUCTION_OP_RED_MAX 0x00000002 +#define NVC9C0_QMDV03_00_RELEASE0_REDUCTION_OP_RED_INC 0x00000003 +#define NVC9C0_QMDV03_00_RELEASE0_REDUCTION_OP_RED_DEC 0x00000004 +#define NVC9C0_QMDV03_00_RELEASE0_REDUCTION_OP_RED_AND 0x00000005 +#define NVC9C0_QMDV03_00_RELEASE0_REDUCTION_OP_RED_OR 0x00000006 +#define NVC9C0_QMDV03_00_RELEASE0_REDUCTION_OP_RED_XOR 0x00000007 +#define NVC9C0_QMDV03_00_RELEASE0_ENABLE MW(823:823) +#define NVC9C0_QMDV03_00_RELEASE0_ENABLE_FALSE 0x00000000 +#define NVC9C0_QMDV03_00_RELEASE0_ENABLE_TRUE 0x00000001 +#define NVC9C0_QMDV03_00_RELEASE0_REDUCTION_FORMAT MW(825:824) +#define NVC9C0_QMDV03_00_RELEASE0_REDUCTION_FORMAT_UNSIGNED 0x00000000 +#define NVC9C0_QMDV03_00_RELEASE0_REDUCTION_FORMAT_SIGNED 0x00000001 +#define NVC9C0_QMDV03_00_RELEASE0_REDUCTION_ENABLE MW(826:826) +#define NVC9C0_QMDV03_00_RELEASE0_REDUCTION_ENABLE_FALSE 0x00000000 +#define NVC9C0_QMDV03_00_RELEASE0_REDUCTION_ENABLE_TRUE 0x00000001 +#define NVC9C0_QMDV03_00_RELEASE0_TRAP_TYPE MW(828:827) +#define NVC9C0_QMDV03_00_RELEASE0_TRAP_TYPE_TRAP_NONE 0x00000000 +#define NVC9C0_QMDV03_00_RELEASE0_TRAP_TYPE_TRAP_UNCONDITIONAL 0x00000001 +#define NVC9C0_QMDV03_00_RELEASE0_TRAP_TYPE_TRAP_CONDITIONAL 0x00000002 +#define NVC9C0_QMDV03_00_RELEASE0_TRAP_TYPE_TRAP_CONDITIONAL_EXT 0x00000003 +#define NVC9C0_QMDV03_00_RELEASE0_PAYLOAD64B MW(829:829) +#define NVC9C0_QMDV03_00_RELEASE0_PAYLOAD64B_FALSE 0x00000000 +#define NVC9C0_QMDV03_00_RELEASE0_PAYLOAD64B_TRUE 0x00000001 +#define NVC9C0_QMDV03_00_RELEASE0_STRUCTURE_SIZE MW(831:830) +#define NVC9C0_QMDV03_00_RELEASE0_STRUCTURE_SIZE_SEMAPHORE_FOUR_WORDS 0x00000000 +#define NVC9C0_QMDV03_00_RELEASE0_STRUCTURE_SIZE_SEMAPHORE_ONE_WORD 0x00000001 +#define NVC9C0_QMDV03_00_RELEASE0_STRUCTURE_SIZE_SEMAPHORE_TWO_WORDS 0x00000002 +#define NVC9C0_QMDV03_00_RELEASE0_PAYLOAD_LOWER MW(863:832) +#define NVC9C0_QMDV03_00_RELEASE0_PAYLOAD_UPPER MW(895:864) +#define NVC9C0_QMDV03_00_RELEASE1_ADDRESS_LOWER MW(927:896) +#define NVC9C0_QMDV03_00_RELEASE1_ADDRESS_UPPER MW(935:928) +#define NVC9C0_QMDV03_00_RELEASE1_MEMBAR_TYPE MW(947:947) +#define NVC9C0_QMDV03_00_RELEASE1_MEMBAR_TYPE_FE_NONE 0x00000000 +#define NVC9C0_QMDV03_00_RELEASE1_MEMBAR_TYPE_FE_SYSMEMBAR 0x00000001 +#define NVC9C0_QMDV03_00_RELEASE1_REDUCTION_OP MW(950:948) +#define NVC9C0_QMDV03_00_RELEASE1_REDUCTION_OP_RED_ADD 0x00000000 +#define NVC9C0_QMDV03_00_RELEASE1_REDUCTION_OP_RED_MIN 0x00000001 +#define NVC9C0_QMDV03_00_RELEASE1_REDUCTION_OP_RED_MAX 0x00000002 +#define NVC9C0_QMDV03_00_RELEASE1_REDUCTION_OP_RED_INC 0x00000003 +#define NVC9C0_QMDV03_00_RELEASE1_REDUCTION_OP_RED_DEC 0x00000004 +#define NVC9C0_QMDV03_00_RELEASE1_REDUCTION_OP_RED_AND 0x00000005 +#define NVC9C0_QMDV03_00_RELEASE1_REDUCTION_OP_RED_OR 0x00000006 +#define NVC9C0_QMDV03_00_RELEASE1_REDUCTION_OP_RED_XOR 0x00000007 +#define NVC9C0_QMDV03_00_RELEASE1_ENABLE MW(951:951) +#define NVC9C0_QMDV03_00_RELEASE1_ENABLE_FALSE 0x00000000 +#define NVC9C0_QMDV03_00_RELEASE1_ENABLE_TRUE 0x00000001 +#define NVC9C0_QMDV03_00_RELEASE1_REDUCTION_FORMAT MW(953:952) +#define NVC9C0_QMDV03_00_RELEASE1_REDUCTION_FORMAT_UNSIGNED 0x00000000 +#define NVC9C0_QMDV03_00_RELEASE1_REDUCTION_FORMAT_SIGNED 0x00000001 +#define NVC9C0_QMDV03_00_RELEASE1_REDUCTION_ENABLE MW(954:954) +#define NVC9C0_QMDV03_00_RELEASE1_REDUCTION_ENABLE_FALSE 0x00000000 +#define NVC9C0_QMDV03_00_RELEASE1_REDUCTION_ENABLE_TRUE 0x00000001 +#define NVC9C0_QMDV03_00_RELEASE1_TRAP_TYPE MW(956:955) +#define NVC9C0_QMDV03_00_RELEASE1_TRAP_TYPE_TRAP_NONE 0x00000000 +#define NVC9C0_QMDV03_00_RELEASE1_TRAP_TYPE_TRAP_UNCONDITIONAL 0x00000001 +#define NVC9C0_QMDV03_00_RELEASE1_TRAP_TYPE_TRAP_CONDITIONAL 0x00000002 +#define NVC9C0_QMDV03_00_RELEASE1_TRAP_TYPE_TRAP_CONDITIONAL_EXT 0x00000003 +#define NVC9C0_QMDV03_00_RELEASE1_PAYLOAD64B MW(957:957) +#define NVC9C0_QMDV03_00_RELEASE1_PAYLOAD64B_FALSE 0x00000000 +#define NVC9C0_QMDV03_00_RELEASE1_PAYLOAD64B_TRUE 0x00000001 +#define NVC9C0_QMDV03_00_RELEASE1_STRUCTURE_SIZE MW(959:958) +#define NVC9C0_QMDV03_00_RELEASE1_STRUCTURE_SIZE_SEMAPHORE_FOUR_WORDS 0x00000000 +#define NVC9C0_QMDV03_00_RELEASE1_STRUCTURE_SIZE_SEMAPHORE_ONE_WORD 0x00000001 +#define NVC9C0_QMDV03_00_RELEASE1_STRUCTURE_SIZE_SEMAPHORE_TWO_WORDS 0x00000002 +#define NVC9C0_QMDV03_00_RELEASE1_PAYLOAD_LOWER MW(991:960) +#define NVC9C0_QMDV03_00_RELEASE1_PAYLOAD_UPPER MW(1023:992) +#define NVC9C0_QMDV03_00_CONSTANT_BUFFER_ADDR_LOWER(i) MW((1055+(i)*64):(1024+(i)*64)) +#define NVC9C0_QMDV03_00_CONSTANT_BUFFER_ADDR_UPPER(i) MW((1072+(i)*64):(1056+(i)*64)) +#define NVC9C0_QMDV03_00_CONSTANT_BUFFER_PREFETCH_POST(i) MW((1073+(i)*64):(1073+(i)*64)) +#define NVC9C0_QMDV03_00_CONSTANT_BUFFER_PREFETCH_POST_FALSE 0x00000000 +#define NVC9C0_QMDV03_00_CONSTANT_BUFFER_PREFETCH_POST_TRUE 0x00000001 +#define NVC9C0_QMDV03_00_CONSTANT_BUFFER_INVALIDATE(i) MW((1074+(i)*64):(1074+(i)*64)) +#define NVC9C0_QMDV03_00_CONSTANT_BUFFER_INVALIDATE_FALSE 0x00000000 +#define NVC9C0_QMDV03_00_CONSTANT_BUFFER_INVALIDATE_TRUE 0x00000001 +#define NVC9C0_QMDV03_00_CONSTANT_BUFFER_SIZE_SHIFTED4(i) MW((1087+(i)*64):(1075+(i)*64)) +#define NVC9C0_QMDV03_00_PROGRAM_ADDRESS_LOWER MW(1567:1536) +#define NVC9C0_QMDV03_00_PROGRAM_ADDRESS_UPPER MW(1584:1568) +#define NVC9C0_QMDV03_00_SHADER_LOCAL_MEMORY_HIGH_SIZE MW(1623:1600) +#define NVC9C0_QMDV03_00_PROGRAM_PREFETCH_ADDR_UPPER_SHIFTED MW(1640:1632) +#define NVC9C0_QMDV03_00_PROGRAM_PREFETCH_SIZE MW(1649:1641) +#define NVC9C0_QMDV03_00_PROGRAM_PREFETCH_TYPE MW(1651:1650) +#define NVC9C0_QMDV03_00_PROGRAM_PREFETCH_TYPE_PREFETCH_LAUNCH 0x00000000 +#define NVC9C0_QMDV03_00_PROGRAM_PREFETCH_TYPE_PREFTECH_POST 0x00000001 +#define NVC9C0_QMDV03_00_SASS_VERSION MW(1663:1656) +#define NVC9C0_QMDV03_00_RELEASE2_ADDRESS_LOWER MW(1695:1664) +#define NVC9C0_QMDV03_00_RELEASE2_ADDRESS_UPPER MW(1703:1696) +#define NVC9C0_QMDV03_00_RELEASE2_MEMBAR_TYPE MW(1715:1715) +#define NVC9C0_QMDV03_00_RELEASE2_MEMBAR_TYPE_FE_NONE 0x00000000 +#define NVC9C0_QMDV03_00_RELEASE2_MEMBAR_TYPE_FE_SYSMEMBAR 0x00000001 +#define NVC9C0_QMDV03_00_RELEASE2_REDUCTION_OP MW(1718:1716) +#define NVC9C0_QMDV03_00_RELEASE2_REDUCTION_OP_RED_ADD 0x00000000 +#define NVC9C0_QMDV03_00_RELEASE2_REDUCTION_OP_RED_MIN 0x00000001 +#define NVC9C0_QMDV03_00_RELEASE2_REDUCTION_OP_RED_MAX 0x00000002 +#define NVC9C0_QMDV03_00_RELEASE2_REDUCTION_OP_RED_INC 0x00000003 +#define NVC9C0_QMDV03_00_RELEASE2_REDUCTION_OP_RED_DEC 0x00000004 +#define NVC9C0_QMDV03_00_RELEASE2_REDUCTION_OP_RED_AND 0x00000005 +#define NVC9C0_QMDV03_00_RELEASE2_REDUCTION_OP_RED_OR 0x00000006 +#define NVC9C0_QMDV03_00_RELEASE2_REDUCTION_OP_RED_XOR 0x00000007 +#define NVC9C0_QMDV03_00_RELEASE2_ENABLE MW(1719:1719) +#define NVC9C0_QMDV03_00_RELEASE2_ENABLE_FALSE 0x00000000 +#define NVC9C0_QMDV03_00_RELEASE2_ENABLE_TRUE 0x00000001 +#define NVC9C0_QMDV03_00_RELEASE2_REDUCTION_FORMAT MW(1721:1720) +#define NVC9C0_QMDV03_00_RELEASE2_REDUCTION_FORMAT_UNSIGNED 0x00000000 +#define NVC9C0_QMDV03_00_RELEASE2_REDUCTION_FORMAT_SIGNED 0x00000001 +#define NVC9C0_QMDV03_00_RELEASE2_REDUCTION_ENABLE MW(1722:1722) +#define NVC9C0_QMDV03_00_RELEASE2_REDUCTION_ENABLE_FALSE 0x00000000 +#define NVC9C0_QMDV03_00_RELEASE2_REDUCTION_ENABLE_TRUE 0x00000001 +#define NVC9C0_QMDV03_00_RELEASE2_TRAP_TYPE MW(1724:1723) +#define NVC9C0_QMDV03_00_RELEASE2_TRAP_TYPE_TRAP_NONE 0x00000000 +#define NVC9C0_QMDV03_00_RELEASE2_TRAP_TYPE_TRAP_UNCONDITIONAL 0x00000001 +#define NVC9C0_QMDV03_00_RELEASE2_TRAP_TYPE_TRAP_CONDITIONAL 0x00000002 +#define NVC9C0_QMDV03_00_RELEASE2_TRAP_TYPE_TRAP_CONDITIONAL_EXT 0x00000003 +#define NVC9C0_QMDV03_00_RELEASE2_PAYLOAD64B MW(1725:1725) +#define NVC9C0_QMDV03_00_RELEASE2_PAYLOAD64B_FALSE 0x00000000 +#define NVC9C0_QMDV03_00_RELEASE2_PAYLOAD64B_TRUE 0x00000001 +#define NVC9C0_QMDV03_00_RELEASE2_STRUCTURE_SIZE MW(1727:1726) +#define NVC9C0_QMDV03_00_RELEASE2_STRUCTURE_SIZE_SEMAPHORE_FOUR_WORDS 0x00000000 +#define NVC9C0_QMDV03_00_RELEASE2_STRUCTURE_SIZE_SEMAPHORE_ONE_WORD 0x00000001 +#define NVC9C0_QMDV03_00_RELEASE2_STRUCTURE_SIZE_SEMAPHORE_TWO_WORDS 0x00000002 +#define NVC9C0_QMDV03_00_RELEASE2_PAYLOAD_LOWER MW(1759:1728) +#define NVC9C0_QMDV03_00_RELEASE2_PAYLOAD_UPPER MW(1791:1760) +#define NVC9C0_QMDV03_00_OCCUPANCY_THRESHOLD_WARP MW(1799:1792) +#define NVC9C0_QMDV03_00_OCCUPANCY_MAX_WARP MW(1807:1800) +#define NVC9C0_QMDV03_00_OCCUPANCY_THRESHOLD_REGISTER MW(1815:1808) +#define NVC9C0_QMDV03_00_OCCUPANCY_MAX_REGISTER MW(1823:1816) +#define NVC9C0_QMDV03_00_HW_ONLY_INNER_GET MW(1854:1824) +#define NVC9C0_QMDV03_00_HW_ONLY_REQUIRE_SCHEDULING_PCAS MW(1855:1855) +#define NVC9C0_QMDV03_00_HW_ONLY_INNER_PUT MW(1886:1856) +#define NVC9C0_QMDV03_00_HW_ONLY_SPAN_LIST_HEAD_INDEX MW(1917:1888) +#define NVC9C0_QMDV03_00_HW_ONLY_SPAN_LIST_HEAD_INDEX_VALID MW(1919:1919) +#define NVC9C0_QMDV03_00_HW_ONLY_SPAN_LIST_HEAD_INDEX_VALID_FALSE 0x00000000 +#define NVC9C0_QMDV03_00_HW_ONLY_SPAN_LIST_HEAD_INDEX_VALID_TRUE 0x00000001 +#define NVC9C0_QMDV03_00_HW_ONLY_SKED_NEXT_QMD_POINTER MW(1951:1920) +#define NVC9C0_QMDV03_00_HW_ONLY_DEPENDENCE_COUNTER MW(1967:1952) +#define NVC9C0_QMDV03_00_DEBUG_ID_UPPER MW(2015:1984) +#define NVC9C0_QMDV03_00_DEBUG_ID_LOWER MW(2047:2016) + + + +#endif // #ifndef __CLC9C0QMD_H__ diff --git a/src/nouveau/headers/nvidia/classes/clcbc0.h b/src/nouveau/headers/nvidia/classes/clcbc0.h new file mode 100644 index 00000000000..ece004f7a07 --- /dev/null +++ b/src/nouveau/headers/nvidia/classes/clcbc0.h @@ -0,0 +1,843 @@ +/******************************************************************************* + Copyright (c) 2023, NVIDIA CORPORATION. All rights reserved. + + Permission is hereby granted, free of charge, to any person obtaining a + copy of this software and associated documentation files (the "Software"), + to deal in the Software without restriction, including without limitation + the rights to use, copy, modify, merge, publish, distribute, sublicense, + and/or sell copies of the Software, and to permit persons to whom the + Software is furnished to do so, subject to the following conditions: + + The above copyright notice and this permission notice shall be included in + all copies or substantial portions of the Software. + + THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR + IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, + FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL + THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER + LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING + FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER + DEALINGS IN THE SOFTWARE. + +*******************************************************************************/ + +#ifndef _cl_hopper_compute_a_h_ +#define _cl_hopper_compute_a_h_ + +/* AUTO GENERATED FILE -- DO NOT EDIT */ +/* Command: ../../../../class/bin/sw_header.pl hopper_compute_a */ + +#include "nvtypes.h" + +#define HOPPER_COMPUTE_A 0xCBC0 + +#define NVCBC0_SET_OBJECT 0x0000 +#define NVCBC0_SET_OBJECT_CLASS_ID 15:0 +#define NVCBC0_SET_OBJECT_ENGINE_ID 20:16 + +#define NVCBC0_NO_OPERATION 0x0100 +#define NVCBC0_NO_OPERATION_V 31:0 + +#define NVCBC0_SET_NOTIFY_A 0x0104 +#define NVCBC0_SET_NOTIFY_A_ADDRESS_UPPER 24:0 + +#define NVCBC0_SET_NOTIFY_B 0x0108 +#define NVCBC0_SET_NOTIFY_B_ADDRESS_LOWER 31:0 + +#define NVCBC0_NOTIFY 0x010c +#define NVCBC0_NOTIFY_TYPE 31:0 +#define NVCBC0_NOTIFY_TYPE_WRITE_ONLY 0x00000000 +#define NVCBC0_NOTIFY_TYPE_WRITE_THEN_AWAKEN 0x00000001 + +#define NVCBC0_WAIT_FOR_IDLE 0x0110 +#define NVCBC0_WAIT_FOR_IDLE_V 31:0 + +#define NVCBC0_LOAD_MME_INSTRUCTION_RAM_POINTER 0x0114 +#define NVCBC0_LOAD_MME_INSTRUCTION_RAM_POINTER_V 31:0 + +#define NVCBC0_LOAD_MME_INSTRUCTION_RAM 0x0118 +#define NVCBC0_LOAD_MME_INSTRUCTION_RAM_V 31:0 + +#define NVCBC0_LOAD_MME_START_ADDRESS_RAM_POINTER 0x011c +#define NVCBC0_LOAD_MME_START_ADDRESS_RAM_POINTER_V 31:0 + +#define NVCBC0_LOAD_MME_START_ADDRESS_RAM 0x0120 +#define NVCBC0_LOAD_MME_START_ADDRESS_RAM_V 31:0 + +#define NVCBC0_SET_MME_SHADOW_RAM_CONTROL 0x0124 +#define NVCBC0_SET_MME_SHADOW_RAM_CONTROL_MODE 1:0 +#define NVCBC0_SET_MME_SHADOW_RAM_CONTROL_MODE_METHOD_TRACK 0x00000000 +#define NVCBC0_SET_MME_SHADOW_RAM_CONTROL_MODE_METHOD_TRACK_WITH_FILTER 0x00000001 +#define NVCBC0_SET_MME_SHADOW_RAM_CONTROL_MODE_METHOD_PASSTHROUGH 0x00000002 +#define NVCBC0_SET_MME_SHADOW_RAM_CONTROL_MODE_METHOD_REPLAY 0x00000003 + +#define NVCBC0_SET_GLOBAL_RENDER_ENABLE_A 0x0130 +#define NVCBC0_SET_GLOBAL_RENDER_ENABLE_A_OFFSET_UPPER 7:0 + +#define NVCBC0_SET_GLOBAL_RENDER_ENABLE_B 0x0134 +#define NVCBC0_SET_GLOBAL_RENDER_ENABLE_B_OFFSET_LOWER 31:0 + +#define NVCBC0_SET_GLOBAL_RENDER_ENABLE_C 0x0138 +#define NVCBC0_SET_GLOBAL_RENDER_ENABLE_C_MODE 2:0 +#define NVCBC0_SET_GLOBAL_RENDER_ENABLE_C_MODE_FALSE 0x00000000 +#define NVCBC0_SET_GLOBAL_RENDER_ENABLE_C_MODE_TRUE 0x00000001 +#define NVCBC0_SET_GLOBAL_RENDER_ENABLE_C_MODE_CONDITIONAL 0x00000002 +#define NVCBC0_SET_GLOBAL_RENDER_ENABLE_C_MODE_RENDER_IF_EQUAL 0x00000003 +#define NVCBC0_SET_GLOBAL_RENDER_ENABLE_C_MODE_RENDER_IF_NOT_EQUAL 0x00000004 + +#define NVCBC0_SEND_GO_IDLE 0x013c +#define NVCBC0_SEND_GO_IDLE_V 31:0 + +#define NVCBC0_PM_TRIGGER 0x0140 +#define NVCBC0_PM_TRIGGER_V 31:0 + +#define NVCBC0_PM_TRIGGER_WFI 0x0144 +#define NVCBC0_PM_TRIGGER_WFI_V 31:0 + +#define NVCBC0_FE_ATOMIC_SEQUENCE_BEGIN 0x0148 +#define NVCBC0_FE_ATOMIC_SEQUENCE_BEGIN_V 31:0 + +#define NVCBC0_FE_ATOMIC_SEQUENCE_END 0x014c +#define NVCBC0_FE_ATOMIC_SEQUENCE_END_V 31:0 + +#define NVCBC0_SET_INSTRUMENTATION_METHOD_HEADER 0x0150 +#define NVCBC0_SET_INSTRUMENTATION_METHOD_HEADER_V 31:0 + +#define NVCBC0_SET_INSTRUMENTATION_METHOD_DATA 0x0154 +#define NVCBC0_SET_INSTRUMENTATION_METHOD_DATA_V 31:0 + +#define NVCBC0_SET_REPORT_SEMAPHORE_PAYLOAD_LOWER 0x0158 +#define NVCBC0_SET_REPORT_SEMAPHORE_PAYLOAD_LOWER_PAYLOAD_LOWER 31:0 + +#define NVCBC0_SET_REPORT_SEMAPHORE_PAYLOAD_UPPER 0x015c +#define NVCBC0_SET_REPORT_SEMAPHORE_PAYLOAD_UPPER_PAYLOAD_UPPER 31:0 + +#define NVCBC0_SET_REPORT_SEMAPHORE_ADDRESS_LOWER 0x0160 +#define NVCBC0_SET_REPORT_SEMAPHORE_ADDRESS_LOWER_LOWER 31:0 + +#define NVCBC0_SET_REPORT_SEMAPHORE_ADDRESS_UPPER 0x0164 +#define NVCBC0_SET_REPORT_SEMAPHORE_ADDRESS_UPPER_UPPER 24:0 + +#define NVCBC0_REPORT_SEMAPHORE_EXECUTE 0x0168 +#define NVCBC0_REPORT_SEMAPHORE_EXECUTE_OPERATION 1:0 +#define NVCBC0_REPORT_SEMAPHORE_EXECUTE_OPERATION_RELEASE 0x00000000 +#define NVCBC0_REPORT_SEMAPHORE_EXECUTE_OPERATION_ACQUIRE 0x00000001 +#define NVCBC0_REPORT_SEMAPHORE_EXECUTE_OPERATION_REPORT_ONLY 0x00000002 +#define NVCBC0_REPORT_SEMAPHORE_EXECUTE_OPERATION_TRAP 0x00000003 +#define NVCBC0_REPORT_SEMAPHORE_EXECUTE_AWAKEN_ENABLE 2:2 +#define NVCBC0_REPORT_SEMAPHORE_EXECUTE_AWAKEN_ENABLE_FALSE 0x00000000 +#define NVCBC0_REPORT_SEMAPHORE_EXECUTE_AWAKEN_ENABLE_TRUE 0x00000001 +#define NVCBC0_REPORT_SEMAPHORE_EXECUTE_STRUCTURE_SIZE 4:3 +#define NVCBC0_REPORT_SEMAPHORE_EXECUTE_STRUCTURE_SIZE_SEMAPHORE_FOUR_WORDS 0x00000000 +#define NVCBC0_REPORT_SEMAPHORE_EXECUTE_STRUCTURE_SIZE_SEMAPHORE_ONE_WORD 0x00000001 +#define NVCBC0_REPORT_SEMAPHORE_EXECUTE_STRUCTURE_SIZE_SEMAPHORE_TWO_WORDS 0x00000002 +#define NVCBC0_REPORT_SEMAPHORE_EXECUTE_FLUSH_DISABLE 5:5 +#define NVCBC0_REPORT_SEMAPHORE_EXECUTE_FLUSH_DISABLE_FALSE 0x00000000 +#define NVCBC0_REPORT_SEMAPHORE_EXECUTE_FLUSH_DISABLE_TRUE 0x00000001 +#define NVCBC0_REPORT_SEMAPHORE_EXECUTE_REDUCTION_ENABLE 6:6 +#define NVCBC0_REPORT_SEMAPHORE_EXECUTE_REDUCTION_ENABLE_FALSE 0x00000000 +#define NVCBC0_REPORT_SEMAPHORE_EXECUTE_REDUCTION_ENABLE_TRUE 0x00000001 +#define NVCBC0_REPORT_SEMAPHORE_EXECUTE_REDUCTION_OP 9:7 +#define NVCBC0_REPORT_SEMAPHORE_EXECUTE_REDUCTION_OP_RED_ADD 0x00000000 +#define NVCBC0_REPORT_SEMAPHORE_EXECUTE_REDUCTION_OP_RED_MIN 0x00000001 +#define NVCBC0_REPORT_SEMAPHORE_EXECUTE_REDUCTION_OP_RED_MAX 0x00000002 +#define NVCBC0_REPORT_SEMAPHORE_EXECUTE_REDUCTION_OP_RED_INC 0x00000003 +#define NVCBC0_REPORT_SEMAPHORE_EXECUTE_REDUCTION_OP_RED_DEC 0x00000004 +#define NVCBC0_REPORT_SEMAPHORE_EXECUTE_REDUCTION_OP_RED_AND 0x00000005 +#define NVCBC0_REPORT_SEMAPHORE_EXECUTE_REDUCTION_OP_RED_OR 0x00000006 +#define NVCBC0_REPORT_SEMAPHORE_EXECUTE_REDUCTION_OP_RED_XOR 0x00000007 +#define NVCBC0_REPORT_SEMAPHORE_EXECUTE_REDUCTION_FORMAT 11:10 +#define NVCBC0_REPORT_SEMAPHORE_EXECUTE_REDUCTION_FORMAT_UNSIGNED 0x00000000 +#define NVCBC0_REPORT_SEMAPHORE_EXECUTE_REDUCTION_FORMAT_SIGNED 0x00000001 +#define NVCBC0_REPORT_SEMAPHORE_EXECUTE_PAYLOAD_SIZE64 12:12 +#define NVCBC0_REPORT_SEMAPHORE_EXECUTE_PAYLOAD_SIZE64_FALSE 0x00000000 +#define NVCBC0_REPORT_SEMAPHORE_EXECUTE_PAYLOAD_SIZE64_TRUE 0x00000001 +#define NVCBC0_REPORT_SEMAPHORE_EXECUTE_TRAP_TYPE 14:13 +#define NVCBC0_REPORT_SEMAPHORE_EXECUTE_TRAP_TYPE_TRAP_NONE 0x00000000 +#define NVCBC0_REPORT_SEMAPHORE_EXECUTE_TRAP_TYPE_TRAP_UNCONDITIONAL 0x00000001 +#define NVCBC0_REPORT_SEMAPHORE_EXECUTE_TRAP_TYPE_TRAP_CONDITIONAL 0x00000002 +#define NVCBC0_REPORT_SEMAPHORE_EXECUTE_TRAP_TYPE_TRAP_CONDITIONAL_EXT 0x00000003 + +#define NVCBC0_LINE_LENGTH_IN 0x0180 +#define NVCBC0_LINE_LENGTH_IN_VALUE 31:0 + +#define NVCBC0_LINE_COUNT 0x0184 +#define NVCBC0_LINE_COUNT_VALUE 31:0 + +#define NVCBC0_OFFSET_OUT_UPPER 0x0188 +#define NVCBC0_OFFSET_OUT_UPPER_VALUE 24:0 + +#define NVCBC0_OFFSET_OUT 0x018c +#define NVCBC0_OFFSET_OUT_VALUE 31:0 + +#define NVCBC0_PITCH_OUT 0x0190 +#define NVCBC0_PITCH_OUT_VALUE 31:0 + +#define NVCBC0_SET_DST_BLOCK_SIZE 0x0194 +#define NVCBC0_SET_DST_BLOCK_SIZE_WIDTH 3:0 +#define NVCBC0_SET_DST_BLOCK_SIZE_WIDTH_ONE_GOB 0x00000000 +#define NVCBC0_SET_DST_BLOCK_SIZE_HEIGHT 7:4 +#define NVCBC0_SET_DST_BLOCK_SIZE_HEIGHT_ONE_GOB 0x00000000 +#define NVCBC0_SET_DST_BLOCK_SIZE_HEIGHT_TWO_GOBS 0x00000001 +#define NVCBC0_SET_DST_BLOCK_SIZE_HEIGHT_FOUR_GOBS 0x00000002 +#define NVCBC0_SET_DST_BLOCK_SIZE_HEIGHT_EIGHT_GOBS 0x00000003 +#define NVCBC0_SET_DST_BLOCK_SIZE_HEIGHT_SIXTEEN_GOBS 0x00000004 +#define NVCBC0_SET_DST_BLOCK_SIZE_HEIGHT_THIRTYTWO_GOBS 0x00000005 +#define NVCBC0_SET_DST_BLOCK_SIZE_DEPTH 11:8 +#define NVCBC0_SET_DST_BLOCK_SIZE_DEPTH_ONE_GOB 0x00000000 +#define NVCBC0_SET_DST_BLOCK_SIZE_DEPTH_TWO_GOBS 0x00000001 +#define NVCBC0_SET_DST_BLOCK_SIZE_DEPTH_FOUR_GOBS 0x00000002 +#define NVCBC0_SET_DST_BLOCK_SIZE_DEPTH_EIGHT_GOBS 0x00000003 +#define NVCBC0_SET_DST_BLOCK_SIZE_DEPTH_SIXTEEN_GOBS 0x00000004 +#define NVCBC0_SET_DST_BLOCK_SIZE_DEPTH_THIRTYTWO_GOBS 0x00000005 + +#define NVCBC0_SET_DST_WIDTH 0x0198 +#define NVCBC0_SET_DST_WIDTH_V 31:0 + +#define NVCBC0_SET_DST_HEIGHT 0x019c +#define NVCBC0_SET_DST_HEIGHT_V 31:0 + +#define NVCBC0_SET_DST_DEPTH 0x01a0 +#define NVCBC0_SET_DST_DEPTH_V 31:0 + +#define NVCBC0_SET_DST_LAYER 0x01a4 +#define NVCBC0_SET_DST_LAYER_V 31:0 + +#define NVCBC0_SET_DST_ORIGIN_BYTES_X 0x01a8 +#define NVCBC0_SET_DST_ORIGIN_BYTES_X_V 20:0 + +#define NVCBC0_SET_DST_ORIGIN_SAMPLES_Y 0x01ac +#define NVCBC0_SET_DST_ORIGIN_SAMPLES_Y_V 16:0 + +#define NVCBC0_LAUNCH_DMA 0x01b0 +#define NVCBC0_LAUNCH_DMA_DST_MEMORY_LAYOUT 0:0 +#define NVCBC0_LAUNCH_DMA_DST_MEMORY_LAYOUT_BLOCKLINEAR 0x00000000 +#define NVCBC0_LAUNCH_DMA_DST_MEMORY_LAYOUT_PITCH 0x00000001 +#define NVCBC0_LAUNCH_DMA_COMPLETION_TYPE 5:4 +#define NVCBC0_LAUNCH_DMA_COMPLETION_TYPE_FLUSH_DISABLE 0x00000000 +#define NVCBC0_LAUNCH_DMA_COMPLETION_TYPE_FLUSH_ONLY 0x00000001 +#define NVCBC0_LAUNCH_DMA_COMPLETION_TYPE_RELEASE_SEMAPHORE 0x00000002 +#define NVCBC0_LAUNCH_DMA_INTERRUPT_TYPE 9:8 +#define NVCBC0_LAUNCH_DMA_INTERRUPT_TYPE_NONE 0x00000000 +#define NVCBC0_LAUNCH_DMA_INTERRUPT_TYPE_INTERRUPT 0x00000001 +#define NVCBC0_LAUNCH_DMA_SEMAPHORE_STRUCT_SIZE 12:12 +#define NVCBC0_LAUNCH_DMA_SEMAPHORE_STRUCT_SIZE_FOUR_WORDS 0x00000000 +#define NVCBC0_LAUNCH_DMA_SEMAPHORE_STRUCT_SIZE_ONE_WORD 0x00000001 +#define NVCBC0_LAUNCH_DMA_REDUCTION_ENABLE 1:1 +#define NVCBC0_LAUNCH_DMA_REDUCTION_ENABLE_FALSE 0x00000000 +#define NVCBC0_LAUNCH_DMA_REDUCTION_ENABLE_TRUE 0x00000001 +#define NVCBC0_LAUNCH_DMA_REDUCTION_OP 15:13 +#define NVCBC0_LAUNCH_DMA_REDUCTION_OP_RED_ADD 0x00000000 +#define NVCBC0_LAUNCH_DMA_REDUCTION_OP_RED_MIN 0x00000001 +#define NVCBC0_LAUNCH_DMA_REDUCTION_OP_RED_MAX 0x00000002 +#define NVCBC0_LAUNCH_DMA_REDUCTION_OP_RED_INC 0x00000003 +#define NVCBC0_LAUNCH_DMA_REDUCTION_OP_RED_DEC 0x00000004 +#define NVCBC0_LAUNCH_DMA_REDUCTION_OP_RED_AND 0x00000005 +#define NVCBC0_LAUNCH_DMA_REDUCTION_OP_RED_OR 0x00000006 +#define NVCBC0_LAUNCH_DMA_REDUCTION_OP_RED_XOR 0x00000007 +#define NVCBC0_LAUNCH_DMA_REDUCTION_FORMAT 3:2 +#define NVCBC0_LAUNCH_DMA_REDUCTION_FORMAT_UNSIGNED_32 0x00000000 +#define NVCBC0_LAUNCH_DMA_REDUCTION_FORMAT_SIGNED_32 0x00000001 +#define NVCBC0_LAUNCH_DMA_SYSMEMBAR_DISABLE 6:6 +#define NVCBC0_LAUNCH_DMA_SYSMEMBAR_DISABLE_FALSE 0x00000000 +#define NVCBC0_LAUNCH_DMA_SYSMEMBAR_DISABLE_TRUE 0x00000001 + +#define NVCBC0_LOAD_INLINE_DATA 0x01b4 +#define NVCBC0_LOAD_INLINE_DATA_V 31:0 + +#define NVCBC0_SET_I2M_SEMAPHORE_A 0x01dc +#define NVCBC0_SET_I2M_SEMAPHORE_A_OFFSET_UPPER 24:0 + +#define NVCBC0_SET_I2M_SEMAPHORE_B 0x01e0 +#define NVCBC0_SET_I2M_SEMAPHORE_B_OFFSET_LOWER 31:0 + +#define NVCBC0_SET_I2M_SEMAPHORE_C 0x01e4 +#define NVCBC0_SET_I2M_SEMAPHORE_C_PAYLOAD 31:0 + +#define NVCBC0_SET_SM_SCG_CONTROL 0x01e8 +#define NVCBC0_SET_SM_SCG_CONTROL_COMPUTE_IN_GRAPHICS 0:0 +#define NVCBC0_SET_SM_SCG_CONTROL_COMPUTE_IN_GRAPHICS_FALSE 0x00000000 +#define NVCBC0_SET_SM_SCG_CONTROL_COMPUTE_IN_GRAPHICS_TRUE 0x00000001 + +#define NVCBC0_SET_MME_SWITCH_STATE 0x01ec +#define NVCBC0_SET_MME_SWITCH_STATE_VALID 0:0 +#define NVCBC0_SET_MME_SWITCH_STATE_VALID_FALSE 0x00000000 +#define NVCBC0_SET_MME_SWITCH_STATE_VALID_TRUE 0x00000001 +#define NVCBC0_SET_MME_SWITCH_STATE_SAVE_MACRO 11:4 +#define NVCBC0_SET_MME_SWITCH_STATE_RESTORE_MACRO 19:12 + +#define NVCBC0_SET_I2M_SPARE_NOOP00 0x01f0 +#define NVCBC0_SET_I2M_SPARE_NOOP00_V 31:0 + +#define NVCBC0_SET_I2M_SPARE_NOOP01 0x01f4 +#define NVCBC0_SET_I2M_SPARE_NOOP01_V 31:0 + +#define NVCBC0_SET_I2M_SPARE_NOOP02 0x01f8 +#define NVCBC0_SET_I2M_SPARE_NOOP02_V 31:0 + +#define NVCBC0_SET_I2M_SPARE_NOOP03 0x01fc +#define NVCBC0_SET_I2M_SPARE_NOOP03_V 31:0 + +#define NVCBC0_SET_VALID_SPAN_OVERFLOW_AREA_A 0x0200 +#define NVCBC0_SET_VALID_SPAN_OVERFLOW_AREA_A_ADDRESS_UPPER 7:0 + +#define NVCBC0_SET_VALID_SPAN_OVERFLOW_AREA_B 0x0204 +#define NVCBC0_SET_VALID_SPAN_OVERFLOW_AREA_B_ADDRESS_LOWER 31:0 + +#define NVCBC0_SET_VALID_SPAN_OVERFLOW_AREA_C 0x0208 +#define NVCBC0_SET_VALID_SPAN_OVERFLOW_AREA_C_SIZE 31:0 + +#define NVCBC0_PERFMON_TRANSFER 0x0210 +#define NVCBC0_PERFMON_TRANSFER_V 31:0 + +#define NVCBC0_SET_QMD_VIRTUALIZATION_BASE_A 0x0214 +#define NVCBC0_SET_QMD_VIRTUALIZATION_BASE_A_ADDRESS_UPPER 7:0 + +#define NVCBC0_SET_QMD_VIRTUALIZATION_BASE_B 0x0218 +#define NVCBC0_SET_QMD_VIRTUALIZATION_BASE_B_ADDRESS_LOWER 31:0 + +#define NVCBC0_INVALIDATE_SHADER_CACHES 0x021c +#define NVCBC0_INVALIDATE_SHADER_CACHES_INSTRUCTION 0:0 +#define NVCBC0_INVALIDATE_SHADER_CACHES_INSTRUCTION_FALSE 0x00000000 +#define NVCBC0_INVALIDATE_SHADER_CACHES_INSTRUCTION_TRUE 0x00000001 +#define NVCBC0_INVALIDATE_SHADER_CACHES_DATA 4:4 +#define NVCBC0_INVALIDATE_SHADER_CACHES_DATA_FALSE 0x00000000 +#define NVCBC0_INVALIDATE_SHADER_CACHES_DATA_TRUE 0x00000001 +#define NVCBC0_INVALIDATE_SHADER_CACHES_CONSTANT 12:12 +#define NVCBC0_INVALIDATE_SHADER_CACHES_CONSTANT_FALSE 0x00000000 +#define NVCBC0_INVALIDATE_SHADER_CACHES_CONSTANT_TRUE 0x00000001 +#define NVCBC0_INVALIDATE_SHADER_CACHES_LOCKS 1:1 +#define NVCBC0_INVALIDATE_SHADER_CACHES_LOCKS_FALSE 0x00000000 +#define NVCBC0_INVALIDATE_SHADER_CACHES_LOCKS_TRUE 0x00000001 +#define NVCBC0_INVALIDATE_SHADER_CACHES_FLUSH_DATA 2:2 +#define NVCBC0_INVALIDATE_SHADER_CACHES_FLUSH_DATA_FALSE 0x00000000 +#define NVCBC0_INVALIDATE_SHADER_CACHES_FLUSH_DATA_TRUE 0x00000001 + +#define NVCBC0_SET_RESERVED_SW_METHOD00 0x0220 +#define NVCBC0_SET_RESERVED_SW_METHOD00_V 31:0 + +#define NVCBC0_SET_RESERVED_SW_METHOD01 0x0224 +#define NVCBC0_SET_RESERVED_SW_METHOD01_V 31:0 + +#define NVCBC0_SET_RESERVED_SW_METHOD02 0x0228 +#define NVCBC0_SET_RESERVED_SW_METHOD02_V 31:0 + +#define NVCBC0_SET_RESERVED_SW_METHOD03 0x022c +#define NVCBC0_SET_RESERVED_SW_METHOD03_V 31:0 + +#define NVCBC0_SET_RESERVED_SW_METHOD04 0x0230 +#define NVCBC0_SET_RESERVED_SW_METHOD04_V 31:0 + +#define NVCBC0_SET_RESERVED_SW_METHOD05 0x0234 +#define NVCBC0_SET_RESERVED_SW_METHOD05_V 31:0 + +#define NVCBC0_SET_RESERVED_SW_METHOD06 0x0238 +#define NVCBC0_SET_RESERVED_SW_METHOD06_V 31:0 + +#define NVCBC0_SET_RESERVED_SW_METHOD07 0x023c +#define NVCBC0_SET_RESERVED_SW_METHOD07_V 31:0 + +#define NVCBC0_INVALIDATE_TEXTURE_HEADER_CACHE_NO_WFI 0x0244 +#define NVCBC0_INVALIDATE_TEXTURE_HEADER_CACHE_NO_WFI_LINES 0:0 +#define NVCBC0_INVALIDATE_TEXTURE_HEADER_CACHE_NO_WFI_LINES_ALL 0x00000000 +#define NVCBC0_INVALIDATE_TEXTURE_HEADER_CACHE_NO_WFI_LINES_ONE 0x00000001 +#define NVCBC0_INVALIDATE_TEXTURE_HEADER_CACHE_NO_WFI_TAG 25:4 + +#define NVCBC0_SET_CWD_REF_COUNTER 0x0248 +#define NVCBC0_SET_CWD_REF_COUNTER_SELECT 5:0 +#define NVCBC0_SET_CWD_REF_COUNTER_VALUE 23:8 + +#define NVCBC0_SET_RESERVED_SW_METHOD08 0x024c +#define NVCBC0_SET_RESERVED_SW_METHOD08_V 31:0 + +#define NVCBC0_SET_RESERVED_SW_METHOD09 0x0250 +#define NVCBC0_SET_RESERVED_SW_METHOD09_V 31:0 + +#define NVCBC0_SET_RESERVED_SW_METHOD10 0x0254 +#define NVCBC0_SET_RESERVED_SW_METHOD10_V 31:0 + +#define NVCBC0_SET_RESERVED_SW_METHOD11 0x0258 +#define NVCBC0_SET_RESERVED_SW_METHOD11_V 31:0 + +#define NVCBC0_SET_RESERVED_SW_METHOD12 0x025c +#define NVCBC0_SET_RESERVED_SW_METHOD12_V 31:0 + +#define NVCBC0_SET_RESERVED_SW_METHOD13 0x0260 +#define NVCBC0_SET_RESERVED_SW_METHOD13_V 31:0 + +#define NVCBC0_SET_RESERVED_SW_METHOD14 0x0264 +#define NVCBC0_SET_RESERVED_SW_METHOD14_V 31:0 + +#define NVCBC0_SET_RESERVED_SW_METHOD15 0x0268 +#define NVCBC0_SET_RESERVED_SW_METHOD15_V 31:0 + +#define NVCBC0_SET_COMPUTE_CLASS_VERSION 0x0280 +#define NVCBC0_SET_COMPUTE_CLASS_VERSION_CURRENT 15:0 +#define NVCBC0_SET_COMPUTE_CLASS_VERSION_OLDEST_SUPPORTED 31:16 + +#define NVCBC0_CHECK_COMPUTE_CLASS_VERSION 0x0284 +#define NVCBC0_CHECK_COMPUTE_CLASS_VERSION_CURRENT 15:0 +#define NVCBC0_CHECK_COMPUTE_CLASS_VERSION_OLDEST_SUPPORTED 31:16 + +#define NVCBC0_SET_QMD_VERSION 0x0288 +#define NVCBC0_SET_QMD_VERSION_CURRENT 15:0 +#define NVCBC0_SET_QMD_VERSION_OLDEST_SUPPORTED 31:16 + +#define NVCBC0_INVALIDATE_SKED_CACHES 0x0298 +#define NVCBC0_INVALIDATE_SKED_CACHES_V 0:0 + +#define NVCBC0_SET_QMD_VIRTUALIZATION_CONTROL 0x029c +#define NVCBC0_SET_QMD_VIRTUALIZATION_CONTROL_CONSTANT_BUFFER_MASK 7:0 +#define NVCBC0_SET_QMD_VIRTUALIZATION_CONTROL_I2M_ADDR_ENABLE 8:8 +#define NVCBC0_SET_QMD_VIRTUALIZATION_CONTROL_I2M_ADDR_ENABLE_FALSE 0x00000000 +#define NVCBC0_SET_QMD_VIRTUALIZATION_CONTROL_I2M_ADDR_ENABLE_TRUE 0x00000001 +#define NVCBC0_SET_QMD_VIRTUALIZATION_CONTROL_I2M_CONSTANT_BUFFER_ENABLE 12:12 +#define NVCBC0_SET_QMD_VIRTUALIZATION_CONTROL_I2M_CONSTANT_BUFFER_ENABLE_FALSE 0x00000000 +#define NVCBC0_SET_QMD_VIRTUALIZATION_CONTROL_I2M_CONSTANT_BUFFER_ENABLE_TRUE 0x00000001 +#define NVCBC0_SET_QMD_VIRTUALIZATION_CONTROL_I2M_DEPENDENT_ENABLE 9:9 +#define NVCBC0_SET_QMD_VIRTUALIZATION_CONTROL_I2M_DEPENDENT_ENABLE_FALSE 0x00000000 +#define NVCBC0_SET_QMD_VIRTUALIZATION_CONTROL_I2M_DEPENDENT_ENABLE_TRUE 0x00000001 +#define NVCBC0_SET_QMD_VIRTUALIZATION_CONTROL_IQ2M_ADDR_ENABLE 16:16 +#define NVCBC0_SET_QMD_VIRTUALIZATION_CONTROL_IQ2M_ADDR_ENABLE_FALSE 0x00000000 +#define NVCBC0_SET_QMD_VIRTUALIZATION_CONTROL_IQ2M_ADDR_ENABLE_TRUE 0x00000001 +#define NVCBC0_SET_QMD_VIRTUALIZATION_CONTROL_IQ2M_CONSTANT_BUFFER_ENABLE 20:20 +#define NVCBC0_SET_QMD_VIRTUALIZATION_CONTROL_IQ2M_CONSTANT_BUFFER_ENABLE_FALSE 0x00000000 +#define NVCBC0_SET_QMD_VIRTUALIZATION_CONTROL_IQ2M_CONSTANT_BUFFER_ENABLE_TRUE 0x00000001 +#define NVCBC0_SET_QMD_VIRTUALIZATION_CONTROL_IQ2M_DEPENDENT_ENABLE 10:10 +#define NVCBC0_SET_QMD_VIRTUALIZATION_CONTROL_IQ2M_DEPENDENT_ENABLE_FALSE 0x00000000 +#define NVCBC0_SET_QMD_VIRTUALIZATION_CONTROL_IQ2M_DEPENDENT_ENABLE_TRUE 0x00000001 +#define NVCBC0_SET_QMD_VIRTUALIZATION_CONTROL_SEND_PCAS_ENABLE 24:24 +#define NVCBC0_SET_QMD_VIRTUALIZATION_CONTROL_SEND_PCAS_ENABLE_FALSE 0x00000000 +#define NVCBC0_SET_QMD_VIRTUALIZATION_CONTROL_SEND_PCAS_ENABLE_TRUE 0x00000001 + +#define NVCBC0_SET_SHADER_SHARED_MEMORY_WINDOW_A 0x02a0 +#define NVCBC0_SET_SHADER_SHARED_MEMORY_WINDOW_A_BASE_ADDRESS_UPPER 16:0 + +#define NVCBC0_SET_SHADER_SHARED_MEMORY_WINDOW_B 0x02a4 +#define NVCBC0_SET_SHADER_SHARED_MEMORY_WINDOW_B_BASE_ADDRESS 31:0 + +#define NVCBC0_SET_CWD_SLOT_COUNT 0x02b0 +#define NVCBC0_SET_CWD_SLOT_COUNT_V 7:0 + +#define NVCBC0_SEND_PCAS_A 0x02b4 +#define NVCBC0_SEND_PCAS_A_QMD_ADDRESS_SHIFTED8 31:0 + +#define NVCBC0_SEND_PCAS_B 0x02b8 +#define NVCBC0_SEND_PCAS_B_FROM 23:0 +#define NVCBC0_SEND_PCAS_B_DELTA 31:24 + +#define NVCBC0_SEND_SIGNALING_PCAS_B 0x02bc +#define NVCBC0_SEND_SIGNALING_PCAS_B_INVALIDATE 0:0 +#define NVCBC0_SEND_SIGNALING_PCAS_B_INVALIDATE_FALSE 0x00000000 +#define NVCBC0_SEND_SIGNALING_PCAS_B_INVALIDATE_TRUE 0x00000001 +#define NVCBC0_SEND_SIGNALING_PCAS_B_SCHEDULE 1:1 +#define NVCBC0_SEND_SIGNALING_PCAS_B_SCHEDULE_FALSE 0x00000000 +#define NVCBC0_SEND_SIGNALING_PCAS_B_SCHEDULE_TRUE 0x00000001 + +#define NVCBC0_SEND_SIGNALING_PCAS2_B 0x02c0 +#define NVCBC0_SEND_SIGNALING_PCAS2_B_PCAS_ACTION 3:0 +#define NVCBC0_SEND_SIGNALING_PCAS2_B_PCAS_ACTION_NOP 0x00000000 +#define NVCBC0_SEND_SIGNALING_PCAS2_B_PCAS_ACTION_INVALIDATE 0x00000001 +#define NVCBC0_SEND_SIGNALING_PCAS2_B_PCAS_ACTION_SCHEDULE 0x00000002 +#define NVCBC0_SEND_SIGNALING_PCAS2_B_PCAS_ACTION_INVALIDATE_COPY_SCHEDULE 0x00000003 +#define NVCBC0_SEND_SIGNALING_PCAS2_B_PCAS_ACTION_INCREMENT_PUT 0x00000006 +#define NVCBC0_SEND_SIGNALING_PCAS2_B_PCAS_ACTION_DECREMENT_DEPENDENCE 0x00000007 +#define NVCBC0_SEND_SIGNALING_PCAS2_B_PCAS_ACTION_PREFETCH 0x00000008 +#define NVCBC0_SEND_SIGNALING_PCAS2_B_PCAS_ACTION_PREFETCH_SCHEDULE 0x00000009 +#define NVCBC0_SEND_SIGNALING_PCAS2_B_PCAS_ACTION_INVALIDATE_PREFETCH_COPY_SCHEDULE 0x0000000A +#define NVCBC0_SEND_SIGNALING_PCAS2_B_PCAS_ACTION_INVALIDATE_PREFETCH_COPY_FORCE_REQUIRE_SCHEDULING 0x0000000B +#define NVCBC0_SEND_SIGNALING_PCAS2_B_PCAS_ACTION_INCREMENT_DEPENDENCE 0x0000000C +#define NVCBC0_SEND_SIGNALING_PCAS2_B_PCAS_ACTION_INCREMENT_CWD_REF_COUNTER 0x0000000D +#define NVCBC0_SEND_SIGNALING_PCAS2_B_SELECT 13:8 +#define NVCBC0_SEND_SIGNALING_PCAS2_B_OFFSET_MINUS_ONE 23:14 + +#define NVCBC0_SET_SKED_CACHE_CONTROL 0x02cc +#define NVCBC0_SET_SKED_CACHE_CONTROL_IGNORE_VEID 0:0 +#define NVCBC0_SET_SKED_CACHE_CONTROL_IGNORE_VEID_FALSE 0x00000000 +#define NVCBC0_SET_SKED_CACHE_CONTROL_IGNORE_VEID_TRUE 0x00000001 + +#define NVCBC0_SET_SHADER_LOCAL_MEMORY_NON_THROTTLED_A 0x02e4 +#define NVCBC0_SET_SHADER_LOCAL_MEMORY_NON_THROTTLED_A_SIZE_UPPER 7:0 + +#define NVCBC0_SET_SHADER_LOCAL_MEMORY_NON_THROTTLED_B 0x02e8 +#define NVCBC0_SET_SHADER_LOCAL_MEMORY_NON_THROTTLED_B_SIZE_LOWER 31:0 + +#define NVCBC0_SET_SHADER_LOCAL_MEMORY_NON_THROTTLED_C 0x02ec +#define NVCBC0_SET_SHADER_LOCAL_MEMORY_NON_THROTTLED_C_MAX_SM_COUNT 8:0 +#define NVCBC0_SET_SHADER_LOCAL_MEMORY_NON_THROTTLED_C_MAX_PLURAL_TPC_GPC_COUNT 23:16 +#define NVCBC0_SET_SHADER_LOCAL_MEMORY_NON_THROTTLED_C_MAX_SINGLETON_TPC_GPC_COUNT 31:24 + +#define NVCBC0_SET_SPA_VERSION 0x0310 +#define NVCBC0_SET_SPA_VERSION_MINOR 7:0 +#define NVCBC0_SET_SPA_VERSION_MAJOR 15:8 + +#define NVCBC0_SET_INLINE_QMD_ADDRESS_A 0x0318 +#define NVCBC0_SET_INLINE_QMD_ADDRESS_A_QMD_ADDRESS_SHIFTED8_UPPER 8:0 +#define NVCBC0_SET_INLINE_QMD_ADDRESS_A_INLINE_SIZE 30:30 +#define NVCBC0_SET_INLINE_QMD_ADDRESS_A_INLINE_SIZE_INLINE_256 0x00000000 +#define NVCBC0_SET_INLINE_QMD_ADDRESS_A_INLINE_SIZE_INLINE_384 0x00000001 + +#define NVCBC0_SET_INLINE_QMD_ADDRESS_B 0x031c +#define NVCBC0_SET_INLINE_QMD_ADDRESS_B_QMD_ADDRESS_SHIFTED8_LOWER 31:0 + +#define NVCBC0_LOAD_INLINE_QMD_DATA(i) (0x0320+(i)*4) +#define NVCBC0_LOAD_INLINE_QMD_DATA_V 31:0 + +#define NVCBC0_SET_FALCON00 0x0500 +#define NVCBC0_SET_FALCON00_V 31:0 + +#define NVCBC0_SET_FALCON01 0x0504 +#define NVCBC0_SET_FALCON01_V 31:0 + +#define NVCBC0_SET_FALCON02 0x0508 +#define NVCBC0_SET_FALCON02_V 31:0 + +#define NVCBC0_SET_FALCON03 0x050c +#define NVCBC0_SET_FALCON03_V 31:0 + +#define NVCBC0_SET_FALCON04 0x0510 +#define NVCBC0_SET_FALCON04_V 31:0 + +#define NVCBC0_SET_FALCON05 0x0514 +#define NVCBC0_SET_FALCON05_V 31:0 + +#define NVCBC0_SET_FALCON06 0x0518 +#define NVCBC0_SET_FALCON06_V 31:0 + +#define NVCBC0_SET_FALCON07 0x051c +#define NVCBC0_SET_FALCON07_V 31:0 + +#define NVCBC0_SET_FALCON08 0x0520 +#define NVCBC0_SET_FALCON08_V 31:0 + +#define NVCBC0_SET_FALCON09 0x0524 +#define NVCBC0_SET_FALCON09_V 31:0 + +#define NVCBC0_SET_FALCON10 0x0528 +#define NVCBC0_SET_FALCON10_V 31:0 + +#define NVCBC0_SET_FALCON11 0x052c +#define NVCBC0_SET_FALCON11_V 31:0 + +#define NVCBC0_SET_FALCON12 0x0530 +#define NVCBC0_SET_FALCON12_V 31:0 + +#define NVCBC0_SET_FALCON13 0x0534 +#define NVCBC0_SET_FALCON13_V 31:0 + +#define NVCBC0_SET_FALCON14 0x0538 +#define NVCBC0_SET_FALCON14_V 31:0 + +#define NVCBC0_SET_FALCON15 0x053c +#define NVCBC0_SET_FALCON15_V 31:0 + +#define NVCBC0_SET_MME_MEM_ADDRESS_A 0x0550 +#define NVCBC0_SET_MME_MEM_ADDRESS_A_UPPER 24:0 + +#define NVCBC0_SET_MME_MEM_ADDRESS_B 0x0554 +#define NVCBC0_SET_MME_MEM_ADDRESS_B_LOWER 31:0 + +#define NVCBC0_SET_MME_DATA_RAM_ADDRESS 0x0558 +#define NVCBC0_SET_MME_DATA_RAM_ADDRESS_WORD 31:0 + +#define NVCBC0_MME_DMA_READ 0x055c +#define NVCBC0_MME_DMA_READ_LENGTH 31:0 + +#define NVCBC0_MME_DMA_READ_FIFOED 0x0560 +#define NVCBC0_MME_DMA_READ_FIFOED_LENGTH 31:0 + +#define NVCBC0_MME_DMA_WRITE 0x0564 +#define NVCBC0_MME_DMA_WRITE_LENGTH 31:0 + +#define NVCBC0_MME_DMA_REDUCTION 0x0568 +#define NVCBC0_MME_DMA_REDUCTION_REDUCTION_OP 2:0 +#define NVCBC0_MME_DMA_REDUCTION_REDUCTION_OP_RED_ADD 0x00000000 +#define NVCBC0_MME_DMA_REDUCTION_REDUCTION_OP_RED_MIN 0x00000001 +#define NVCBC0_MME_DMA_REDUCTION_REDUCTION_OP_RED_MAX 0x00000002 +#define NVCBC0_MME_DMA_REDUCTION_REDUCTION_OP_RED_INC 0x00000003 +#define NVCBC0_MME_DMA_REDUCTION_REDUCTION_OP_RED_DEC 0x00000004 +#define NVCBC0_MME_DMA_REDUCTION_REDUCTION_OP_RED_AND 0x00000005 +#define NVCBC0_MME_DMA_REDUCTION_REDUCTION_OP_RED_OR 0x00000006 +#define NVCBC0_MME_DMA_REDUCTION_REDUCTION_OP_RED_XOR 0x00000007 +#define NVCBC0_MME_DMA_REDUCTION_REDUCTION_FORMAT 5:4 +#define NVCBC0_MME_DMA_REDUCTION_REDUCTION_FORMAT_UNSIGNED 0x00000000 +#define NVCBC0_MME_DMA_REDUCTION_REDUCTION_FORMAT_SIGNED 0x00000001 +#define NVCBC0_MME_DMA_REDUCTION_REDUCTION_SIZE 8:8 +#define NVCBC0_MME_DMA_REDUCTION_REDUCTION_SIZE_FOUR_BYTES 0x00000000 +#define NVCBC0_MME_DMA_REDUCTION_REDUCTION_SIZE_EIGHT_BYTES 0x00000001 + +#define NVCBC0_MME_DMA_SYSMEMBAR 0x056c +#define NVCBC0_MME_DMA_SYSMEMBAR_V 0:0 + +#define NVCBC0_MME_DMA_SYNC 0x0570 +#define NVCBC0_MME_DMA_SYNC_VALUE 31:0 + +#define NVCBC0_SET_MME_DATA_FIFO_CONFIG 0x0574 +#define NVCBC0_SET_MME_DATA_FIFO_CONFIG_FIFO_SIZE 2:0 +#define NVCBC0_SET_MME_DATA_FIFO_CONFIG_FIFO_SIZE_SIZE_0KB 0x00000000 +#define NVCBC0_SET_MME_DATA_FIFO_CONFIG_FIFO_SIZE_SIZE_4KB 0x00000001 +#define NVCBC0_SET_MME_DATA_FIFO_CONFIG_FIFO_SIZE_SIZE_8KB 0x00000002 +#define NVCBC0_SET_MME_DATA_FIFO_CONFIG_FIFO_SIZE_SIZE_12KB 0x00000003 +#define NVCBC0_SET_MME_DATA_FIFO_CONFIG_FIFO_SIZE_SIZE_16KB 0x00000004 + +#define NVCBC0_SET_SHADER_LOCAL_MEMORY_A 0x0790 +#define NVCBC0_SET_SHADER_LOCAL_MEMORY_A_ADDRESS_UPPER 24:0 + +#define NVCBC0_SET_SHADER_LOCAL_MEMORY_B 0x0794 +#define NVCBC0_SET_SHADER_LOCAL_MEMORY_B_ADDRESS_LOWER 31:0 + +#define NVCBC0_SET_TEXTURE_HEADER_VERSION 0x07ac +#define NVCBC0_SET_TEXTURE_HEADER_VERSION_MAJOR 7:0 + +#define NVCBC0_SET_SHADER_LOCAL_MEMORY_WINDOW_A 0x07b0 +#define NVCBC0_SET_SHADER_LOCAL_MEMORY_WINDOW_A_BASE_ADDRESS_UPPER 16:0 + +#define NVCBC0_SET_SHADER_LOCAL_MEMORY_WINDOW_B 0x07b4 +#define NVCBC0_SET_SHADER_LOCAL_MEMORY_WINDOW_B_BASE_ADDRESS 31:0 + +#define NVCBC0_SET_MONITORED_FENCE_SIGNAL_ADDRESS_BASE_A 0x07b8 +#define NVCBC0_SET_MONITORED_FENCE_SIGNAL_ADDRESS_BASE_A_LOWER 31:0 + +#define NVCBC0_SET_MONITORED_FENCE_SIGNAL_ADDRESS_BASE_B 0x07bc +#define NVCBC0_SET_MONITORED_FENCE_SIGNAL_ADDRESS_BASE_B_UPPER 24:0 + +#define NVCBC0_THROTTLE_SM 0x07fc +#define NVCBC0_THROTTLE_SM_MULTIPLY_ADD 0:0 +#define NVCBC0_THROTTLE_SM_MULTIPLY_ADD_FALSE 0x00000000 +#define NVCBC0_THROTTLE_SM_MULTIPLY_ADD_TRUE 0x00000001 + +#define NVCBC0_SET_SHADER_CACHE_CONTROL 0x0d94 +#define NVCBC0_SET_SHADER_CACHE_CONTROL_ICACHE_PREFETCH_ENABLE 0:0 +#define NVCBC0_SET_SHADER_CACHE_CONTROL_ICACHE_PREFETCH_ENABLE_FALSE 0x00000000 +#define NVCBC0_SET_SHADER_CACHE_CONTROL_ICACHE_PREFETCH_ENABLE_TRUE 0x00000001 + +#define NVCBC0_SET_SCG_COMPUTE_SCHEDULING_PARAMETERS(i) (0x0da0+(i)*4) +#define NVCBC0_SET_SCG_COMPUTE_SCHEDULING_PARAMETERS_V 31:0 + +#define NVCBC0_SET_SM_TIMEOUT_INTERVAL 0x0de4 +#define NVCBC0_SET_SM_TIMEOUT_INTERVAL_COUNTER_BIT 5:0 + +#define NVCBC0_MME_DMA_WRITE_METHOD_BARRIER 0x0dec +#define NVCBC0_MME_DMA_WRITE_METHOD_BARRIER_V 0:0 + +#define NVCBC0_INVALIDATE_TEXTURE_DATA_CACHE_NO_WFI 0x1288 +#define NVCBC0_INVALIDATE_TEXTURE_DATA_CACHE_NO_WFI_LINES 0:0 +#define NVCBC0_INVALIDATE_TEXTURE_DATA_CACHE_NO_WFI_LINES_ALL 0x00000000 +#define NVCBC0_INVALIDATE_TEXTURE_DATA_CACHE_NO_WFI_LINES_ONE 0x00000001 +#define NVCBC0_INVALIDATE_TEXTURE_DATA_CACHE_NO_WFI_TAG 25:4 + +#define NVCBC0_ACTIVATE_PERF_SETTINGS_FOR_COMPUTE_CONTEXT 0x12a8 +#define NVCBC0_ACTIVATE_PERF_SETTINGS_FOR_COMPUTE_CONTEXT_ALL 0:0 +#define NVCBC0_ACTIVATE_PERF_SETTINGS_FOR_COMPUTE_CONTEXT_ALL_FALSE 0x00000000 +#define NVCBC0_ACTIVATE_PERF_SETTINGS_FOR_COMPUTE_CONTEXT_ALL_TRUE 0x00000001 + +#define NVCBC0_INVALIDATE_SAMPLER_CACHE 0x1330 +#define NVCBC0_INVALIDATE_SAMPLER_CACHE_LINES 0:0 +#define NVCBC0_INVALIDATE_SAMPLER_CACHE_LINES_ALL 0x00000000 +#define NVCBC0_INVALIDATE_SAMPLER_CACHE_LINES_ONE 0x00000001 +#define NVCBC0_INVALIDATE_SAMPLER_CACHE_TAG 25:4 + +#define NVCBC0_INVALIDATE_TEXTURE_HEADER_CACHE 0x1334 +#define NVCBC0_INVALIDATE_TEXTURE_HEADER_CACHE_LINES 0:0 +#define NVCBC0_INVALIDATE_TEXTURE_HEADER_CACHE_LINES_ALL 0x00000000 +#define NVCBC0_INVALIDATE_TEXTURE_HEADER_CACHE_LINES_ONE 0x00000001 +#define NVCBC0_INVALIDATE_TEXTURE_HEADER_CACHE_TAG 25:4 + +#define NVCBC0_INVALIDATE_TEXTURE_DATA_CACHE 0x1338 +#define NVCBC0_INVALIDATE_TEXTURE_DATA_CACHE_LINES 0:0 +#define NVCBC0_INVALIDATE_TEXTURE_DATA_CACHE_LINES_ALL 0x00000000 +#define NVCBC0_INVALIDATE_TEXTURE_DATA_CACHE_LINES_ONE 0x00000001 +#define NVCBC0_INVALIDATE_TEXTURE_DATA_CACHE_TAG 25:4 + +#define NVCBC0_INVALIDATE_SAMPLER_CACHE_NO_WFI 0x1424 +#define NVCBC0_INVALIDATE_SAMPLER_CACHE_NO_WFI_LINES 0:0 +#define NVCBC0_INVALIDATE_SAMPLER_CACHE_NO_WFI_LINES_ALL 0x00000000 +#define NVCBC0_INVALIDATE_SAMPLER_CACHE_NO_WFI_LINES_ONE 0x00000001 +#define NVCBC0_INVALIDATE_SAMPLER_CACHE_NO_WFI_TAG 25:4 + +#define NVCBC0_SET_SHADER_EXCEPTIONS 0x1528 +#define NVCBC0_SET_SHADER_EXCEPTIONS_ENABLE 0:0 +#define NVCBC0_SET_SHADER_EXCEPTIONS_ENABLE_FALSE 0x00000000 +#define NVCBC0_SET_SHADER_EXCEPTIONS_ENABLE_TRUE 0x00000001 + +#define NVCBC0_SET_RENDER_ENABLE_A 0x1550 +#define NVCBC0_SET_RENDER_ENABLE_A_OFFSET_UPPER 7:0 + +#define NVCBC0_SET_RENDER_ENABLE_B 0x1554 +#define NVCBC0_SET_RENDER_ENABLE_B_OFFSET_LOWER 31:0 + +#define NVCBC0_SET_RENDER_ENABLE_C 0x1558 +#define NVCBC0_SET_RENDER_ENABLE_C_MODE 2:0 +#define NVCBC0_SET_RENDER_ENABLE_C_MODE_FALSE 0x00000000 +#define NVCBC0_SET_RENDER_ENABLE_C_MODE_TRUE 0x00000001 +#define NVCBC0_SET_RENDER_ENABLE_C_MODE_CONDITIONAL 0x00000002 +#define NVCBC0_SET_RENDER_ENABLE_C_MODE_RENDER_IF_EQUAL 0x00000003 +#define NVCBC0_SET_RENDER_ENABLE_C_MODE_RENDER_IF_NOT_EQUAL 0x00000004 + +#define NVCBC0_SET_TEX_SAMPLER_POOL_A 0x155c +#define NVCBC0_SET_TEX_SAMPLER_POOL_A_OFFSET_UPPER 24:0 + +#define NVCBC0_SET_TEX_SAMPLER_POOL_B 0x1560 +#define NVCBC0_SET_TEX_SAMPLER_POOL_B_OFFSET_LOWER 31:0 + +#define NVCBC0_SET_TEX_SAMPLER_POOL_C 0x1564 +#define NVCBC0_SET_TEX_SAMPLER_POOL_C_MAXIMUM_INDEX 19:0 + +#define NVCBC0_SET_TEX_HEADER_POOL_A 0x1574 +#define NVCBC0_SET_TEX_HEADER_POOL_A_OFFSET_UPPER 24:0 + +#define NVCBC0_SET_TEX_HEADER_POOL_B 0x1578 +#define NVCBC0_SET_TEX_HEADER_POOL_B_OFFSET_LOWER 31:0 + +#define NVCBC0_SET_TEX_HEADER_POOL_C 0x157c +#define NVCBC0_SET_TEX_HEADER_POOL_C_MAXIMUM_INDEX 21:0 + +#define NVCBC0_INVALIDATE_SHADER_CACHES_NO_WFI 0x1698 +#define NVCBC0_INVALIDATE_SHADER_CACHES_NO_WFI_INSTRUCTION 0:0 +#define NVCBC0_INVALIDATE_SHADER_CACHES_NO_WFI_INSTRUCTION_FALSE 0x00000000 +#define NVCBC0_INVALIDATE_SHADER_CACHES_NO_WFI_INSTRUCTION_TRUE 0x00000001 +#define NVCBC0_INVALIDATE_SHADER_CACHES_NO_WFI_GLOBAL_DATA 4:4 +#define NVCBC0_INVALIDATE_SHADER_CACHES_NO_WFI_GLOBAL_DATA_FALSE 0x00000000 +#define NVCBC0_INVALIDATE_SHADER_CACHES_NO_WFI_GLOBAL_DATA_TRUE 0x00000001 +#define NVCBC0_INVALIDATE_SHADER_CACHES_NO_WFI_CONSTANT 12:12 +#define NVCBC0_INVALIDATE_SHADER_CACHES_NO_WFI_CONSTANT_FALSE 0x00000000 +#define NVCBC0_INVALIDATE_SHADER_CACHES_NO_WFI_CONSTANT_TRUE 0x00000001 + +#define NVCBC0_SET_RENDER_ENABLE_OVERRIDE 0x1944 +#define NVCBC0_SET_RENDER_ENABLE_OVERRIDE_MODE 1:0 +#define NVCBC0_SET_RENDER_ENABLE_OVERRIDE_MODE_USE_RENDER_ENABLE 0x00000000 +#define NVCBC0_SET_RENDER_ENABLE_OVERRIDE_MODE_ALWAYS_RENDER 0x00000001 +#define NVCBC0_SET_RENDER_ENABLE_OVERRIDE_MODE_NEVER_RENDER 0x00000002 + +#define NVCBC0_PIPE_NOP 0x1a2c +#define NVCBC0_PIPE_NOP_V 31:0 + +#define NVCBC0_SET_SPARE00 0x1a30 +#define NVCBC0_SET_SPARE00_V 31:0 + +#define NVCBC0_SET_SPARE01 0x1a34 +#define NVCBC0_SET_SPARE01_V 31:0 + +#define NVCBC0_SET_SPARE02 0x1a38 +#define NVCBC0_SET_SPARE02_V 31:0 + +#define NVCBC0_SET_SPARE03 0x1a3c +#define NVCBC0_SET_SPARE03_V 31:0 + +#define NVCBC0_SET_REPORT_SEMAPHORE_A 0x1b00 +#define NVCBC0_SET_REPORT_SEMAPHORE_A_OFFSET_UPPER 24:0 + +#define NVCBC0_SET_REPORT_SEMAPHORE_B 0x1b04 +#define NVCBC0_SET_REPORT_SEMAPHORE_B_OFFSET_LOWER 31:0 + +#define NVCBC0_SET_REPORT_SEMAPHORE_C 0x1b08 +#define NVCBC0_SET_REPORT_SEMAPHORE_C_PAYLOAD 31:0 + +#define NVCBC0_SET_REPORT_SEMAPHORE_D 0x1b0c +#define NVCBC0_SET_REPORT_SEMAPHORE_D_OPERATION 1:0 +#define NVCBC0_SET_REPORT_SEMAPHORE_D_OPERATION_RELEASE 0x00000000 +#define NVCBC0_SET_REPORT_SEMAPHORE_D_OPERATION_TRAP 0x00000003 +#define NVCBC0_SET_REPORT_SEMAPHORE_D_AWAKEN_ENABLE 20:20 +#define NVCBC0_SET_REPORT_SEMAPHORE_D_AWAKEN_ENABLE_FALSE 0x00000000 +#define NVCBC0_SET_REPORT_SEMAPHORE_D_AWAKEN_ENABLE_TRUE 0x00000001 +#define NVCBC0_SET_REPORT_SEMAPHORE_D_STRUCTURE_SIZE 28:28 +#define NVCBC0_SET_REPORT_SEMAPHORE_D_STRUCTURE_SIZE_FOUR_WORDS 0x00000000 +#define NVCBC0_SET_REPORT_SEMAPHORE_D_STRUCTURE_SIZE_ONE_WORD 0x00000001 +#define NVCBC0_SET_REPORT_SEMAPHORE_D_FLUSH_DISABLE 2:2 +#define NVCBC0_SET_REPORT_SEMAPHORE_D_FLUSH_DISABLE_FALSE 0x00000000 +#define NVCBC0_SET_REPORT_SEMAPHORE_D_FLUSH_DISABLE_TRUE 0x00000001 +#define NVCBC0_SET_REPORT_SEMAPHORE_D_REDUCTION_ENABLE 3:3 +#define NVCBC0_SET_REPORT_SEMAPHORE_D_REDUCTION_ENABLE_FALSE 0x00000000 +#define NVCBC0_SET_REPORT_SEMAPHORE_D_REDUCTION_ENABLE_TRUE 0x00000001 +#define NVCBC0_SET_REPORT_SEMAPHORE_D_REDUCTION_OP 11:9 +#define NVCBC0_SET_REPORT_SEMAPHORE_D_REDUCTION_OP_RED_ADD 0x00000000 +#define NVCBC0_SET_REPORT_SEMAPHORE_D_REDUCTION_OP_RED_MIN 0x00000001 +#define NVCBC0_SET_REPORT_SEMAPHORE_D_REDUCTION_OP_RED_MAX 0x00000002 +#define NVCBC0_SET_REPORT_SEMAPHORE_D_REDUCTION_OP_RED_INC 0x00000003 +#define NVCBC0_SET_REPORT_SEMAPHORE_D_REDUCTION_OP_RED_DEC 0x00000004 +#define NVCBC0_SET_REPORT_SEMAPHORE_D_REDUCTION_OP_RED_AND 0x00000005 +#define NVCBC0_SET_REPORT_SEMAPHORE_D_REDUCTION_OP_RED_OR 0x00000006 +#define NVCBC0_SET_REPORT_SEMAPHORE_D_REDUCTION_OP_RED_XOR 0x00000007 +#define NVCBC0_SET_REPORT_SEMAPHORE_D_REDUCTION_FORMAT 18:17 +#define NVCBC0_SET_REPORT_SEMAPHORE_D_REDUCTION_FORMAT_UNSIGNED_32 0x00000000 +#define NVCBC0_SET_REPORT_SEMAPHORE_D_REDUCTION_FORMAT_SIGNED_32 0x00000001 +#define NVCBC0_SET_REPORT_SEMAPHORE_D_CONDITIONAL_TRAP 19:19 +#define NVCBC0_SET_REPORT_SEMAPHORE_D_CONDITIONAL_TRAP_FALSE 0x00000000 +#define NVCBC0_SET_REPORT_SEMAPHORE_D_CONDITIONAL_TRAP_TRUE 0x00000001 + +#define NVCBC0_SET_TRAP_HANDLER_A 0x25f8 +#define NVCBC0_SET_TRAP_HANDLER_A_ADDRESS_UPPER 24:0 + +#define NVCBC0_SET_TRAP_HANDLER_B 0x25fc +#define NVCBC0_SET_TRAP_HANDLER_B_ADDRESS_LOWER 31:0 + +#define NVCBC0_SET_BINDLESS_TEXTURE 0x2608 +#define NVCBC0_SET_BINDLESS_TEXTURE_CONSTANT_BUFFER_SLOT_SELECT 2:0 + +#define NVCBC0_SET_SHADER_PERFORMANCE_SNAPSHOT_COUNTER_VALUE(i) (0x32f4+(i)*4) +#define NVCBC0_SET_SHADER_PERFORMANCE_SNAPSHOT_COUNTER_VALUE_V 31:0 + +#define NVCBC0_SET_SHADER_PERFORMANCE_SNAPSHOT_COUNTER_VALUE_UPPER(i) (0x3314+(i)*4) +#define NVCBC0_SET_SHADER_PERFORMANCE_SNAPSHOT_COUNTER_VALUE_UPPER_V 31:0 + +#define NVCBC0_ENABLE_SHADER_PERFORMANCE_SNAPSHOT_COUNTER 0x3334 +#define NVCBC0_ENABLE_SHADER_PERFORMANCE_SNAPSHOT_COUNTER_V 0:0 + +#define NVCBC0_DISABLE_SHADER_PERFORMANCE_SNAPSHOT_COUNTER 0x3338 +#define NVCBC0_DISABLE_SHADER_PERFORMANCE_SNAPSHOT_COUNTER_V 0:0 + +#define NVCBC0_SET_SHADER_PERFORMANCE_COUNTER_VALUE_UPPER(i) (0x333c+(i)*4) +#define NVCBC0_SET_SHADER_PERFORMANCE_COUNTER_VALUE_UPPER_V 31:0 + +#define NVCBC0_SET_SHADER_PERFORMANCE_COUNTER_VALUE(i) (0x335c+(i)*4) +#define NVCBC0_SET_SHADER_PERFORMANCE_COUNTER_VALUE_V 31:0 + +#define NVCBC0_SET_SHADER_PERFORMANCE_COUNTER_EVENT(i) (0x337c+(i)*4) +#define NVCBC0_SET_SHADER_PERFORMANCE_COUNTER_EVENT_EVENT 7:0 + +#define NVCBC0_SET_SHADER_PERFORMANCE_COUNTER_CONTROL_A(i) (0x339c+(i)*4) +#define NVCBC0_SET_SHADER_PERFORMANCE_COUNTER_CONTROL_A_EVENT0 1:0 +#define NVCBC0_SET_SHADER_PERFORMANCE_COUNTER_CONTROL_A_BIT_SELECT0 4:2 +#define NVCBC0_SET_SHADER_PERFORMANCE_COUNTER_CONTROL_A_EVENT1 6:5 +#define NVCBC0_SET_SHADER_PERFORMANCE_COUNTER_CONTROL_A_BIT_SELECT1 9:7 +#define NVCBC0_SET_SHADER_PERFORMANCE_COUNTER_CONTROL_A_EVENT2 11:10 +#define NVCBC0_SET_SHADER_PERFORMANCE_COUNTER_CONTROL_A_BIT_SELECT2 14:12 +#define NVCBC0_SET_SHADER_PERFORMANCE_COUNTER_CONTROL_A_EVENT3 16:15 +#define NVCBC0_SET_SHADER_PERFORMANCE_COUNTER_CONTROL_A_BIT_SELECT3 19:17 +#define NVCBC0_SET_SHADER_PERFORMANCE_COUNTER_CONTROL_A_EVENT4 21:20 +#define NVCBC0_SET_SHADER_PERFORMANCE_COUNTER_CONTROL_A_BIT_SELECT4 24:22 +#define NVCBC0_SET_SHADER_PERFORMANCE_COUNTER_CONTROL_A_EVENT5 26:25 +#define NVCBC0_SET_SHADER_PERFORMANCE_COUNTER_CONTROL_A_BIT_SELECT5 29:27 +#define NVCBC0_SET_SHADER_PERFORMANCE_COUNTER_CONTROL_A_SPARE 31:30 + +#define NVCBC0_SET_SHADER_PERFORMANCE_COUNTER_CONTROL_B(i) (0x33bc+(i)*4) +#define NVCBC0_SET_SHADER_PERFORMANCE_COUNTER_CONTROL_B_EDGE 0:0 +#define NVCBC0_SET_SHADER_PERFORMANCE_COUNTER_CONTROL_B_MODE 2:1 +#define NVCBC0_SET_SHADER_PERFORMANCE_COUNTER_CONTROL_B_WINDOWED 3:3 +#define NVCBC0_SET_SHADER_PERFORMANCE_COUNTER_CONTROL_B_FUNC 19:4 + +#define NVCBC0_SET_SHADER_PERFORMANCE_COUNTER_TRAP_CONTROL 0x33dc +#define NVCBC0_SET_SHADER_PERFORMANCE_COUNTER_TRAP_CONTROL_MASK 7:0 + +#define NVCBC0_START_SHADER_PERFORMANCE_COUNTER 0x33e0 +#define NVCBC0_START_SHADER_PERFORMANCE_COUNTER_COUNTER_MASK 7:0 + +#define NVCBC0_STOP_SHADER_PERFORMANCE_COUNTER 0x33e4 +#define NVCBC0_STOP_SHADER_PERFORMANCE_COUNTER_COUNTER_MASK 7:0 + +#define NVCBC0_SET_SHADER_PERFORMANCE_COUNTER_SCTL_FILTER 0x33e8 +#define NVCBC0_SET_SHADER_PERFORMANCE_COUNTER_SCTL_FILTER_V 31:0 + +#define NVCBC0_SET_SHADER_PERFORMANCE_COUNTER_CORE_MIO_FILTER 0x33ec +#define NVCBC0_SET_SHADER_PERFORMANCE_COUNTER_CORE_MIO_FILTER_V 31:0 + +#define NVCBC0_SET_MME_SHADOW_SCRATCH(i) (0x3400+(i)*4) +#define NVCBC0_SET_MME_SHADOW_SCRATCH_V 31:0 + +#define NVCBC0_CALL_MME_MACRO(j) (0x3800+(j)*8) +#define NVCBC0_CALL_MME_MACRO_V 31:0 + +#define NVCBC0_CALL_MME_DATA(j) (0x3804+(j)*8) +#define NVCBC0_CALL_MME_DATA_V 31:0 + +#endif /* _cl_hopper_compute_a_h_ */ diff --git a/src/nouveau/headers/nvidia/classes/clcbc0qmd.h b/src/nouveau/headers/nvidia/classes/clcbc0qmd.h new file mode 100644 index 00000000000..dd023ba14b6 --- /dev/null +++ b/src/nouveau/headers/nvidia/classes/clcbc0qmd.h @@ -0,0 +1,552 @@ +/******************************************************************************* + Copyright (c) 2023, NVIDIA CORPORATION. All rights reserved. + + Permission is hereby granted, free of charge, to any person obtaining a + copy of this software and associated documentation files (the "Software"), + to deal in the Software without restriction, including without limitation + the rights to use, copy, modify, merge, publish, distribute, sublicense, + and/or sell copies of the Software, and to permit persons to whom the + Software is furnished to do so, subject to the following conditions: + + The above copyright notice and this permission notice shall be included in + all copies or substantial portions of the Software. + + THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR + IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, + FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL + THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER + LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING + FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER + DEALINGS IN THE SOFTWARE. + +*******************************************************************************/ + +/* AUTO GENERATED FILE -- DO NOT EDIT */ + +#ifndef __CLCBC0QMD_H__ +#define __CLCBC0QMD_H__ + +/* +** Queue Meta Data, Version 03_00 + */ + +#define NVCBC0_QMDV03_00_OUTER_PUT MW(30:0) +#define NVCBC0_QMDV03_00_OUTER_OVERFLOW MW(31:31) +#define NVCBC0_QMDV03_00_OUTER_GET MW(62:32) +#define NVCBC0_QMDV03_00_OUTER_STICKY_OVERFLOW MW(63:63) +#define NVCBC0_QMDV03_00_INNER_GET MW(94:64) +#define NVCBC0_QMDV03_00_INNER_OVERFLOW MW(95:95) +#define NVCBC0_QMDV03_00_INNER_PUT MW(126:96) +#define NVCBC0_QMDV03_00_INNER_STICKY_OVERFLOW MW(127:127) +#define NVCBC0_QMDV03_00_QMD_GROUP_ID MW(133:128) +#define NVCBC0_QMDV03_00_SM_GLOBAL_CACHING_ENABLE MW(134:134) +#define NVCBC0_QMDV03_00_RUN_CTA_IN_ONE_SM_PARTITION MW(135:135) +#define NVCBC0_QMDV03_00_RUN_CTA_IN_ONE_SM_PARTITION_FALSE 0x00000000 +#define NVCBC0_QMDV03_00_RUN_CTA_IN_ONE_SM_PARTITION_TRUE 0x00000001 +#define NVCBC0_QMDV03_00_IS_QUEUE MW(136:136) +#define NVCBC0_QMDV03_00_IS_QUEUE_FALSE 0x00000000 +#define NVCBC0_QMDV03_00_IS_QUEUE_TRUE 0x00000001 +#define NVCBC0_QMDV03_00_ADD_TO_HEAD_OF_QMD_GROUP_LINKED_LIST MW(137:137) +#define NVCBC0_QMDV03_00_ADD_TO_HEAD_OF_QMD_GROUP_LINKED_LIST_FALSE 0x00000000 +#define NVCBC0_QMDV03_00_ADD_TO_HEAD_OF_QMD_GROUP_LINKED_LIST_TRUE 0x00000001 +#define NVCBC0_QMDV03_00_REQUIRE_SCHEDULING_PCAS MW(140:140) +#define NVCBC0_QMDV03_00_REQUIRE_SCHEDULING_PCAS_FALSE 0x00000000 +#define NVCBC0_QMDV03_00_REQUIRE_SCHEDULING_PCAS_TRUE 0x00000001 +#define NVCBC0_QMDV03_00_DEPENDENCE_COUNTER MW(157:142) +#define NVCBC0_QMDV03_00_SELF_COPY_ON_COMPLETION MW(158:158) +#define NVCBC0_QMDV03_00_SELF_COPY_ON_COMPLETION_FALSE 0x00000000 +#define NVCBC0_QMDV03_00_SELF_COPY_ON_COMPLETION_TRUE 0x00000001 +#define NVCBC0_QMDV03_00_CIRCULAR_QUEUE_SIZE MW(184:160) +#define NVCBC0_QMDV03_00_DEMOTE_L2_EVICT_LAST MW(185:185) +#define NVCBC0_QMDV03_00_INVALIDATE_TEXTURE_HEADER_CACHE MW(186:186) +#define NVCBC0_QMDV03_00_INVALIDATE_TEXTURE_HEADER_CACHE_FALSE 0x00000000 +#define NVCBC0_QMDV03_00_INVALIDATE_TEXTURE_HEADER_CACHE_TRUE 0x00000001 +#define NVCBC0_QMDV03_00_INVALIDATE_TEXTURE_SAMPLER_CACHE MW(187:187) +#define NVCBC0_QMDV03_00_INVALIDATE_TEXTURE_SAMPLER_CACHE_FALSE 0x00000000 +#define NVCBC0_QMDV03_00_INVALIDATE_TEXTURE_SAMPLER_CACHE_TRUE 0x00000001 +#define NVCBC0_QMDV03_00_INVALIDATE_TEXTURE_DATA_CACHE MW(188:188) +#define NVCBC0_QMDV03_00_INVALIDATE_TEXTURE_DATA_CACHE_FALSE 0x00000000 +#define NVCBC0_QMDV03_00_INVALIDATE_TEXTURE_DATA_CACHE_TRUE 0x00000001 +#define NVCBC0_QMDV03_00_INVALIDATE_SHADER_DATA_CACHE MW(189:189) +#define NVCBC0_QMDV03_00_INVALIDATE_SHADER_DATA_CACHE_FALSE 0x00000000 +#define NVCBC0_QMDV03_00_INVALIDATE_SHADER_DATA_CACHE_TRUE 0x00000001 +#define NVCBC0_QMDV03_00_INVALIDATE_INSTRUCTION_CACHE MW(190:190) +#define NVCBC0_QMDV03_00_INVALIDATE_INSTRUCTION_CACHE_FALSE 0x00000000 +#define NVCBC0_QMDV03_00_INVALIDATE_INSTRUCTION_CACHE_TRUE 0x00000001 +#define NVCBC0_QMDV03_00_INVALIDATE_SHADER_CONSTANT_CACHE MW(191:191) +#define NVCBC0_QMDV03_00_INVALIDATE_SHADER_CONSTANT_CACHE_FALSE 0x00000000 +#define NVCBC0_QMDV03_00_INVALIDATE_SHADER_CONSTANT_CACHE_TRUE 0x00000001 +#define NVCBC0_QMDV03_00_CTA_RASTER_WIDTH_RESUME MW(223:192) +#define NVCBC0_QMDV03_00_CTA_RASTER_HEIGHT_RESUME MW(239:224) +#define NVCBC0_QMDV03_00_CTA_RASTER_DEPTH_RESUME MW(255:240) +#define NVCBC0_QMDV03_00_PROGRAM_PREFETCH_ADDR_LOWER_SHIFTED MW(287:256) +#define NVCBC0_QMDV03_00_CIRCULAR_QUEUE_ADDR_LOWER MW(319:288) +#define NVCBC0_QMDV03_00_CIRCULAR_QUEUE_ADDR_UPPER MW(327:320) +#define NVCBC0_QMDV03_00_CIRCULAR_QUEUE_ENTRY_SIZE MW(351:336) +#define NVCBC0_QMDV03_00_CWD_REFERENCE_COUNT_ID MW(357:352) +#define NVCBC0_QMDV03_00_CWD_REFERENCE_COUNT_DELTA_MINUS_ONE MW(365:358) +#define NVCBC0_QMDV03_00_CWD_REFERENCE_COUNT_INCR_ENABLE MW(367:367) +#define NVCBC0_QMDV03_00_CWD_REFERENCE_COUNT_INCR_ENABLE_FALSE 0x00000000 +#define NVCBC0_QMDV03_00_CWD_REFERENCE_COUNT_INCR_ENABLE_TRUE 0x00000001 +#define NVCBC0_QMDV03_00_CWD_MEMBAR_TYPE MW(369:368) +#define NVCBC0_QMDV03_00_CWD_MEMBAR_TYPE_L1_NONE 0x00000000 +#define NVCBC0_QMDV03_00_CWD_MEMBAR_TYPE_L1_SYSMEMBAR 0x00000001 +#define NVCBC0_QMDV03_00_CWD_MEMBAR_TYPE_L1_MEMBAR 0x00000003 +#define NVCBC0_QMDV03_00_SEQUENTIALLY_RUN_CTAS MW(370:370) +#define NVCBC0_QMDV03_00_SEQUENTIALLY_RUN_CTAS_FALSE 0x00000000 +#define NVCBC0_QMDV03_00_SEQUENTIALLY_RUN_CTAS_TRUE 0x00000001 +#define NVCBC0_QMDV03_00_CWD_REFERENCE_COUNT_DECR_ENABLE MW(371:371) +#define NVCBC0_QMDV03_00_CWD_REFERENCE_COUNT_DECR_ENABLE_FALSE 0x00000000 +#define NVCBC0_QMDV03_00_CWD_REFERENCE_COUNT_DECR_ENABLE_TRUE 0x00000001 +#define NVCBC0_QMDV03_00_API_VISIBLE_CALL_LIMIT MW(378:378) +#define NVCBC0_QMDV03_00_API_VISIBLE_CALL_LIMIT__32 0x00000000 +#define NVCBC0_QMDV03_00_API_VISIBLE_CALL_LIMIT_NO_CHECK 0x00000001 +#define NVCBC0_QMDV03_00_SAMPLER_INDEX MW(382:382) +#define NVCBC0_QMDV03_00_SAMPLER_INDEX_INDEPENDENTLY 0x00000000 +#define NVCBC0_QMDV03_00_SAMPLER_INDEX_VIA_HEADER_INDEX 0x00000001 +#define NVCBC0_QMDV03_00_DISABLE_AUTO_INVALIDATE MW(383:383) +#define NVCBC0_QMDV03_00_DISABLE_AUTO_INVALIDATE_FALSE 0x00000000 +#define NVCBC0_QMDV03_00_DISABLE_AUTO_INVALIDATE_TRUE 0x00000001 +#define NVCBC0_QMDV03_00_CTA_RASTER_WIDTH MW(415:384) +#define NVCBC0_QMDV03_00_CTA_RASTER_HEIGHT MW(431:416) +#define NVCBC0_QMDV03_00_CTA_RASTER_DEPTH MW(463:448) +#define NVCBC0_QMDV03_00_DEPENDENT_QMD0_POINTER MW(511:480) +#define NVCBC0_QMDV03_00_DEPENDENT_QMD0_ENABLE MW(512:512) +#define NVCBC0_QMDV03_00_DEPENDENT_QMD0_ENABLE_FALSE 0x00000000 +#define NVCBC0_QMDV03_00_DEPENDENT_QMD0_ENABLE_TRUE 0x00000001 +#define NVCBC0_QMDV03_00_DEPENDENT_QMD0_ACTION MW(515:513) +#define NVCBC0_QMDV03_00_DEPENDENT_QMD0_ACTION_QMD_INCREMENT_PUT 0x00000000 +#define NVCBC0_QMDV03_00_DEPENDENT_QMD0_ACTION_QMD_SCHEDULE 0x00000001 +#define NVCBC0_QMDV03_00_DEPENDENT_QMD0_ACTION_QMD_INVALIDATE_COPY_SCHEDULE 0x00000003 +#define NVCBC0_QMDV03_00_DEPENDENT_QMD0_ACTION_QMD_DECREMENT_DEPENDENCE 0x00000004 +#define NVCBC0_QMDV03_00_DEPENDENT_QMD0_PREFETCH MW(516:516) +#define NVCBC0_QMDV03_00_DEPENDENT_QMD0_PREFETCH_FALSE 0x00000000 +#define NVCBC0_QMDV03_00_DEPENDENT_QMD0_PREFETCH_TRUE 0x00000001 +#define NVCBC0_QMDV03_00_DEPENDENT_QMD1_ENABLE MW(517:517) +#define NVCBC0_QMDV03_00_DEPENDENT_QMD1_ENABLE_FALSE 0x00000000 +#define NVCBC0_QMDV03_00_DEPENDENT_QMD1_ENABLE_TRUE 0x00000001 +#define NVCBC0_QMDV03_00_DEPENDENT_QMD1_ACTION MW(520:518) +#define NVCBC0_QMDV03_00_DEPENDENT_QMD1_ACTION_QMD_INCREMENT_PUT 0x00000000 +#define NVCBC0_QMDV03_00_DEPENDENT_QMD1_ACTION_QMD_SCHEDULE 0x00000001 +#define NVCBC0_QMDV03_00_DEPENDENT_QMD1_ACTION_QMD_INVALIDATE_COPY_SCHEDULE 0x00000003 +#define NVCBC0_QMDV03_00_DEPENDENT_QMD1_ACTION_QMD_DECREMENT_DEPENDENCE 0x00000004 +#define NVCBC0_QMDV03_00_DEPENDENT_QMD1_PREFETCH MW(521:521) +#define NVCBC0_QMDV03_00_DEPENDENT_QMD1_PREFETCH_FALSE 0x00000000 +#define NVCBC0_QMDV03_00_DEPENDENT_QMD1_PREFETCH_TRUE 0x00000001 +#define NVCBC0_QMDV03_00_COALESCE_WAITING_PERIOD MW(529:522) +#define NVCBC0_QMDV03_00_QUEUE_ENTRIES_PER_CTA_LOG2 MW(534:530) +#define NVCBC0_QMDV03_00_OCCUPANCY_THRESHOLD_SHARED_MEM MW(542:535) +#define NVCBC0_QMDV03_00_CTA_LAUNCH_QUEUE MW(543:543) +#define NVCBC0_QMDV03_00_SHARED_MEMORY_SIZE MW(561:544) +#define NVCBC0_QMDV03_00_MIN_SM_CONFIG_SHARED_MEM_SIZE MW(567:562) +#define NVCBC0_QMDV03_00_MAX_SM_CONFIG_SHARED_MEM_SIZE MW(574:569) +#define NVCBC0_QMDV03_00_QMD_VERSION MW(579:576) +#define NVCBC0_QMDV03_00_QMD_MAJOR_VERSION MW(583:580) +#define NVCBC0_QMDV03_00_OCCUPANCY_MAX_SHARED_MEM MW(591:584) +#define NVCBC0_QMDV03_00_CTA_THREAD_DIMENSION0 MW(607:592) +#define NVCBC0_QMDV03_00_CTA_THREAD_DIMENSION1 MW(623:608) +#define NVCBC0_QMDV03_00_CTA_THREAD_DIMENSION2 MW(639:624) +#define NVCBC0_QMDV03_00_CONSTANT_BUFFER_VALID(i) MW((640+(i)*1):(640+(i)*1)) +#define NVCBC0_QMDV03_00_CONSTANT_BUFFER_VALID_FALSE 0x00000000 +#define NVCBC0_QMDV03_00_CONSTANT_BUFFER_VALID_TRUE 0x00000001 +#define NVCBC0_QMDV03_00_REGISTER_COUNT_V MW(656:648) +#define NVCBC0_QMDV03_00_TARGET_SM_CONFIG_SHARED_MEM_SIZE MW(662:657) +#define NVCBC0_QMDV03_00_SHARED_ALLOCATION_ENABLE MW(663:663) +#define NVCBC0_QMDV03_00_SHARED_ALLOCATION_ENABLE_FALSE 0x00000000 +#define NVCBC0_QMDV03_00_SHARED_ALLOCATION_ENABLE_TRUE 0x00000001 +#define NVCBC0_QMDV03_00_FREE_CTA_SLOTS_EMPTY_SM MW(671:664) +#define NVCBC0_QMDV03_00_SM_DISABLE_MASK_LOWER MW(703:672) +#define NVCBC0_QMDV03_00_SM_DISABLE_MASK_UPPER MW(735:704) +#define NVCBC0_QMDV03_00_SHADER_LOCAL_MEMORY_LOW_SIZE MW(759:736) +#define NVCBC0_QMDV03_00_BARRIER_COUNT MW(767:763) +#define NVCBC0_QMDV03_00_RELEASE0_ADDRESS_LOWER MW(799:768) +#define NVCBC0_QMDV03_00_RELEASE0_ADDRESS_UPPER MW(807:800) +#define NVCBC0_QMDV03_00_RELEASE0_MEMBAR_TYPE MW(819:819) +#define NVCBC0_QMDV03_00_RELEASE0_MEMBAR_TYPE_FE_NONE 0x00000000 +#define NVCBC0_QMDV03_00_RELEASE0_MEMBAR_TYPE_FE_SYSMEMBAR 0x00000001 +#define NVCBC0_QMDV03_00_RELEASE0_REDUCTION_OP MW(822:820) +#define NVCBC0_QMDV03_00_RELEASE0_REDUCTION_OP_RED_ADD 0x00000000 +#define NVCBC0_QMDV03_00_RELEASE0_REDUCTION_OP_RED_MIN 0x00000001 +#define NVCBC0_QMDV03_00_RELEASE0_REDUCTION_OP_RED_MAX 0x00000002 +#define NVCBC0_QMDV03_00_RELEASE0_REDUCTION_OP_RED_INC 0x00000003 +#define NVCBC0_QMDV03_00_RELEASE0_REDUCTION_OP_RED_DEC 0x00000004 +#define NVCBC0_QMDV03_00_RELEASE0_REDUCTION_OP_RED_AND 0x00000005 +#define NVCBC0_QMDV03_00_RELEASE0_REDUCTION_OP_RED_OR 0x00000006 +#define NVCBC0_QMDV03_00_RELEASE0_REDUCTION_OP_RED_XOR 0x00000007 +#define NVCBC0_QMDV03_00_RELEASE0_ENABLE MW(823:823) +#define NVCBC0_QMDV03_00_RELEASE0_ENABLE_FALSE 0x00000000 +#define NVCBC0_QMDV03_00_RELEASE0_ENABLE_TRUE 0x00000001 +#define NVCBC0_QMDV03_00_RELEASE0_REDUCTION_FORMAT MW(825:824) +#define NVCBC0_QMDV03_00_RELEASE0_REDUCTION_FORMAT_UNSIGNED 0x00000000 +#define NVCBC0_QMDV03_00_RELEASE0_REDUCTION_FORMAT_SIGNED 0x00000001 +#define NVCBC0_QMDV03_00_RELEASE0_REDUCTION_ENABLE MW(826:826) +#define NVCBC0_QMDV03_00_RELEASE0_REDUCTION_ENABLE_FALSE 0x00000000 +#define NVCBC0_QMDV03_00_RELEASE0_REDUCTION_ENABLE_TRUE 0x00000001 +#define NVCBC0_QMDV03_00_RELEASE0_TRAP_TYPE MW(828:827) +#define NVCBC0_QMDV03_00_RELEASE0_TRAP_TYPE_TRAP_NONE 0x00000000 +#define NVCBC0_QMDV03_00_RELEASE0_TRAP_TYPE_TRAP_UNCONDITIONAL 0x00000001 +#define NVCBC0_QMDV03_00_RELEASE0_TRAP_TYPE_TRAP_CONDITIONAL 0x00000002 +#define NVCBC0_QMDV03_00_RELEASE0_TRAP_TYPE_TRAP_CONDITIONAL_EXT 0x00000003 +#define NVCBC0_QMDV03_00_RELEASE0_PAYLOAD64B MW(829:829) +#define NVCBC0_QMDV03_00_RELEASE0_PAYLOAD64B_FALSE 0x00000000 +#define NVCBC0_QMDV03_00_RELEASE0_PAYLOAD64B_TRUE 0x00000001 +#define NVCBC0_QMDV03_00_RELEASE0_STRUCTURE_SIZE MW(831:830) +#define NVCBC0_QMDV03_00_RELEASE0_STRUCTURE_SIZE_SEMAPHORE_FOUR_WORDS 0x00000000 +#define NVCBC0_QMDV03_00_RELEASE0_STRUCTURE_SIZE_SEMAPHORE_ONE_WORD 0x00000001 +#define NVCBC0_QMDV03_00_RELEASE0_STRUCTURE_SIZE_SEMAPHORE_TWO_WORDS 0x00000002 +#define NVCBC0_QMDV03_00_RELEASE0_PAYLOAD_LOWER MW(863:832) +#define NVCBC0_QMDV03_00_RELEASE0_PAYLOAD_UPPER MW(895:864) +#define NVCBC0_QMDV03_00_RELEASE1_ADDRESS_LOWER MW(927:896) +#define NVCBC0_QMDV03_00_RELEASE1_ADDRESS_UPPER MW(935:928) +#define NVCBC0_QMDV03_00_RELEASE1_MEMBAR_TYPE MW(947:947) +#define NVCBC0_QMDV03_00_RELEASE1_MEMBAR_TYPE_FE_NONE 0x00000000 +#define NVCBC0_QMDV03_00_RELEASE1_MEMBAR_TYPE_FE_SYSMEMBAR 0x00000001 +#define NVCBC0_QMDV03_00_RELEASE1_REDUCTION_OP MW(950:948) +#define NVCBC0_QMDV03_00_RELEASE1_REDUCTION_OP_RED_ADD 0x00000000 +#define NVCBC0_QMDV03_00_RELEASE1_REDUCTION_OP_RED_MIN 0x00000001 +#define NVCBC0_QMDV03_00_RELEASE1_REDUCTION_OP_RED_MAX 0x00000002 +#define NVCBC0_QMDV03_00_RELEASE1_REDUCTION_OP_RED_INC 0x00000003 +#define NVCBC0_QMDV03_00_RELEASE1_REDUCTION_OP_RED_DEC 0x00000004 +#define NVCBC0_QMDV03_00_RELEASE1_REDUCTION_OP_RED_AND 0x00000005 +#define NVCBC0_QMDV03_00_RELEASE1_REDUCTION_OP_RED_OR 0x00000006 +#define NVCBC0_QMDV03_00_RELEASE1_REDUCTION_OP_RED_XOR 0x00000007 +#define NVCBC0_QMDV03_00_RELEASE1_ENABLE MW(951:951) +#define NVCBC0_QMDV03_00_RELEASE1_ENABLE_FALSE 0x00000000 +#define NVCBC0_QMDV03_00_RELEASE1_ENABLE_TRUE 0x00000001 +#define NVCBC0_QMDV03_00_RELEASE1_REDUCTION_FORMAT MW(953:952) +#define NVCBC0_QMDV03_00_RELEASE1_REDUCTION_FORMAT_UNSIGNED 0x00000000 +#define NVCBC0_QMDV03_00_RELEASE1_REDUCTION_FORMAT_SIGNED 0x00000001 +#define NVCBC0_QMDV03_00_RELEASE1_REDUCTION_ENABLE MW(954:954) +#define NVCBC0_QMDV03_00_RELEASE1_REDUCTION_ENABLE_FALSE 0x00000000 +#define NVCBC0_QMDV03_00_RELEASE1_REDUCTION_ENABLE_TRUE 0x00000001 +#define NVCBC0_QMDV03_00_RELEASE1_TRAP_TYPE MW(956:955) +#define NVCBC0_QMDV03_00_RELEASE1_TRAP_TYPE_TRAP_NONE 0x00000000 +#define NVCBC0_QMDV03_00_RELEASE1_TRAP_TYPE_TRAP_UNCONDITIONAL 0x00000001 +#define NVCBC0_QMDV03_00_RELEASE1_TRAP_TYPE_TRAP_CONDITIONAL 0x00000002 +#define NVCBC0_QMDV03_00_RELEASE1_TRAP_TYPE_TRAP_CONDITIONAL_EXT 0x00000003 +#define NVCBC0_QMDV03_00_RELEASE1_PAYLOAD64B MW(957:957) +#define NVCBC0_QMDV03_00_RELEASE1_PAYLOAD64B_FALSE 0x00000000 +#define NVCBC0_QMDV03_00_RELEASE1_PAYLOAD64B_TRUE 0x00000001 +#define NVCBC0_QMDV03_00_RELEASE1_STRUCTURE_SIZE MW(959:958) +#define NVCBC0_QMDV03_00_RELEASE1_STRUCTURE_SIZE_SEMAPHORE_FOUR_WORDS 0x00000000 +#define NVCBC0_QMDV03_00_RELEASE1_STRUCTURE_SIZE_SEMAPHORE_ONE_WORD 0x00000001 +#define NVCBC0_QMDV03_00_RELEASE1_STRUCTURE_SIZE_SEMAPHORE_TWO_WORDS 0x00000002 +#define NVCBC0_QMDV03_00_RELEASE1_PAYLOAD_LOWER MW(991:960) +#define NVCBC0_QMDV03_00_RELEASE1_PAYLOAD_UPPER MW(1023:992) +#define NVCBC0_QMDV03_00_CONSTANT_BUFFER_ADDR_LOWER(i) MW((1055+(i)*64):(1024+(i)*64)) +#define NVCBC0_QMDV03_00_CONSTANT_BUFFER_ADDR_UPPER(i) MW((1072+(i)*64):(1056+(i)*64)) +#define NVCBC0_QMDV03_00_CONSTANT_BUFFER_PREFETCH_POST(i) MW((1073+(i)*64):(1073+(i)*64)) +#define NVCBC0_QMDV03_00_CONSTANT_BUFFER_PREFETCH_POST_FALSE 0x00000000 +#define NVCBC0_QMDV03_00_CONSTANT_BUFFER_PREFETCH_POST_TRUE 0x00000001 +#define NVCBC0_QMDV03_00_CONSTANT_BUFFER_INVALIDATE(i) MW((1074+(i)*64):(1074+(i)*64)) +#define NVCBC0_QMDV03_00_CONSTANT_BUFFER_INVALIDATE_FALSE 0x00000000 +#define NVCBC0_QMDV03_00_CONSTANT_BUFFER_INVALIDATE_TRUE 0x00000001 +#define NVCBC0_QMDV03_00_CONSTANT_BUFFER_SIZE_SHIFTED4(i) MW((1087+(i)*64):(1075+(i)*64)) +#define NVCBC0_QMDV03_00_PROGRAM_ADDRESS_LOWER MW(1567:1536) +#define NVCBC0_QMDV03_00_PROGRAM_ADDRESS_UPPER MW(1584:1568) +#define NVCBC0_QMDV03_00_SHADER_LOCAL_MEMORY_HIGH_SIZE MW(1623:1600) +#define NVCBC0_QMDV03_00_PROGRAM_PREFETCH_ADDR_UPPER_SHIFTED MW(1640:1632) +#define NVCBC0_QMDV03_00_PROGRAM_PREFETCH_SIZE MW(1649:1641) +#define NVCBC0_QMDV03_00_PROGRAM_PREFETCH_TYPE MW(1651:1650) +#define NVCBC0_QMDV03_00_PROGRAM_PREFETCH_TYPE_PREFETCH_LAUNCH 0x00000000 +#define NVCBC0_QMDV03_00_PROGRAM_PREFETCH_TYPE_PREFTECH_POST 0x00000001 +#define NVCBC0_QMDV03_00_SASS_VERSION MW(1663:1656) +#define NVCBC0_QMDV03_00_RELEASE2_ADDRESS_LOWER MW(1695:1664) +#define NVCBC0_QMDV03_00_RELEASE2_ADDRESS_UPPER MW(1703:1696) +#define NVCBC0_QMDV03_00_RELEASE2_MEMBAR_TYPE MW(1715:1715) +#define NVCBC0_QMDV03_00_RELEASE2_MEMBAR_TYPE_FE_NONE 0x00000000 +#define NVCBC0_QMDV03_00_RELEASE2_MEMBAR_TYPE_FE_SYSMEMBAR 0x00000001 +#define NVCBC0_QMDV03_00_RELEASE2_REDUCTION_OP MW(1718:1716) +#define NVCBC0_QMDV03_00_RELEASE2_REDUCTION_OP_RED_ADD 0x00000000 +#define NVCBC0_QMDV03_00_RELEASE2_REDUCTION_OP_RED_MIN 0x00000001 +#define NVCBC0_QMDV03_00_RELEASE2_REDUCTION_OP_RED_MAX 0x00000002 +#define NVCBC0_QMDV03_00_RELEASE2_REDUCTION_OP_RED_INC 0x00000003 +#define NVCBC0_QMDV03_00_RELEASE2_REDUCTION_OP_RED_DEC 0x00000004 +#define NVCBC0_QMDV03_00_RELEASE2_REDUCTION_OP_RED_AND 0x00000005 +#define NVCBC0_QMDV03_00_RELEASE2_REDUCTION_OP_RED_OR 0x00000006 +#define NVCBC0_QMDV03_00_RELEASE2_REDUCTION_OP_RED_XOR 0x00000007 +#define NVCBC0_QMDV03_00_RELEASE2_ENABLE MW(1719:1719) +#define NVCBC0_QMDV03_00_RELEASE2_ENABLE_FALSE 0x00000000 +#define NVCBC0_QMDV03_00_RELEASE2_ENABLE_TRUE 0x00000001 +#define NVCBC0_QMDV03_00_RELEASE2_REDUCTION_FORMAT MW(1721:1720) +#define NVCBC0_QMDV03_00_RELEASE2_REDUCTION_FORMAT_UNSIGNED 0x00000000 +#define NVCBC0_QMDV03_00_RELEASE2_REDUCTION_FORMAT_SIGNED 0x00000001 +#define NVCBC0_QMDV03_00_RELEASE2_REDUCTION_ENABLE MW(1722:1722) +#define NVCBC0_QMDV03_00_RELEASE2_REDUCTION_ENABLE_FALSE 0x00000000 +#define NVCBC0_QMDV03_00_RELEASE2_REDUCTION_ENABLE_TRUE 0x00000001 +#define NVCBC0_QMDV03_00_RELEASE2_TRAP_TYPE MW(1724:1723) +#define NVCBC0_QMDV03_00_RELEASE2_TRAP_TYPE_TRAP_NONE 0x00000000 +#define NVCBC0_QMDV03_00_RELEASE2_TRAP_TYPE_TRAP_UNCONDITIONAL 0x00000001 +#define NVCBC0_QMDV03_00_RELEASE2_TRAP_TYPE_TRAP_CONDITIONAL 0x00000002 +#define NVCBC0_QMDV03_00_RELEASE2_TRAP_TYPE_TRAP_CONDITIONAL_EXT 0x00000003 +#define NVCBC0_QMDV03_00_RELEASE2_PAYLOAD64B MW(1725:1725) +#define NVCBC0_QMDV03_00_RELEASE2_PAYLOAD64B_FALSE 0x00000000 +#define NVCBC0_QMDV03_00_RELEASE2_PAYLOAD64B_TRUE 0x00000001 +#define NVCBC0_QMDV03_00_RELEASE2_STRUCTURE_SIZE MW(1727:1726) +#define NVCBC0_QMDV03_00_RELEASE2_STRUCTURE_SIZE_SEMAPHORE_FOUR_WORDS 0x00000000 +#define NVCBC0_QMDV03_00_RELEASE2_STRUCTURE_SIZE_SEMAPHORE_ONE_WORD 0x00000001 +#define NVCBC0_QMDV03_00_RELEASE2_STRUCTURE_SIZE_SEMAPHORE_TWO_WORDS 0x00000002 +#define NVCBC0_QMDV03_00_RELEASE2_PAYLOAD_LOWER MW(1759:1728) +#define NVCBC0_QMDV03_00_RELEASE2_PAYLOAD_UPPER MW(1791:1760) +#define NVCBC0_QMDV03_00_OCCUPANCY_THRESHOLD_WARP MW(1799:1792) +#define NVCBC0_QMDV03_00_OCCUPANCY_MAX_WARP MW(1807:1800) +#define NVCBC0_QMDV03_00_OCCUPANCY_THRESHOLD_REGISTER MW(1815:1808) +#define NVCBC0_QMDV03_00_OCCUPANCY_MAX_REGISTER MW(1823:1816) +#define NVCBC0_QMDV03_00_HW_ONLY_INNER_GET MW(1854:1824) +#define NVCBC0_QMDV03_00_HW_ONLY_REQUIRE_SCHEDULING_PCAS MW(1855:1855) +#define NVCBC0_QMDV03_00_HW_ONLY_INNER_PUT MW(1886:1856) +#define NVCBC0_QMDV03_00_HW_ONLY_SPAN_LIST_HEAD_INDEX MW(1917:1888) +#define NVCBC0_QMDV03_00_HW_ONLY_SPAN_LIST_HEAD_INDEX_VALID MW(1919:1919) +#define NVCBC0_QMDV03_00_HW_ONLY_SPAN_LIST_HEAD_INDEX_VALID_FALSE 0x00000000 +#define NVCBC0_QMDV03_00_HW_ONLY_SPAN_LIST_HEAD_INDEX_VALID_TRUE 0x00000001 +#define NVCBC0_QMDV03_00_HW_ONLY_SKED_NEXT_QMD_POINTER MW(1951:1920) +#define NVCBC0_QMDV03_00_HW_ONLY_DEPENDENCE_COUNTER MW(1967:1952) +#define NVCBC0_QMDV03_00_DEBUG_ID_UPPER MW(2015:1984) +#define NVCBC0_QMDV03_00_DEBUG_ID_LOWER MW(2047:2016) + + +/* +** Queue Meta Data, Version 04_00 + */ + +#define NVCBC0_QMDV04_00_DEPENDENCE_COUNTER MW(15:0) +#define NVCBC0_QMDV04_00_QMD_GROUP_ID MW(21:16) +#define NVCBC0_QMDV04_00_ADD_TO_HEAD_OF_QMD_GROUP_LINKED_LIST MW(22:22) +#define NVCBC0_QMDV04_00_ADD_TO_HEAD_OF_QMD_GROUP_LINKED_LIST_FALSE 0x00000000 +#define NVCBC0_QMDV04_00_ADD_TO_HEAD_OF_QMD_GROUP_LINKED_LIST_TRUE 0x00000001 +#define NVCBC0_QMDV04_00_QMD_TYPE MW(25:23) +#define NVCBC0_QMDV04_00_QMD_TYPE_QUEUE 0x00000000 +#define NVCBC0_QMDV04_00_QMD_TYPE_GRID_NULL 0x00000001 +#define NVCBC0_QMDV04_00_QMD_TYPE_GRID_CTA 0x00000002 +#define NVCBC0_QMDV04_00_QMD_TYPE_GRID_GPC_CGA 0x00000003 +#define NVCBC0_QMDV04_00_QMD_TYPE_GRID_GPU_CGA 0x00000004 +#define NVCBC0_QMDV04_00_QMD_TYPE_GRID_GPU_GPC_CGA 0x00000005 +#define NVCBC0_QMDV04_00_ARRIVE_AT_LATCH_VALID MW(28:28) +#define NVCBC0_QMDV04_00_WAIT_ON_LATCH_VALID MW(29:29) +#define NVCBC0_QMDV04_00_REQUIRE_SCHEDULING_PCAS MW(30:30) +#define NVCBC0_QMDV04_00_REQUIRE_SCHEDULING_PCAS_FALSE 0x00000000 +#define NVCBC0_QMDV04_00_REQUIRE_SCHEDULING_PCAS_TRUE 0x00000001 +#define NVCBC0_QMDV04_00_TPC_DISABLE_MASK_VALID MW(31:31) +#define NVCBC0_QMDV04_00_TPC_DISABLE_MASK_VALID_FALSE 0x00000000 +#define NVCBC0_QMDV04_00_TPC_DISABLE_MASK_VALID_TRUE 0x00000001 +#define NVCBC0_QMDV04_00_CIRCULAR_QUEUE_SIZE MW(56:32) +#define NVCBC0_QMDV04_00_INNER_GET MW(94:64) +#define NVCBC0_QMDV04_00_INNER_OVERFLOW MW(95:95) +#define NVCBC0_QMDV04_00_INNER_PUT MW(126:96) +#define NVCBC0_QMDV04_00_INNER_STICKY_OVERFLOW MW(127:127) +#define NVCBC0_QMDV04_00_HW_ONLY_INNER_GET MW(190:160) +#define NVCBC0_QMDV04_00_HW_ONLY_INNER_PUT MW(222:192) +#define NVCBC0_QMDV04_00_HW_ONLY_SPAN_LIST_HEAD_INDEX MW(253:224) +#define NVCBC0_QMDV04_00_HW_ONLY_SPAN_LIST_HEAD_INDEX_VALID MW(254:254) +#define NVCBC0_QMDV04_00_HW_ONLY_SPAN_LIST_HEAD_INDEX_VALID_FALSE 0x00000000 +#define NVCBC0_QMDV04_00_HW_ONLY_SPAN_LIST_HEAD_INDEX_VALID_TRUE 0x00000001 +#define NVCBC0_QMDV04_00_HW_ONLY_SKED_NEXT_QMD_POINTER MW(287:256) +#define NVCBC0_QMDV04_00_HW_ONLY_DEPENDENCE_COUNTER MW(303:288) +#define NVCBC0_QMDV04_00_HW_ONLY_REQUIRE_SCHEDULING_PCAS MW(304:304) +#define NVCBC0_QMDV04_00_RELEASE_ENABLE(i) MW((320+(i)*16):(320+(i)*16)) +#define NVCBC0_QMDV04_00_RELEASE_ENABLE_FALSE 0x00000000 +#define NVCBC0_QMDV04_00_RELEASE_ENABLE_TRUE 0x00000001 +#define NVCBC0_QMDV04_00_RELEASE_STRUCTURE_SIZE(i) MW((322+(i)*16):(321+(i)*16)) +#define NVCBC0_QMDV04_00_RELEASE_STRUCTURE_SIZE_SEMAPHORE_FOUR_WORDS 0x00000000 +#define NVCBC0_QMDV04_00_RELEASE_STRUCTURE_SIZE_SEMAPHORE_ONE_WORD 0x00000001 +#define NVCBC0_QMDV04_00_RELEASE_STRUCTURE_SIZE_SEMAPHORE_TWO_WORDS 0x00000002 +#define NVCBC0_QMDV04_00_RELEASE_MEMBAR_TYPE(i) MW((323+(i)*16):(323+(i)*16)) +#define NVCBC0_QMDV04_00_RELEASE_MEMBAR_TYPE_FE_NONE 0x00000000 +#define NVCBC0_QMDV04_00_RELEASE_MEMBAR_TYPE_FE_SYSMEMBAR 0x00000001 +#define NVCBC0_QMDV04_00_RELEASE_REDUCTION_ENABLE(i) MW((324+(i)*16):(324+(i)*16)) +#define NVCBC0_QMDV04_00_RELEASE_REDUCTION_ENABLE_FALSE 0x00000000 +#define NVCBC0_QMDV04_00_RELEASE_REDUCTION_ENABLE_TRUE 0x00000001 +#define NVCBC0_QMDV04_00_RELEASE_REDUCTION_OP(i) MW((327+(i)*16):(325+(i)*16)) +#define NVCBC0_QMDV04_00_RELEASE_REDUCTION_OP_RED_ADD 0x00000000 +#define NVCBC0_QMDV04_00_RELEASE_REDUCTION_OP_RED_MIN 0x00000001 +#define NVCBC0_QMDV04_00_RELEASE_REDUCTION_OP_RED_MAX 0x00000002 +#define NVCBC0_QMDV04_00_RELEASE_REDUCTION_OP_RED_INC 0x00000003 +#define NVCBC0_QMDV04_00_RELEASE_REDUCTION_OP_RED_DEC 0x00000004 +#define NVCBC0_QMDV04_00_RELEASE_REDUCTION_OP_RED_AND 0x00000005 +#define NVCBC0_QMDV04_00_RELEASE_REDUCTION_OP_RED_OR 0x00000006 +#define NVCBC0_QMDV04_00_RELEASE_REDUCTION_OP_RED_XOR 0x00000007 +#define NVCBC0_QMDV04_00_RELEASE_REDUCTION_FORMAT(i) MW((329+(i)*16):(328+(i)*16)) +#define NVCBC0_QMDV04_00_RELEASE_REDUCTION_FORMAT_UNSIGNED 0x00000000 +#define NVCBC0_QMDV04_00_RELEASE_REDUCTION_FORMAT_SIGNED 0x00000001 +#define NVCBC0_QMDV04_00_RELEASE_TRAP_TYPE(i) MW((331+(i)*16):(330+(i)*16)) +#define NVCBC0_QMDV04_00_RELEASE_TRAP_TYPE_TRAP_NONE 0x00000000 +#define NVCBC0_QMDV04_00_RELEASE_TRAP_TYPE_TRAP_UNCONDITIONAL 0x00000001 +#define NVCBC0_QMDV04_00_RELEASE_TRAP_TYPE_TRAP_CONDITIONAL 0x00000002 +#define NVCBC0_QMDV04_00_RELEASE_TRAP_TYPE_TRAP_CONDITIONAL_EXT 0x00000003 +#define NVCBC0_QMDV04_00_RELEASE_PAYLOAD64B(i) MW((332+(i)*16):(332+(i)*16)) +#define NVCBC0_QMDV04_00_RELEASE_PAYLOAD64B_FALSE 0x00000000 +#define NVCBC0_QMDV04_00_RELEASE_PAYLOAD64B_TRUE 0x00000001 +#define NVCBC0_QMDV04_00_RELEASE_RESERVED_INFO(i) MW((335+(i)*16):(333+(i)*16)) +#define NVCBC0_QMDV04_00_DEPENDENT_QMD_ENABLE(i) MW((368+(i)*5):(368+(i)*5)) +#define NVCBC0_QMDV04_00_DEPENDENT_QMD_ENABLE_FALSE 0x00000000 +#define NVCBC0_QMDV04_00_DEPENDENT_QMD_ENABLE_TRUE 0x00000001 +#define NVCBC0_QMDV04_00_DEPENDENT_QMD_ACTION(i) MW((371+(i)*5):(369+(i)*5)) +#define NVCBC0_QMDV04_00_DEPENDENT_QMD_ACTION_QMD_INCREMENT_PUT 0x00000000 +#define NVCBC0_QMDV04_00_DEPENDENT_QMD_ACTION_QMD_SCHEDULE 0x00000001 +#define NVCBC0_QMDV04_00_DEPENDENT_QMD_ACTION_QMD_INVALIDATE_COPY_SCHEDULE 0x00000003 +#define NVCBC0_QMDV04_00_DEPENDENT_QMD_ACTION_QMD_DECREMENT_DEPENDENCE 0x00000004 +#define NVCBC0_QMDV04_00_DEPENDENT_QMD_PREFETCH(i) MW((372+(i)*5):(372+(i)*5)) +#define NVCBC0_QMDV04_00_DEPENDENT_QMD_PREFETCH_FALSE 0x00000000 +#define NVCBC0_QMDV04_00_DEPENDENT_QMD_PREFETCH_TRUE 0x00000001 +#define NVCBC0_QMDV04_00_SELF_COPY_ON_COMPLETION MW(378:378) +#define NVCBC0_QMDV04_00_SELF_COPY_ON_COMPLETION_FALSE 0x00000000 +#define NVCBC0_QMDV04_00_SELF_COPY_ON_COMPLETION_TRUE 0x00000001 +#define NVCBC0_QMDV04_00_DEMOTE_L2_EVICT_LAST MW(379:379) +#define NVCBC0_QMDV04_00_DEMOTE_L2_EVICT_LAST_FALSE 0x00000000 +#define NVCBC0_QMDV04_00_DEMOTE_L2_EVICT_LAST_TRUE 0x00000001 +#define NVCBC0_QMDV04_00_DISABLE_AUTO_INVALIDATE MW(380:380) +#define NVCBC0_QMDV04_00_DISABLE_AUTO_INVALIDATE_FALSE 0x00000000 +#define NVCBC0_QMDV04_00_DISABLE_AUTO_INVALIDATE_TRUE 0x00000001 +#define NVCBC0_QMDV04_00_CORRELATION_ID_INTERNAL MW(381:381) +#define NVCBC0_QMDV04_00_CORRELATION_ID_INTERNAL_FALSE 0x00000000 +#define NVCBC0_QMDV04_00_CORRELATION_ID_INTERNAL_TRUE 0x00000001 +#define NVCBC0_QMDV04_00_CWD_MEMBAR_TASK_CHASING_ENABLE MW(382:382) +#define NVCBC0_QMDV04_00_CWD_MEMBAR_TASK_CHASING_ENABLE_FALSE 0x00000000 +#define NVCBC0_QMDV04_00_CWD_MEMBAR_TASK_CHASING_ENABLE_TRUE 0x00000001 +#define NVCBC0_QMDV04_00_CORRELATION_ID MW(415:384) +#define NVCBC0_QMDV04_00_CONSTANT_BUFFER_VALID(i) MW((416+(i)*4):(416+(i)*4)) +#define NVCBC0_QMDV04_00_CONSTANT_BUFFER_VALID_FALSE 0x00000000 +#define NVCBC0_QMDV04_00_CONSTANT_BUFFER_VALID_TRUE 0x00000001 +#define NVCBC0_QMDV04_00_CONSTANT_BUFFER_PREFETCH(i) MW((418+(i)*4):(417+(i)*4)) +#define NVCBC0_QMDV04_00_CONSTANT_BUFFER_PREFETCH_PREFETCH_NONE 0x00000000 +#define NVCBC0_QMDV04_00_CONSTANT_BUFFER_PREFETCH_PREFETCH_PRE 0x00000001 +#define NVCBC0_QMDV04_00_CONSTANT_BUFFER_PREFETCH_PREFETCH_POST 0x00000002 +#define NVCBC0_QMDV04_00_CONSTANT_BUFFER_INVALIDATE(i) MW((419+(i)*4):(419+(i)*4)) +#define NVCBC0_QMDV04_00_CONSTANT_BUFFER_INVALIDATE_FALSE 0x00000000 +#define NVCBC0_QMDV04_00_CONSTANT_BUFFER_INVALIDATE_TRUE 0x00000001 +#define NVCBC0_QMDV04_00_DEPENDENT_QMD0_POINTER MW(479:448) +#define NVCBC0_QMDV04_00_DEPENDENT_QMD1_POINTER MW(511:480) +#define NVCBC0_QMDV04_00_SHADER_LOCAL_MEMORY_LOW_SIZE MW(535:512) +#define NVCBC0_QMDV04_00_SASS_VERSION MW(543:536) +#define NVCBC0_QMDV04_00_SHADER_LOCAL_MEMORY_HIGH_SIZE MW(567:544) +#define NVCBC0_QMDV04_00_API_VISIBLE_CALL_LIMIT MW(568:568) +#define NVCBC0_QMDV04_00_API_VISIBLE_CALL_LIMIT__32 0x00000000 +#define NVCBC0_QMDV04_00_API_VISIBLE_CALL_LIMIT_NO_CHECK 0x00000001 +#define NVCBC0_QMDV04_00_SAMPLER_INDEX MW(569:569) +#define NVCBC0_QMDV04_00_SAMPLER_INDEX_INDEPENDENTLY 0x00000000 +#define NVCBC0_QMDV04_00_SAMPLER_INDEX_VIA_HEADER_INDEX 0x00000001 +#define NVCBC0_QMDV04_00_CONSTANT_BUFFER_PREFETCH_PRE_MAX_SIZE_SHIFTED8 MW(575:570) +#define NVCBC0_QMDV04_00_QMD_MINOR_VERSION MW(579:576) +#define NVCBC0_QMDV04_00_QMD_MAJOR_VERSION MW(583:580) +#define NVCBC0_QMDV04_00_SHARED_MEMORY_SIZE MW(601:584) +#define NVCBC0_QMDV04_00_INVALIDATE_TEXTURE_HEADER_CACHE MW(602:602) +#define NVCBC0_QMDV04_00_INVALIDATE_TEXTURE_HEADER_CACHE_FALSE 0x00000000 +#define NVCBC0_QMDV04_00_INVALIDATE_TEXTURE_HEADER_CACHE_TRUE 0x00000001 +#define NVCBC0_QMDV04_00_INVALIDATE_TEXTURE_SAMPLER_CACHE MW(603:603) +#define NVCBC0_QMDV04_00_INVALIDATE_TEXTURE_SAMPLER_CACHE_FALSE 0x00000000 +#define NVCBC0_QMDV04_00_INVALIDATE_TEXTURE_SAMPLER_CACHE_TRUE 0x00000001 +#define NVCBC0_QMDV04_00_INVALIDATE_TEXTURE_DATA_CACHE MW(604:604) +#define NVCBC0_QMDV04_00_INVALIDATE_TEXTURE_DATA_CACHE_FALSE 0x00000000 +#define NVCBC0_QMDV04_00_INVALIDATE_TEXTURE_DATA_CACHE_TRUE 0x00000001 +#define NVCBC0_QMDV04_00_INVALIDATE_SHADER_DATA_CACHE MW(605:605) +#define NVCBC0_QMDV04_00_INVALIDATE_SHADER_DATA_CACHE_FALSE 0x00000000 +#define NVCBC0_QMDV04_00_INVALIDATE_SHADER_DATA_CACHE_TRUE 0x00000001 +#define NVCBC0_QMDV04_00_INVALIDATE_INSTRUCTION_CACHE MW(606:606) +#define NVCBC0_QMDV04_00_INVALIDATE_INSTRUCTION_CACHE_FALSE 0x00000000 +#define NVCBC0_QMDV04_00_INVALIDATE_INSTRUCTION_CACHE_TRUE 0x00000001 +#define NVCBC0_QMDV04_00_INVALIDATE_SHADER_CONSTANT_CACHE MW(607:607) +#define NVCBC0_QMDV04_00_INVALIDATE_SHADER_CONSTANT_CACHE_FALSE 0x00000000 +#define NVCBC0_QMDV04_00_INVALIDATE_SHADER_CONSTANT_CACHE_TRUE 0x00000001 +#define NVCBC0_QMDV04_00_MIN_SM_CONFIG_SHARED_MEM_SIZE MW(613:608) +#define NVCBC0_QMDV04_00_MAX_SM_CONFIG_SHARED_MEM_SIZE MW(619:614) +#define NVCBC0_QMDV04_00_TARGET_SM_CONFIG_SHARED_MEM_SIZE MW(625:620) +#define NVCBC0_QMDV04_00_SHARED_ALLOCATION_ENABLE MW(626:626) +#define NVCBC0_QMDV04_00_SHARED_ALLOCATION_ENABLE_FALSE 0x00000000 +#define NVCBC0_QMDV04_00_SHARED_ALLOCATION_ENABLE_TRUE 0x00000001 +#define NVCBC0_QMDV04_00_RELEASE_SEMAPHORE0_ADDR_LOWER MW(671:640) +#define NVCBC0_QMDV04_00_RELEASE_SEMAPHORE0_ADDR_UPPER MW(696:672) +#define NVCBC0_QMDV04_00_RELEASE_SEMAPHORE0_PAYLOAD_LOWER MW(735:704) +#define NVCBC0_QMDV04_00_RELEASE_SEMAPHORE0_PAYLOAD_UPPER MW(767:736) +#define NVCBC0_QMDV04_00_RELEASE_SEMAPHORE1_ADDR_LOWER MW(799:768) +#define NVCBC0_QMDV04_00_RELEASE_SEMAPHORE1_ADDR_UPPER MW(824:800) +#define NVCBC0_QMDV04_00_RELEASE_SEMAPHORE1_PAYLOAD_LOWER MW(863:832) +#define NVCBC0_QMDV04_00_RELEASE_SEMAPHORE1_PAYLOAD_UPPER MW(895:864) +#define NVCBC0_QMDV04_00_RELEASE_SEMAPHORE2_ADDR_LOWER MW(927:896) +#define NVCBC0_QMDV04_00_RELEASE_SEMAPHORE2_ADDR_UPPER MW(952:928) +#define NVCBC0_QMDV04_00_RELEASE_SEMAPHORE2_PAYLOAD_LOWER MW(991:960) +#define NVCBC0_QMDV04_00_RELEASE_SEMAPHORE2_PAYLOAD_UPPER MW(1023:992) +#define NVCBC0_QMDV04_00_GRID_WIDTH MW(1055:1024) +#define NVCBC0_QMDV04_00_GRID_HEIGHT MW(1071:1056) +#define NVCBC0_QMDV04_00_GRID_DEPTH MW(1103:1088) +#define NVCBC0_QMDV04_00_CWD_REFERENCE_COUNT_DELTA_MINUS_ONE MW(1127:1120) +#define NVCBC0_QMDV04_00_CWD_REFERENCE_COUNT_ID MW(1133:1128) +#define NVCBC0_QMDV04_00_CWD_REFERENCE_COUNT_INCR_ENABLE MW(1134:1134) +#define NVCBC0_QMDV04_00_CWD_REFERENCE_COUNT_INCR_ENABLE_FALSE 0x00000000 +#define NVCBC0_QMDV04_00_CWD_REFERENCE_COUNT_INCR_ENABLE_TRUE 0x00000001 +#define NVCBC0_QMDV04_00_CWD_REFERENCE_COUNT_DECR_ENABLE MW(1135:1135) +#define NVCBC0_QMDV04_00_CWD_REFERENCE_COUNT_DECR_ENABLE_FALSE 0x00000000 +#define NVCBC0_QMDV04_00_CWD_REFERENCE_COUNT_DECR_ENABLE_TRUE 0x00000001 +#define NVCBC0_QMDV04_00_CWD_MEMBAR_TYPE MW(1137:1136) +#define NVCBC0_QMDV04_00_CWD_MEMBAR_TYPE_L1_NONE 0x00000000 +#define NVCBC0_QMDV04_00_CWD_MEMBAR_TYPE_L1_SYSMEMBAR 0x00000001 +#define NVCBC0_QMDV04_00_CWD_MEMBAR_TYPE_L1_MEMBAR 0x00000003 +#define NVCBC0_QMDV04_00_SEQUENTIALLY_RUN_CTAS MW(1138:1138) +#define NVCBC0_QMDV04_00_SEQUENTIALLY_RUN_CTAS_FALSE 0x00000000 +#define NVCBC0_QMDV04_00_SEQUENTIALLY_RUN_CTAS_TRUE 0x00000001 +#define NVCBC0_QMDV04_00_CTA_LAUNCH_QUEUE MW(1139:1139) +#define NVCBC0_QMDV04_00_FREE_CTA_SLOTS_EMPTY_SM MW(1147:1140) +#define NVCBC0_QMDV04_00_SYNC_DOMAIN_ID MW(1149:1148) +#define NVCBC0_QMDV04_00_PRE_EXIT_AT_LAST_CTA_LAUNCH MW(1150:1150) +#define NVCBC0_QMDV04_00_PRE_EXIT_AT_LAST_CTA_LAUNCH_FALSE 0x00000000 +#define NVCBC0_QMDV04_00_PRE_EXIT_AT_LAST_CTA_LAUNCH_TRUE 0x00000001 +#define NVCBC0_QMDV04_00_ENABLE_PROGRAM_PRE_EXIT MW(1151:1151) +#define NVCBC0_QMDV04_00_ENABLE_PROGRAM_PRE_EXIT_FALSE 0x00000000 +#define NVCBC0_QMDV04_00_ENABLE_PROGRAM_PRE_EXIT_TRUE 0x00000001 +#define NVCBC0_QMDV04_00_CTA_THREAD_DIMENSION0 MW(1167:1152) +#define NVCBC0_QMDV04_00_CTA_THREAD_DIMENSION1 MW(1183:1168) +#define NVCBC0_QMDV04_00_CTA_THREAD_DIMENSION2 MW(1199:1184) +#define NVCBC0_QMDV04_00_REGISTER_COUNT MW(1208:1200) +#define NVCBC0_QMDV04_00_BARRIER_COUNT MW(1215:1211) +#define NVCBC0_QMDV04_00_PROGRAM_ADDRESS_LOWER MW(1247:1216) +#define NVCBC0_QMDV04_00_PROGRAM_ADDRESS_UPPER MW(1272:1248) +#define NVCBC0_QMDV04_00_OCCUPANCY_THRESHOLD_WARP MW(1287:1280) +#define NVCBC0_QMDV04_00_OCCUPANCY_MAX_WARP MW(1295:1288) +#define NVCBC0_QMDV04_00_OCCUPANCY_THRESHOLD_REGISTER MW(1303:1296) +#define NVCBC0_QMDV04_00_OCCUPANCY_MAX_REGISTER MW(1311:1304) +#define NVCBC0_QMDV04_00_OCCUPANCY_THRESHOLD_SHARED_MEM MW(1319:1312) +#define NVCBC0_QMDV04_00_OCCUPANCY_MAX_SHARED_MEM MW(1327:1320) +#define NVCBC0_QMDV04_00_PROGRAM_PREFETCH_ADDR_LOWER_SHIFTED MW(1375:1344) +#define NVCBC0_QMDV04_00_PROGRAM_PREFETCH_ADDR_UPPER_SHIFTED MW(1392:1376) +#define NVCBC0_QMDV04_00_PROGRAM_PREFETCH_SIZE MW(1401:1393) +#define NVCBC0_QMDV04_00_PROGRAM_PREFETCH_TYPE MW(1403:1402) +#define NVCBC0_QMDV04_00_PROGRAM_PREFETCH_TYPE_PREFETCH_LAUNCH 0x00000000 +#define NVCBC0_QMDV04_00_PROGRAM_PREFETCH_TYPE_PREFTECH_POST 0x00000001 +#define NVCBC0_QMDV04_00_LATCH_ACQUIRE_INVALIDATE_SHADER_DATA_CACHE MW(1406:1406) +#define NVCBC0_QMDV04_00_LATCH_ACQUIRE_INVALIDATE_SHADER_DATA_CACHE_FALSE 0x00000000 +#define NVCBC0_QMDV04_00_LATCH_ACQUIRE_INVALIDATE_SHADER_DATA_CACHE_TRUE 0x00000001 +#define NVCBC0_QMDV04_00_LATCH_ACQUIRE_INVALIDATE_TEXTURE_DATA_CACHE MW(1407:1407) +#define NVCBC0_QMDV04_00_LATCH_ACQUIRE_INVALIDATE_TEXTURE_DATA_CACHE_FALSE 0x00000000 +#define NVCBC0_QMDV04_00_LATCH_ACQUIRE_INVALIDATE_TEXTURE_DATA_CACHE_TRUE 0x00000001 +#define NVCBC0_QMDV04_00_GRID_WIDTH_RESUME MW(1439:1408) +#define NVCBC0_QMDV04_00_GRID_HEIGHT_RESUME MW(1455:1440) +#define NVCBC0_QMDV04_00_GRID_DEPTH_RESUME MW(1471:1456) +#define NVCBC0_QMDV04_00_ARRIVE_AT_LATCH_ID MW(1503:1472) +#define NVCBC0_QMDV04_00_WAIT_ON_LATCH_ID MW(1535:1504) +#define NVCBC0_QMDV04_00_CONSTANT_BUFFER_ADDR_LOWER_SHIFTED6(i) MW((1567+(i)*64):(1536+(i)*64)) +#define NVCBC0_QMDV04_00_CONSTANT_BUFFER_ADDR_UPPER_SHIFTED6(i) MW((1586+(i)*64):(1568+(i)*64)) +#define NVCBC0_QMDV04_00_CONSTANT_BUFFER_SIZE_SHIFTED4(i) MW((1599+(i)*64):(1587+(i)*64)) +#define NVCBC0_QMDV04_00_CIRCULAR_QUEUE_ADDR_LOWER MW(2079:2048) +#define NVCBC0_QMDV04_00_CIRCULAR_QUEUE_ADDR_UPPER MW(2087:2080) +#define NVCBC0_QMDV04_00_CIRCULAR_QUEUE_ENTRY_SIZE MW(2127:2112) +#define NVCBC0_QMDV04_00_COALESCE_WAITING_PERIOD MW(2135:2128) +#define NVCBC0_QMDV04_00_QUEUE_ENTRIES_PER_CTA_LOG2 MW(2140:2136) +#define NVCBC0_QMDV04_00_GPC_CGA_WIDTH MW(2149:2144) +#define NVCBC0_QMDV04_00_GPC_CGA_HEIGHT MW(2157:2152) +#define NVCBC0_QMDV04_00_GPC_CGA_DEPTH MW(2165:2160) +#define NVCBC0_QMDV04_00_CGA_CTA_DISTRIBUTION_MODE MW(2207:2207) +#define NVCBC0_QMDV04_00_CGA_CTA_DISTRIBUTION_MODE_LOAD_BALANCING 0x00000000 +#define NVCBC0_QMDV04_00_CGA_CTA_DISTRIBUTION_MODE_MULTI_CAST 0x00000001 +#define NVCBC0_QMDV04_00_GPU_CGA_WIDTH MW(2223:2208) +#define NVCBC0_QMDV04_00_GPU_CGA_HEIGHT MW(2239:2224) +#define NVCBC0_QMDV04_00_GPU_CGA_DEPTH MW(2255:2240) +#define NVCBC0_QMDV04_00_DEBUG_ID_LOWER MW(2399:2368) +#define NVCBC0_QMDV04_00_DEBUG_ID_UPPER MW(2431:2400) +#define NVCBC0_QMDV04_00_TPC_DISABLE_MASK(i) MW((2463+(i)*32):(2432+(i)*32)) +#define NVCBC0_QMDV04_00_OUTER_PUT MW(3038:3008) +#define NVCBC0_QMDV04_00_OUTER_OVERFLOW MW(3039:3039) +#define NVCBC0_QMDV04_00_OUTER_GET MW(3070:3040) +#define NVCBC0_QMDV04_00_OUTER_STICKY_OVERFLOW MW(3071:3071) + + + +#endif // #ifndef __CLCBC0QMD_H__