mirror of
https://gitlab.freedesktop.org/mesa/mesa.git
synced 2026-05-07 15:48:36 +02:00
swr/rasterizer: Events are now grouped and enabled by knobs
All events are now grouped as follows: -Framework (i.e. ThreadStart) [always ON] -Api (i.e. SwrSync) [always ON] -Pipeline [default ON] -Shader [default ON] -SWTag [default OFF] -Memory [default OFF] Reviewed-by: Alok Hota <alok.hota@intel.com>
This commit is contained in:
Jan Zielinski
parent
982d99490f
commit
b55a93fdd4
15 changed files with 371 additions and 201 deletions
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@ -31,6 +31,7 @@
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#include "common/os.h"
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#include "archrast/archrast.h"
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#include "archrast/eventmanager.h"
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#include "gen_ar_event.hpp"
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#include "gen_ar_eventhandlerfile.hpp"
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namespace ArchRast
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@ -104,9 +105,9 @@ namespace ArchRast
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uint64_t tscMax;
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};
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struct AddressRangeComparator
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struct AddressRangeComparator
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{
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bool operator()(MemoryTrackerKey a, MemoryTrackerKey b) const
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bool operator()(MemoryTrackerKey a, MemoryTrackerKey b) const
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{
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return (a.address & a.mask) < (b.address & b.mask);
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}
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@ -260,7 +261,7 @@ namespace ArchRast
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// compute address mask for memory tracking
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mAddressMask = 0;
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uint64_t addressRangeBytes = 64;
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uint64_t addressRangeBytes = 4096;
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while (addressRangeBytes > 0)
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{
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mAddressMask = (mAddressMask << 1) | 1;
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@ -687,7 +688,7 @@ namespace ArchRast
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mMemoryStats.TrackMemoryAccess(trackAddr, mAddressMask, event.data.isRead, event.data.tsc, size);
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sizeTracked += size;
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trackAddr = nextAddr;
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}
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}
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}
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virtual void Handle(const MemoryStatsEndEvent& event)
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@ -695,13 +696,13 @@ namespace ArchRast
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MemoryStats::MemoryTrackerMap::iterator i = mMemoryStats.trackedMemory.begin();
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while (i != mMemoryStats.trackedMemory.end())
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{
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MemoryStatsEvent mse(event.data.drawId,
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i->first.address & mAddressMask,
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i->second.accessCountRead,
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i->second.accessCountWrite,
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i->second.totalSizeRead,
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i->second.totalSizeWrite,
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i->second.tscMin,
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MemoryStatsEvent mse(event.data.drawId,
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i->first.address & mAddressMask,
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i->second.accessCountRead,
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i->second.accessCountWrite,
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i->second.totalSizeRead,
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i->second.totalSizeWrite,
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i->second.tscMin,
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i->second.tscMax);
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EventHandlerFile::Handle(mse);
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i++;
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@ -812,10 +813,12 @@ namespace ArchRast
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// Dispatch event for this thread.
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void Dispatch(HANDLE hThreadContext, const Event& event)
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{
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EventManager* pManager = FromHandle(hThreadContext);
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SWR_ASSERT(pManager != nullptr);
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pManager->Dispatch(event);
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if (event.IsEnabled())
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{
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EventManager* pManager = reinterpret_cast<EventManager*>(hThreadContext);
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SWR_ASSERT(pManager != nullptr);
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pManager->Dispatch(event);
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}
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}
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// Flush for this thread.
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@ -44,5 +44,6 @@ namespace ArchRast
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// Dispatch event for this thread.
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void Dispatch(HANDLE hThreadContext, const Event& event);
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void FlushDraw(HANDLE hThreadContext, uint32_t drawId);
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}; // namespace ArchRast
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@ -29,15 +29,15 @@ enum AR_DRAW_TYPE
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IndexedInstancedSplit = 3
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};
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event ThreadStartApiEvent
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event Framework::ThreadStartApiEvent
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{
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};
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event ThreadStartWorkerEvent
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event Framework::ThreadStartWorkerEvent
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{
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};
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event DrawInfoEvent
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event SwrApi::DrawInfoEvent
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{
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uint32_t drawId;
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AR_DRAW_TYPE type;
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@ -55,7 +55,7 @@ event DrawInfoEvent
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uint32_t splitId; // Split draw count or id.
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};
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event DispatchEvent
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event SwrApi::DispatchEvent
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{
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uint32_t drawId;
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uint32_t threadGroupCountX;
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@ -63,37 +63,37 @@ event DispatchEvent
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uint32_t threadGroupCountZ;
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};
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event FrameEndEvent
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event SwrApi::FrameEndEvent
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{
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uint32_t frameId;
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uint32_t nextDrawId;
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};
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///@brief API Stat: Synchonization event.
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event SwrSyncEvent
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event SwrApi::SwrSyncEvent
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{
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uint32_t drawId;
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};
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///@brief API Stat: Invalidate hot tiles (i.e. tile cache)
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event SwrInvalidateTilesEvent
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event SwrApi::SwrInvalidateTilesEvent
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{
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uint32_t drawId;
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};
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///@brief API Stat: Invalidate and discard hot tiles within pixel region
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event SwrDiscardRectEvent
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event SwrApi::SwrDiscardRectEvent
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{
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uint32_t drawId;
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};
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///@brief API Stat: Flush tiles out to memory that is typically owned by driver (e.g. Flush RT cache)
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event SwrStoreTilesEvent
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event SwrApi::SwrStoreTilesEvent
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{
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uint32_t drawId;
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};
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event FrontendStatsEvent
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event Pipeline::FrontendStatsEvent
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{
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uint32_t drawId;
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uint64_t counter IaVertices;
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@ -115,7 +115,7 @@ event FrontendStatsEvent
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uint64_t counter SoNumPrimsWritten3;
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};
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event BackendStatsEvent
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event Pipeline::BackendStatsEvent
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{
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uint32_t drawId;
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uint64_t counter DepthPassCount;
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@ -124,56 +124,56 @@ event BackendStatsEvent
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};
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event EarlyZSingleSample
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event Pipeline::EarlyZSingleSample
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{
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uint32_t drawId;
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uint64_t counter passCount;
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uint64_t counter failCount;
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};
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event LateZSingleSample
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event Pipeline::LateZSingleSample
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{
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uint32_t drawId;
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uint64_t counter passCount;
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uint64_t counter failCount;
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};
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event EarlyStencilSingleSample
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event Pipeline::EarlyStencilSingleSample
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{
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uint32_t drawId;
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uint64_t counter passCount;
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uint64_t counter failCount;
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};
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event LateStencilSingleSample
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event Pipeline::LateStencilSingleSample
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{
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uint32_t drawId;
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uint64_t counter passCount;
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uint64_t counter failCount;
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};
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event EarlyZSampleRate
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event Pipeline::EarlyZSampleRate
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{
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uint32_t drawId;
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uint64_t counter passCount;
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uint64_t counter failCount;
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};
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event LateZSampleRate
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event Pipeline::LateZSampleRate
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{
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uint32_t drawId;
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uint64_t counter passCount;
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uint64_t counter failCount;
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};
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event EarlyStencilSampleRate
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event Pipeline::EarlyStencilSampleRate
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{
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uint32_t drawId;
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uint64_t counter passCount;
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uint64_t counter failCount;
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};
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event LateStencilSampleRate
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event Pipeline::LateStencilSampleRate
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{
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uint32_t drawId;
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uint64_t counter passCount;
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@ -181,7 +181,7 @@ event LateStencilSampleRate
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};
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// Total Early-Z counts, SingleSample and SampleRate
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event EarlyZ
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event Pipeline::EarlyZ
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{
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uint32_t drawId;
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uint64_t counter passCount;
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@ -189,7 +189,7 @@ event EarlyZ
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};
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// Total LateZ counts, SingleSample and SampleRate
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event LateZ
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event Pipeline::LateZ
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{
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uint32_t drawId;
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uint64_t counter passCount;
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@ -197,7 +197,7 @@ event LateZ
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};
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// Total EarlyStencil counts, SingleSample and SampleRate
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event EarlyStencil
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event Pipeline::EarlyStencil
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{
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uint32_t drawId;
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uint64_t counter passCount;
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@ -205,35 +205,35 @@ event EarlyStencil
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};
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// Total LateStencil counts, SingleSample and SampleRate
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event LateStencil
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event Pipeline::LateStencil
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{
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uint32_t drawId;
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uint64_t counter passCount;
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uint64_t counter failCount;
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};
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event EarlyZNullPS
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event Pipeline::EarlyZNullPS
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{
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uint32_t drawId;
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uint64_t counter passCount;
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uint64_t counter failCount;
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};
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event EarlyStencilNullPS
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event Pipeline::EarlyStencilNullPS
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{
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uint32_t drawId;
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uint64_t counter passCount;
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uint64_t counter failCount;
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};
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event EarlyZPixelRate
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event Pipeline::EarlyZPixelRate
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{
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uint32_t drawId;
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uint64_t counter passCount;
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uint64_t counter failCount;
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};
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event LateZPixelRate
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event Pipeline::LateZPixelRate
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{
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uint32_t drawId;
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uint64_t counter passCount;
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@ -241,65 +241,65 @@ event LateZPixelRate
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};
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event EarlyOmZ
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event Pipeline::EarlyOmZ
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{
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uint32_t drawId;
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uint64_t counter passCount;
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uint64_t counter failCount;
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};
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event EarlyOmStencil
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event Pipeline::EarlyOmStencil
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{
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uint32_t drawId;
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uint64_t counter passCount;
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uint64_t counter failCount;
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};
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event LateOmZ
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event Pipeline::LateOmZ
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{
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uint32_t drawId;
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uint64_t counter passCount;
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uint64_t counter failCount;
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};
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event LateOmStencil
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event Pipeline::LateOmStencil
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{
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uint32_t drawId;
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uint64_t counter passCount;
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uint64_t counter failCount;
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};
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event GSInputPrims
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event Pipeline::GSInputPrims
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{
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uint32_t drawId;
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uint64_t counter inputPrimCount;
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};
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event GSPrimsGen
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event Pipeline::GSPrimsGen
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{
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uint32_t drawId;
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uint64_t counter primGeneratedCount;
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};
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event GSVertsInput
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event Pipeline::GSVertsInput
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{
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uint32_t drawId;
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uint64_t counter vertsInput;
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};
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event TessPrims
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event Pipeline::TessPrims
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{
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uint32_t drawId;
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uint64_t counter primCount;
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};
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event RasterTiles
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event Pipeline::RasterTiles
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{
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uint32_t drawId;
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uint32_t counter rastTileCount;
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};
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event ClipperEvent
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event Pipeline::ClipperEvent
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{
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uint32_t drawId;
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uint32_t counter trivialRejectCount;
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@ -307,21 +307,21 @@ event ClipperEvent
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uint32_t counter mustClipCount;
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};
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event CullEvent
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event Pipeline::CullEvent
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{
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uint32_t drawId;
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uint64_t counter backfacePrimCount;
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uint64_t counter degeneratePrimCount;
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};
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event AlphaEvent
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event Pipeline::AlphaEvent
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{
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uint32_t drawId;
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uint32_t counter alphaTestCount;
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uint32_t counter alphaBlendCount;
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};
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event VSInfo
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event Shader::VSInfo
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{
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uint32_t drawId;
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uint32_t counter numInstExecuted;
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@ -338,7 +338,7 @@ event VSInfo
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uint32_t counter numLodExecuted;
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};
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event HSInfo
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event Shader::HSInfo
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{
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uint32_t drawId;
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uint32_t counter numInstExecuted;
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@ -355,7 +355,7 @@ event HSInfo
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uint32_t counter numLodExecuted;
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};
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event DSInfo
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event Shader::DSInfo
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{
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uint32_t drawId;
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uint32_t counter numInstExecuted;
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@ -372,7 +372,7 @@ event DSInfo
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uint32_t counter numLodExecuted;
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};
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event GSInfo
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event Shader::GSInfo
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{
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uint32_t drawId;
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uint32_t counter numInstExecuted;
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@ -390,7 +390,7 @@ event GSInfo
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};
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event PSInfo
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event Shader::PSInfo
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{
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uint32_t drawId;
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uint32_t counter numInstExecuted;
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@ -407,7 +407,7 @@ event PSInfo
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uint32_t counter numLodExecuted;
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};
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event CSInfo
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event Shader::CSInfo
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{
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uint32_t drawId;
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uint32_t counter numInstExecuted;
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@ -424,64 +424,62 @@ event CSInfo
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uint32_t counter numLodExecuted;
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};
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event SWTagFrameEvent
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event SWTagApi::SWTagEndFrameEvent
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{
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uint64_t swTagFrame;
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uint64_t frameCount;
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uint32_t renderpassCount;
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uint32_t drawOrDispatchCount;
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uint32_t drawCount;
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uint32_t dispatchCount;
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};
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event SWTagRenderpassEvent
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event SWTagApi::SWTagRenderpassEvent
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{
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uint64_t swTagFrame;
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uint32_t swTagDrawOrDispatch;
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uint32_t swTagDraw;
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uint32_t swTagDispatch;
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uint32_t swTagRenderpassCount;
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uint64_t frameCount;
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uint32_t renderpassCount;
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uint32_t drawOrDispatchCount;
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uint32_t drawCount;
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uint32_t dispatchCount;
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};
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event SWTagDrawEvent
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event SWTagApi::SWTagDrawEvent
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{
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uint64_t swTagFrame;
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uint32_t swTagDrawOrDispatch;
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uint32_t swTagDraw;
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uint32_t swTagDispatch;
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uint64_t frameCount;
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uint32_t renderpassCount;
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uint32_t drawOrDispatchCount;
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uint32_t drawCount;
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uint32_t dispatchCount;
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};
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event SWTagDispatchEvent
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event SWTagApi::SWTagDispatchEvent
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{
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uint64_t swTagFrame;
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uint32_t swTagDrawOrDispatch;
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uint32_t swTagDraw;
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uint32_t swTagDispatch;
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uint64_t frameCount;
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uint32_t renderpassCount;
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uint32_t drawOrDispatchCount;
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uint32_t drawCount;
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uint32_t dispatchCount;
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};
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event SWTagFlushEvent
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event SWTagApi::SWTagDriverCallEvent
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{
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uint64_t swTagFrame;
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uint32_t swTagDrawOrDispatch;
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uint32_t swTagDraw;
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uint32_t swTagDispatch;
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uint32_t swTagFlushCounter;
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char swTagFlushReason[256];
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uint32_t swTagFlushType;
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char cmd[256];
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};
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event SWTagApiCallEvent
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event SWTag::SWTagFlushEvent
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{
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uint64_t swTagFrame;
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uint32_t swTagDrawOrDispatch;
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uint32_t swTagDraw;
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uint32_t swTagDispatch;
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char swTagApiCall[256];
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uint32_t count;
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char reason[256];
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uint32_t type;
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};
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event MemoryStatsEvent
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event Memory::MemoryStatsEvent
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{
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uint32_t drawId;
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uint64_t baseAddr;
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uint32_t accessCountRead;
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uint32_t accessCountWrite;
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uint32_t totalSizeRead;
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uint32_t totalSizeWrite;
|
||||
uint32_t totalSizeRead;
|
||||
uint32_t totalSizeWrite;
|
||||
uint64_t tscMin;
|
||||
uint64_t tscMax;
|
||||
};
|
||||
|
|
|
|||
|
|
@ -24,73 +24,73 @@
|
|||
# ArchRast is to not pollute the Rasty code with lots of calculations, etc. that
|
||||
# are needed to compute per draw statistics, etc.
|
||||
|
||||
event EarlyDepthStencilInfoSingleSample
|
||||
event Pipeline::EarlyDepthStencilInfoSingleSample
|
||||
{
|
||||
uint64_t depthPassMask;
|
||||
uint64_t stencilPassMask;
|
||||
uint64_t coverageMask;
|
||||
};
|
||||
|
||||
event EarlyDepthStencilInfoSampleRate
|
||||
event Pipeline::EarlyDepthStencilInfoSampleRate
|
||||
{
|
||||
uint64_t depthPassMask;
|
||||
uint64_t stencilPassMask;
|
||||
uint64_t coverageMask;
|
||||
};
|
||||
|
||||
event EarlyDepthStencilInfoNullPS
|
||||
event Pipeline::EarlyDepthStencilInfoNullPS
|
||||
{
|
||||
uint64_t depthPassMask;
|
||||
uint64_t stencilPassMask;
|
||||
uint64_t coverageMask;
|
||||
};
|
||||
|
||||
event LateDepthStencilInfoSingleSample
|
||||
event Pipeline::LateDepthStencilInfoSingleSample
|
||||
{
|
||||
uint64_t depthPassMask;
|
||||
uint64_t stencilPassMask;
|
||||
uint64_t coverageMask;
|
||||
};
|
||||
|
||||
event LateDepthStencilInfoSampleRate
|
||||
event Pipeline::LateDepthStencilInfoSampleRate
|
||||
{
|
||||
uint64_t depthPassMask;
|
||||
uint64_t stencilPassMask;
|
||||
uint64_t coverageMask;
|
||||
};
|
||||
|
||||
event LateDepthStencilInfoNullPS
|
||||
event Pipeline::LateDepthStencilInfoNullPS
|
||||
{
|
||||
uint64_t depthPassMask;
|
||||
uint64_t stencilPassMask;
|
||||
uint64_t coverageMask;
|
||||
};
|
||||
|
||||
event EarlyDepthInfoPixelRate
|
||||
event Pipeline::EarlyDepthInfoPixelRate
|
||||
{
|
||||
uint64_t depthPassCount;
|
||||
uint64_t activeLanes;
|
||||
};
|
||||
|
||||
|
||||
event LateDepthInfoPixelRate
|
||||
event Pipeline::LateDepthInfoPixelRate
|
||||
{
|
||||
uint64_t depthPassCount;
|
||||
uint64_t activeLanes;
|
||||
};
|
||||
|
||||
|
||||
event BackendDrawEndEvent
|
||||
event Pipeline::BackendDrawEndEvent
|
||||
{
|
||||
uint32_t drawId;
|
||||
};
|
||||
|
||||
event FrontendDrawEndEvent
|
||||
event Pipeline::FrontendDrawEndEvent
|
||||
{
|
||||
uint32_t drawId;
|
||||
};
|
||||
|
||||
event MemoryAccessEvent
|
||||
event Memory::MemoryAccessEvent
|
||||
{
|
||||
uint32_t drawId;
|
||||
uint64_t tsc;
|
||||
|
|
@ -100,23 +100,23 @@ event MemoryAccessEvent
|
|||
uint8_t client;
|
||||
};
|
||||
|
||||
event MemoryStatsEndEvent
|
||||
event Memory::MemoryStatsEndEvent
|
||||
{
|
||||
uint32_t drawId;
|
||||
};
|
||||
|
||||
event TessPrimCount
|
||||
event Pipeline::TessPrimCount
|
||||
{
|
||||
uint64_t primCount;
|
||||
};
|
||||
|
||||
event RasterTileCount
|
||||
event Pipeline::RasterTileCount
|
||||
{
|
||||
uint32_t drawId;
|
||||
uint64_t rasterTiles;
|
||||
};
|
||||
|
||||
event GSPrimInfo
|
||||
event Pipeline::GSPrimInfo
|
||||
{
|
||||
uint64_t inputPrimCount;
|
||||
uint64_t primGeneratedCount;
|
||||
|
|
@ -128,14 +128,14 @@ event GSPrimInfo
|
|||
// Trivial reject is numInvocations - pop_cnt32(validMask)
|
||||
// Trivial accept is validMask & ~clipMask
|
||||
// Must clip count is pop_cnt32(clipMask)
|
||||
event ClipInfoEvent
|
||||
event Pipeline::ClipInfoEvent
|
||||
{
|
||||
uint32_t numInvocations;
|
||||
uint32_t validMask;
|
||||
uint32_t clipMask;
|
||||
};
|
||||
|
||||
event CullInfoEvent
|
||||
event Pipeline::CullInfoEvent
|
||||
{
|
||||
uint32_t drawId;
|
||||
uint64_t degeneratePrimMask;
|
||||
|
|
@ -143,14 +143,14 @@ event CullInfoEvent
|
|||
uint32_t validMask;
|
||||
};
|
||||
|
||||
event AlphaInfoEvent
|
||||
event Pipeline::AlphaInfoEvent
|
||||
{
|
||||
uint32_t drawId;
|
||||
uint32_t alphaTestEnable;
|
||||
uint32_t alphaBlendEnable;
|
||||
};
|
||||
|
||||
event DrawInstancedEvent
|
||||
event SwrApi::DrawInstancedEvent
|
||||
{
|
||||
uint32_t drawId;
|
||||
uint32_t topology;
|
||||
|
|
@ -165,7 +165,7 @@ event DrawInstancedEvent
|
|||
uint32_t splitId; // Split draw count or id.
|
||||
};
|
||||
|
||||
event DrawIndexedInstancedEvent
|
||||
event SwrApi::DrawIndexedInstancedEvent
|
||||
{
|
||||
uint32_t drawId;
|
||||
uint32_t topology;
|
||||
|
|
@ -181,32 +181,32 @@ event DrawIndexedInstancedEvent
|
|||
uint32_t splitId; // Split draw count or id.
|
||||
};
|
||||
|
||||
event VSStats
|
||||
event Shader::VSStats
|
||||
{
|
||||
HANDLE hStats; // SWR_SHADER_STATS
|
||||
};
|
||||
|
||||
event HSStats
|
||||
event Shader::HSStats
|
||||
{
|
||||
HANDLE hStats; // SWR_SHADER_STATS
|
||||
};
|
||||
|
||||
event DSStats
|
||||
event Shader::DSStats
|
||||
{
|
||||
HANDLE hStats; // SWR_SHADER_STATS
|
||||
};
|
||||
|
||||
event GSStats
|
||||
event Shader::GSStats
|
||||
{
|
||||
HANDLE hStats; // SWR_SHADER_STATS
|
||||
};
|
||||
|
||||
event PSStats
|
||||
event Shader::PSStats
|
||||
{
|
||||
HANDLE hStats; // SWR_SHADER_STATS
|
||||
};
|
||||
|
||||
event CSStats
|
||||
event Shader::CSStats
|
||||
{
|
||||
HANDLE hStats; // SWR_SHADER_STATS
|
||||
};
|
||||
|
|
@ -87,14 +87,20 @@ def parse_protos(files, verbose=False):
|
|||
"""
|
||||
Parses a proto file and returns a dictionary of event definitions
|
||||
"""
|
||||
protos = {}
|
||||
protos['events'] = {} # event dictionary containing events with their fields
|
||||
protos['event_names'] = [] # needed to keep events in order parsed. dict is not ordered.
|
||||
protos['event_map'] = {} # dictionary to map event ids to event names
|
||||
protos['enums'] = {}
|
||||
protos['enum_names'] = []
|
||||
protos = {
|
||||
'events': {
|
||||
'defs': {}, # event dictionary containing events with their fields
|
||||
'map': {}, # dictionary to map event ids to event names
|
||||
'groups': {} # event keys stored by groups
|
||||
},
|
||||
'enums': {
|
||||
'defs': {},
|
||||
'map': {}
|
||||
}
|
||||
}
|
||||
|
||||
eventId = 0
|
||||
event_id = 0
|
||||
enum_id = 0
|
||||
|
||||
if type(files) is not list:
|
||||
files = [files]
|
||||
|
|
@ -104,40 +110,74 @@ def parse_protos(files, verbose=False):
|
|||
print("Parsing proto file: %s" % os.path.normpath(filename))
|
||||
|
||||
with open(filename, 'r') as f:
|
||||
lines=f.readlines()
|
||||
lines = f.readlines()
|
||||
|
||||
idx = 0
|
||||
|
||||
raw_text = []
|
||||
while idx < len(lines):
|
||||
line = lines[idx].rstrip()
|
||||
line = lines[idx].strip()
|
||||
idx += 1
|
||||
|
||||
# search for event definitions.
|
||||
match = re.match(r'(\s*)event(\s*)(\w+)', line)
|
||||
|
||||
# Match event definition
|
||||
match = re.match(r'event(\s*)(((\w*)::){0,1}(\w+))', line) # i.e. "event SWTag::CounterEvent"
|
||||
if match:
|
||||
eventId += 1
|
||||
event_name = match.group(3)
|
||||
protos["event_names"].append(event_name)
|
||||
event_id += 1
|
||||
|
||||
protos["events"][event_name] = {}
|
||||
protos["events"][event_name]["event_id"] = eventId
|
||||
protos["event_map"][eventId] = event_name
|
||||
idx = parse_event_fields(lines, idx, protos["events"][event_name])
|
||||
# Parse event attributes
|
||||
event_key = match.group(2) # i.e. SWTag::CounterEvent
|
||||
event_group = match.group(4) if match.group(4) else "" # i.e. SWTag
|
||||
event_name = match.group(5) # i.e. CounterEvent
|
||||
|
||||
# search for enums.
|
||||
match = re.match(r'(\s*)enum(\s*)(\w+)', line)
|
||||
# Define event attributes
|
||||
event = {
|
||||
'id': event_id,
|
||||
'group': event_group,
|
||||
'name': event_name
|
||||
}
|
||||
|
||||
# Now add event fields
|
||||
idx = parse_event_fields(lines, idx, event)
|
||||
|
||||
protos['events']['defs'][event_key] = event
|
||||
protos['events']['map'][event_id] = event_key
|
||||
|
||||
continue
|
||||
|
||||
# Match enum definition
|
||||
match = re.match(r'enum(\s*)(\w+)', line)
|
||||
if match:
|
||||
enum_name = match.group(3)
|
||||
protos["enum_names"].append(enum_name)
|
||||
enum_id += 1
|
||||
|
||||
# Parse enum attributes
|
||||
enum_name = match.group(2)
|
||||
|
||||
# Define enum attr
|
||||
enum = {
|
||||
'name': enum_name
|
||||
}
|
||||
|
||||
# Now add enum fields
|
||||
idx = parse_enums(lines, idx, enum)
|
||||
|
||||
protos['enums']['defs'][enum_name] = enum
|
||||
protos['enums']['map'][enum_id] = enum_name
|
||||
|
||||
continue
|
||||
|
||||
# Sort and group events
|
||||
event_groups = protos['events']['groups']
|
||||
for key in sorted(protos['events']['defs']):
|
||||
group = protos['events']['defs'][key]['group']
|
||||
if group not in event_groups:
|
||||
event_groups[group] = []
|
||||
event_groups[group].append(key)
|
||||
|
||||
protos["enums"][enum_name] = {}
|
||||
idx = parse_enums(lines, idx, protos["enums"][enum_name])
|
||||
return protos
|
||||
|
||||
|
||||
def get_sorted_protos(protos):
|
||||
protos["groups"]
|
||||
|
||||
|
||||
def main():
|
||||
|
||||
# Parse args...
|
||||
|
|
|
|||
|
|
@ -304,7 +304,7 @@ KNOBS = [
|
|||
'NOTE: Requires KNOB_ENABLE_TOSS_POINTS to be enabled in core/knobs.h'],
|
||||
'category' : 'perf_adv',
|
||||
}],
|
||||
|
||||
|
||||
['DISABLE_SPLIT_DRAW', {
|
||||
'type' : 'bool',
|
||||
'default' : 'false',
|
||||
|
|
@ -315,4 +315,41 @@ KNOBS = [
|
|||
'category' : 'perf_adv',
|
||||
}],
|
||||
|
||||
['AR_ENABLE_PIPELINE_EVENTS', {
|
||||
'type' : 'bool',
|
||||
'default' : 'true',
|
||||
'desc' : ['Enable pipeline events when using Archrast'],
|
||||
'category' : 'archrast',
|
||||
}],
|
||||
|
||||
['AR_ENABLE_SHADER_EVENTS', {
|
||||
'type' : 'bool',
|
||||
'default' : 'true',
|
||||
'desc' : ['Enable shader events when using Archrast'],
|
||||
'category' : 'archrast',
|
||||
}],
|
||||
|
||||
['AR_ENABLE_SWTAG_EVENTS', {
|
||||
'type' : 'bool',
|
||||
'default' : 'false',
|
||||
'desc' : ['Enable SWTag events when using Archrast'],
|
||||
'category' : 'archrast',
|
||||
}],
|
||||
|
||||
['AR_ENABLE_MEMORY_EVENTS', {
|
||||
'type' : 'bool',
|
||||
'default' : 'false',
|
||||
'desc' : ['Enable memory events when using Archrast'],
|
||||
'category' : 'archrast',
|
||||
}],
|
||||
|
||||
['AR_MEM_SET_BYTE_GRANULARITY', {
|
||||
'type' : 'uint32_t',
|
||||
'default' : '64',
|
||||
'desc' : ['Granularity and alignment of tracking of memory accesses',
|
||||
'ONLY ACTIVE UNDER ArchRast.'],
|
||||
'category' : 'archrast',
|
||||
}],
|
||||
|
||||
|
||||
]
|
||||
|
|
|
|||
|
|
@ -36,12 +36,20 @@
|
|||
#include "gen_ar_eventhandler.hpp"
|
||||
|
||||
using namespace ArchRast;
|
||||
% for name in protos['event_names']:
|
||||
|
||||
void ${name}::Accept(EventHandler* pHandler) const
|
||||
<% sorted_groups = sorted(protos['events']['groups']) %>
|
||||
% for group in sorted_groups:
|
||||
% for event_key in protos['events']['groups'][group]:
|
||||
<%
|
||||
event = protos['events']['defs'][event_key]
|
||||
%>
|
||||
void ${event['name']}::Accept(EventHandler* pHandler) const
|
||||
{
|
||||
pHandler->Handle(*this);
|
||||
}
|
||||
% endfor
|
||||
% endfor
|
||||
% endfor
|
||||
|
||||
|
||||
// clan-format on
|
||||
|
||||
|
|
|
|||
|
|
@ -36,11 +36,13 @@
|
|||
#include "common/os.h"
|
||||
#include "core/state.h"
|
||||
|
||||
<% always_enabled_knob_groups = ['', 'Framework', 'SWTagApi', 'SwrApi'] %>
|
||||
namespace ArchRast
|
||||
{
|
||||
% for name in protos['enum_names']:
|
||||
<% sorted_enums = sorted(protos['enums']['defs']) %>
|
||||
% for name in sorted_enums:
|
||||
enum ${name}
|
||||
{<% names = protos['enums'][name]['names'] %>
|
||||
{<% names = protos['enums']['defs'][name]['names'] %>
|
||||
% for i in range(len(names)):
|
||||
${names[i].lstrip()}
|
||||
% endfor
|
||||
|
|
@ -58,17 +60,23 @@ namespace ArchRast
|
|||
Event() {}
|
||||
virtual ~Event() {}
|
||||
|
||||
virtual bool IsEnabled() const { return true; };
|
||||
virtual void Accept(EventHandler* pHandler) const = 0;
|
||||
};
|
||||
% for name in protos['event_names']:
|
||||
|
||||
<% sorted_groups = sorted(protos['events']['groups']) %>
|
||||
% for group in sorted_groups:
|
||||
% for event_key in protos['events']['groups'][group]:
|
||||
<%
|
||||
event = protos['events']['defs'][event_key]
|
||||
%>
|
||||
//////////////////////////////////////////////////////////////////////////
|
||||
/// ${name}Data
|
||||
/// ${event_key}Data
|
||||
//////////////////////////////////////////////////////////////////////////
|
||||
#pragma pack(push, 1)
|
||||
struct ${name}Data
|
||||
struct ${event['name']}Data
|
||||
{<%
|
||||
fields = protos['events'][name]['fields'] %>
|
||||
fields = event['fields'] %>
|
||||
// Fields
|
||||
% for i in range(len(fields)):
|
||||
% if fields[i]['size'] > 1:
|
||||
|
|
@ -81,15 +89,15 @@ namespace ArchRast
|
|||
#pragma pack(pop)
|
||||
|
||||
//////////////////////////////////////////////////////////////////////////
|
||||
/// ${name}
|
||||
/// ${event_key}
|
||||
//////////////////////////////////////////////////////////////////////////
|
||||
struct ${name} : Event
|
||||
struct ${event['name']} : Event
|
||||
{<%
|
||||
fields = protos['events'][name]['fields'] %>
|
||||
${name}Data data;
|
||||
fields = event['fields'] %>
|
||||
${event['name']}Data data;
|
||||
|
||||
// Constructor
|
||||
${name}(
|
||||
${event['name']}(
|
||||
% for i in range(len(fields)):
|
||||
% if i < len(fields)-1:
|
||||
% if fields[i]['size'] > 1:
|
||||
|
|
@ -127,7 +135,18 @@ namespace ArchRast
|
|||
}
|
||||
|
||||
virtual void Accept(EventHandler* pHandler) const;
|
||||
% if group not in always_enabled_knob_groups:
|
||||
<% group_knob_define = 'KNOB_AR_ENABLE_' + group.upper() + '_EVENTS' %>
|
||||
bool IsEnabled() const
|
||||
{
|
||||
static const bool IsEventEnabled = true; // TODO: Replace with knob for each event
|
||||
return ${group_knob_define} && IsEventEnabled;
|
||||
}
|
||||
% endif
|
||||
};
|
||||
|
||||
% endfor
|
||||
|
||||
% endfor
|
||||
} // namespace ArchRast
|
||||
// clang-format on
|
||||
|
|
|
|||
|
|
@ -48,9 +48,14 @@ namespace ArchRast
|
|||
|
||||
virtual void FlushDraw(uint32_t drawId) {}
|
||||
|
||||
% for name in protos['event_names']:
|
||||
virtual void Handle(const ${name}& event) {}
|
||||
% endfor
|
||||
<% sorted_groups = sorted(protos['events']['groups']) %>
|
||||
% for group in sorted_groups:
|
||||
% for event_key in protos['events']['groups'][group]:
|
||||
<%
|
||||
event = protos['events']['defs'][event_key]
|
||||
%> virtual void Handle(const ${event['name']}& event) {}
|
||||
% endfor
|
||||
% endfor
|
||||
};
|
||||
} // namespace ArchRast
|
||||
// clan-format off
|
||||
|
|
|
|||
|
|
@ -136,19 +136,24 @@ namespace ArchRast
|
|||
memcpy(&mBuffer[mBufOffset], pBlock, size);
|
||||
mBufOffset += size;
|
||||
}
|
||||
|
||||
% for name in protos['event_names']:
|
||||
<% sorted_groups = sorted(protos['events']['groups']) %>
|
||||
% for group in sorted_groups:
|
||||
% for event_key in protos['events']['groups'][group]:
|
||||
<%
|
||||
event = protos['events']['defs'][event_key]
|
||||
%>
|
||||
//////////////////////////////////////////////////////////////////////////
|
||||
/// @brief Handle ${name} event
|
||||
virtual void Handle(const ${name}& event)
|
||||
/// @brief Handle ${event_key} event
|
||||
virtual void Handle(const ${event['name']}& event)
|
||||
{
|
||||
% if protos['events'][name]['num_fields'] == 0:
|
||||
Write(${protos['events'][name]['event_id']}, (char*)&event.data, 0);
|
||||
% if event['num_fields'] == 0:
|
||||
Write(${event['id']}, (char*)&event.data, 0);
|
||||
% else:
|
||||
Write(${protos['events'][name]['event_id']}, (char*)&event.data, sizeof(event.data));
|
||||
%endif
|
||||
Write(${event['id']}, (char*)&event.data, sizeof(event.data));
|
||||
% endif
|
||||
}
|
||||
% endfor
|
||||
% endfor
|
||||
% endfor
|
||||
|
||||
//////////////////////////////////////////////////////////////////////////
|
||||
/// @brief Everything written to buffer this point is the header.
|
||||
|
|
|
|||
|
|
@ -1212,7 +1212,7 @@ void DrawInstanced(HANDLE hContext,
|
|||
uint32_t numVertsForDraw =
|
||||
(remainingVerts < maxVertsPerDraw) ? remainingVerts : maxVertsPerDraw;
|
||||
|
||||
bool isSplitDraw = (draw > 0) ? true : false;
|
||||
bool isSplitDraw = (draw > 0) ? !KNOB_DISABLE_SPLIT_DRAW : false;
|
||||
DRAW_CONTEXT* pDC = GetDrawContext(pContext, isSplitDraw);
|
||||
InitDraw(pDC, isSplitDraw);
|
||||
|
||||
|
|
@ -1366,7 +1366,7 @@ void DrawIndexedInstance(HANDLE hContext,
|
|||
(remainingIndices < maxIndicesPerDraw) ? remainingIndices : maxIndicesPerDraw;
|
||||
|
||||
// When breaking up draw, we need to obtain new draw context for each iteration.
|
||||
bool isSplitDraw = (draw > 0) ? true : false;
|
||||
bool isSplitDraw = (draw > 0) ? !KNOB_DISABLE_SPLIT_DRAW : false;
|
||||
|
||||
pDC = GetDrawContext(pContext, isSplitDraw);
|
||||
InitDraw(pDC, isSplitDraw);
|
||||
|
|
|
|||
|
|
@ -44,6 +44,7 @@ namespace SwrJit
|
|||
mpfnTrackMemAccess = nullptr;
|
||||
mpParamSimDC = nullptr;
|
||||
mpWorkerData = nullptr;
|
||||
|
||||
}
|
||||
|
||||
void BuilderGfxMem::NotifyPrivateContextSet()
|
||||
|
|
@ -96,6 +97,7 @@ namespace SwrJit
|
|||
uint8_t scale,
|
||||
MEM_CLIENT usage)
|
||||
{
|
||||
|
||||
// address may be coming in as 64bit int now so get the pointer
|
||||
if (pBase->getType() == mInt64Ty)
|
||||
{
|
||||
|
|
@ -109,6 +111,7 @@ namespace SwrJit
|
|||
void BuilderGfxMem::SCATTERPS(
|
||||
Value* pDst, Value* vSrc, Value* vOffsets, Value* vMask, MEM_CLIENT usage)
|
||||
{
|
||||
|
||||
// address may be coming in as 64bit int now so get the pointer
|
||||
if (pDst->getType() == mInt64Ty)
|
||||
{
|
||||
|
|
@ -123,32 +126,83 @@ namespace SwrJit
|
|||
return ADD(base, offset);
|
||||
}
|
||||
|
||||
Value* BuilderGfxMem::GEP(Value* Ptr, Value* Idx, Type* Ty, const Twine& Name)
|
||||
Value* BuilderGfxMem::GEP(Value* Ptr, Value* Idx, Type* Ty, bool isReadOnly, const Twine& Name)
|
||||
{
|
||||
Ptr = TranslationHelper(Ptr, Ty);
|
||||
return Builder::GEP(Ptr, Idx, nullptr, Name);
|
||||
bool xlate = (Ptr->getType() == mInt64Ty);
|
||||
if (xlate)
|
||||
{
|
||||
Ptr = INT_TO_PTR(Ptr, Ty);
|
||||
Ptr = Builder::GEP(Ptr, Idx, nullptr, isReadOnly, Name);
|
||||
Ptr = PTR_TO_INT(Ptr, mInt64Ty);
|
||||
if (isReadOnly)
|
||||
{
|
||||
Ptr = TranslationHelper(Ptr, Ty, mpfnTranslateGfxAddressForRead);
|
||||
}
|
||||
else
|
||||
{
|
||||
Ptr = TranslationHelper(Ptr, Ty, mpfnTranslateGfxAddressForWrite);
|
||||
}
|
||||
}
|
||||
else
|
||||
{
|
||||
Ptr = Builder::GEP(Ptr, Idx, nullptr, isReadOnly, Name);
|
||||
}
|
||||
return Ptr;
|
||||
}
|
||||
|
||||
Value* BuilderGfxMem::GEP(Type* Ty, Value* Ptr, Value* Idx, const Twine& Name)
|
||||
{
|
||||
Ptr = TranslationHelper(Ptr, Ty);
|
||||
return Builder::GEP(Ty, Ptr, Idx, Name);
|
||||
bool xlate = (Ptr->getType() == mInt64Ty);
|
||||
if (xlate)
|
||||
{
|
||||
Ptr = INT_TO_PTR(Ptr, Ty);
|
||||
Ptr = Builder::GEP(Ty, Ptr, Idx, Name);
|
||||
Ptr = PTR_TO_INT(Ptr, mInt64Ty);
|
||||
Ptr = TranslationHelper(Ptr, Ty, mpfnTranslateGfxAddressForRead);
|
||||
}
|
||||
else
|
||||
{
|
||||
Ptr = Builder::GEP(Ty, Ptr, Idx, Name);
|
||||
}
|
||||
return Ptr;
|
||||
}
|
||||
|
||||
Value* BuilderGfxMem::GEP(Value* Ptr, const std::initializer_list<Value*>& indexList, Type* Ty)
|
||||
{
|
||||
Ptr = TranslationHelper(Ptr, Ty);
|
||||
return Builder::GEP(Ptr, indexList);
|
||||
bool xlate = (Ptr->getType() == mInt64Ty);
|
||||
if (xlate)
|
||||
{
|
||||
Ptr = INT_TO_PTR(Ptr, Ty);
|
||||
Ptr = Builder::GEP(Ptr, indexList);
|
||||
Ptr = PTR_TO_INT(Ptr, mInt64Ty);
|
||||
Ptr = TranslationHelper(Ptr, Ty, mpfnTranslateGfxAddressForRead);
|
||||
}
|
||||
else
|
||||
{
|
||||
Ptr = Builder::GEP(Ptr, indexList);
|
||||
}
|
||||
return Ptr;
|
||||
}
|
||||
|
||||
Value*
|
||||
BuilderGfxMem::GEP(Value* Ptr, const std::initializer_list<uint32_t>& indexList, Type* Ty)
|
||||
{
|
||||
Ptr = TranslationHelper(Ptr, Ty);
|
||||
return Builder::GEP(Ptr, indexList);
|
||||
bool xlate = (Ptr->getType() == mInt64Ty);
|
||||
if (xlate)
|
||||
{
|
||||
Ptr = INT_TO_PTR(Ptr, Ty);
|
||||
Ptr = Builder::GEP(Ptr, indexList);
|
||||
Ptr = PTR_TO_INT(Ptr, mInt64Ty);
|
||||
Ptr = TranslationHelper(Ptr, Ty, mpfnTranslateGfxAddressForRead);
|
||||
}
|
||||
else
|
||||
{
|
||||
Ptr = Builder::GEP(Ptr, indexList);
|
||||
}
|
||||
return Ptr;
|
||||
}
|
||||
|
||||
Value* BuilderGfxMem::TranslationHelper(Value* Ptr, Type* Ty)
|
||||
Value* BuilderGfxMem::TranslationHelper(Value* Ptr, Type* Ty, Value* pfnTranslateGfxAddress)
|
||||
{
|
||||
SWR_ASSERT(!(Ptr->getType() == mInt64Ty && Ty == nullptr),
|
||||
"Access of GFX pointers must have non-null type specified.");
|
||||
|
|
@ -165,7 +219,7 @@ namespace SwrJit
|
|||
void BuilderGfxMem::TrackerHelper(Value* Ptr, Type* Ty, MEM_CLIENT usage, bool isRead)
|
||||
{
|
||||
#if defined(KNOB_ENABLE_AR)
|
||||
if (!KNOB_TRACK_MEMORY_WORKING_SET)
|
||||
if (!KNOB_AR_ENABLE_MEMORY_EVENTS)
|
||||
{
|
||||
return;
|
||||
}
|
||||
|
|
@ -214,7 +268,7 @@ namespace SwrJit
|
|||
AssertGFXMemoryParams(Ptr, usage);
|
||||
TrackerHelper(Ptr, Ty, usage, true);
|
||||
|
||||
Ptr = TranslationHelper(Ptr, Ty);
|
||||
Ptr = TranslationHelper(Ptr, Ty, mpfnTranslateGfxAddressForRead);
|
||||
return Builder::LOAD(Ptr, Name);
|
||||
}
|
||||
|
||||
|
|
@ -223,7 +277,7 @@ namespace SwrJit
|
|||
AssertGFXMemoryParams(Ptr, usage);
|
||||
TrackerHelper(Ptr, Ty, usage, true);
|
||||
|
||||
Ptr = TranslationHelper(Ptr, Ty);
|
||||
Ptr = TranslationHelper(Ptr, Ty, mpfnTranslateGfxAddressForRead);
|
||||
return Builder::LOAD(Ptr, Name);
|
||||
}
|
||||
|
||||
|
|
@ -233,7 +287,7 @@ namespace SwrJit
|
|||
AssertGFXMemoryParams(Ptr, usage);
|
||||
TrackerHelper(Ptr, Ty, usage, true);
|
||||
|
||||
Ptr = TranslationHelper(Ptr, Ty);
|
||||
Ptr = TranslationHelper(Ptr, Ty, mpfnTranslateGfxAddressForRead);
|
||||
return Builder::LOAD(Ptr, isVolatile, Name);
|
||||
}
|
||||
|
||||
|
|
@ -277,7 +331,7 @@ namespace SwrJit
|
|||
AssertGFXMemoryParams(Ptr, usage);
|
||||
TrackerHelper(Ptr, Ty, usage, true);
|
||||
|
||||
Ptr = TranslationHelper(Ptr, Ty);
|
||||
Ptr = TranslationHelper(Ptr, Ty, mpfnTranslateGfxAddressForRead);
|
||||
return Builder::MASKED_LOAD(Ptr, Align, Mask, PassThru, Name, Ty, usage);
|
||||
}
|
||||
|
||||
|
|
@ -287,7 +341,7 @@ namespace SwrJit
|
|||
AssertGFXMemoryParams(Ptr, usage);
|
||||
TrackerHelper(Ptr, Ty, usage, false);
|
||||
|
||||
Ptr = TranslationHelper(Ptr, Ty);
|
||||
Ptr = TranslationHelper(Ptr, Ty, mpfnTranslateGfxAddressForRead);
|
||||
return Builder::STORE(Val, Ptr, isVolatile, Ty, usage);
|
||||
}
|
||||
|
||||
|
|
@ -300,7 +354,7 @@ namespace SwrJit
|
|||
AssertGFXMemoryParams(BasePtr, usage);
|
||||
TrackerHelper(BasePtr, Ty, usage, false);
|
||||
|
||||
BasePtr = TranslationHelper(BasePtr, Ty);
|
||||
BasePtr = TranslationHelper(BasePtr, Ty, mpfnTranslateGfxAddressForRead);
|
||||
return Builder::STORE(Val, BasePtr, offset, Ty, usage);
|
||||
}
|
||||
|
||||
|
|
@ -311,7 +365,7 @@ namespace SwrJit
|
|||
|
||||
TrackerHelper(Ptr, Ty, usage, false);
|
||||
|
||||
Ptr = TranslationHelper(Ptr, Ty);
|
||||
Ptr = TranslationHelper(Ptr, Ty, mpfnTranslateGfxAddressForRead);
|
||||
return Builder::MASKED_STORE(Val, Ptr, Align, Mask, Ty, usage);
|
||||
}
|
||||
|
||||
|
|
|
|||
|
|
@ -41,7 +41,7 @@ namespace SwrJit
|
|||
BuilderGfxMem(JitManager* pJitMgr);
|
||||
virtual ~BuilderGfxMem() {}
|
||||
|
||||
virtual Value* GEP(Value* Ptr, Value* Idx, Type* Ty = nullptr, const Twine& Name = "");
|
||||
virtual Value* GEP(Value* Ptr, Value* Idx, Type* Ty = nullptr, bool isReadOnly = true, const Twine& Name = "");
|
||||
virtual Value* GEP(Type* Ty, Value* Ptr, Value* Idx, const Twine& Name = "");
|
||||
virtual Value*
|
||||
GEP(Value* Ptr, const std::initializer_list<Value*>& indexList, Type* Ty = nullptr);
|
||||
|
|
@ -76,7 +76,7 @@ namespace SwrJit
|
|||
MEM_CLIENT usage = MEM_CLIENT::MEM_CLIENT_INTERNAL);
|
||||
|
||||
virtual StoreInst* STORE(Value *Val, Value *Ptr, bool isVolatile = false, Type* Ty = nullptr, MEM_CLIENT usage = MEM_CLIENT::MEM_CLIENT_INTERNAL);
|
||||
|
||||
|
||||
virtual StoreInst* STORE(Value* Val, Value* BasePtr, const std::initializer_list<uint32_t>& offset, Type* Ty = nullptr, MEM_CLIENT usage = MEM_CLIENT::MEM_CLIENT_INTERNAL);
|
||||
|
||||
virtual CallInst* MASKED_STORE(Value *Val, Value *Ptr, unsigned Align, Value *Mask, Type* Ty = nullptr, MEM_CLIENT usage = MEM_CLIENT::MEM_CLIENT_INTERNAL);
|
||||
|
|
@ -108,7 +108,7 @@ namespace SwrJit
|
|||
Type* PtrTy = nullptr,
|
||||
const Twine& Name = "",
|
||||
MEM_CLIENT usage = MEM_CLIENT::MEM_CLIENT_INTERNAL);
|
||||
|
||||
|
||||
protected:
|
||||
void AssertGFXMemoryParams(Value* ptr, MEM_CLIENT usage);
|
||||
|
||||
|
|
@ -116,7 +116,7 @@ namespace SwrJit
|
|||
|
||||
virtual Value* OFFSET_TO_NEXT_COMPONENT(Value* base, Constant* offset);
|
||||
|
||||
Value* TranslationHelper(Value* Ptr, Type* Ty);
|
||||
Value* TranslationHelper(Value* Ptr, Type* Ty, Value* pfnTranslateGfxAddress);
|
||||
void TrackerHelper(Value* Ptr, Type* Ty, MEM_CLIENT usage, bool isRead);
|
||||
|
||||
FunctionType* GetTranslationFunctionType() { return mpTranslationFuncTy; }
|
||||
|
|
|
|||
|
|
@ -41,7 +41,7 @@ namespace SwrJit
|
|||
"Address appears to be GFX access. Requires translation through BuilderGfxMem.");
|
||||
}
|
||||
|
||||
Value* Builder::GEP(Value* Ptr, Value* Idx, Type* Ty, const Twine& Name)
|
||||
Value* Builder::GEP(Value* Ptr, Value* Idx, Type* Ty, bool isReadOnly, const Twine& Name)
|
||||
{
|
||||
return IRB()->CreateGEP(Ptr, Idx, Name);
|
||||
}
|
||||
|
|
|
|||
|
|
@ -45,7 +45,7 @@ virtual Value* OFFSET_TO_NEXT_COMPONENT(Value* base, Constant* offset);
|
|||
void AssertMemoryUsageParams(Value* ptr, MEM_CLIENT usage);
|
||||
|
||||
public:
|
||||
virtual Value* GEP(Value* Ptr, Value* Idx, Type* Ty = nullptr, const Twine& Name = "");
|
||||
virtual Value* GEP(Value* Ptr, Value* Idx, Type* Ty = nullptr, bool isReadOnly = true, const Twine& Name = "");
|
||||
virtual Value* GEP(Type* Ty, Value* Ptr, Value* Idx, const Twine& Name = "");
|
||||
virtual Value* GEP(Value* ptr, const std::initializer_list<Value*>& indexList, Type* Ty = nullptr);
|
||||
virtual Value*
|
||||
|
|
|
|||
Loading…
Add table
Reference in a new issue