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r600g: cs init fixes
- all asics need to emit CONTEXT_CONTROL - all r6xx asics need to emit 3D_START_CMDBUF The ddx and r600c already do this. r600g should as well. Signed-off-by: Alex Deucher <alexdeucher@gmail.com>
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c4175c811e
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b5518834e3
3 changed files with 12 additions and 5 deletions
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@ -1003,6 +1003,8 @@ int evergreen_context_init(struct r600_context *ctx, struct radeon *radeon)
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r = -ENOMEM;
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goto out_err;
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}
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r600_init_cs(ctx);
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/* save 16dwords space for fence mecanism */
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ctx->pm4_ndwords -= 16;
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@ -40,8 +40,14 @@
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#define GROUP_FORCE_NEW_BLOCK 0
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static void r600_init_cs(struct r600_context *ctx)
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void r600_init_cs(struct r600_context *ctx)
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{
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/* R6xx requires this packet at the start of each command buffer */
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if (ctx->radeon->family < CHIP_RV770) {
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ctx->pm4[ctx->pm4_cdwords++] = PKT3(PKT3_START_3D_CMDBUF, 0, 0);
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ctx->pm4[ctx->pm4_cdwords++] = 0x00000000;
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}
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/* All asics require this one */
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ctx->pm4[ctx->pm4_cdwords++] = PKT3(PKT3_CONTEXT_CONTROL, 1, 0);
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ctx->pm4[ctx->pm4_cdwords++] = 0x80000000;
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ctx->pm4[ctx->pm4_cdwords++] = 0x80000000;
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@ -788,8 +794,7 @@ int r600_context_init(struct r600_context *ctx, struct radeon *radeon)
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goto out_err;
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}
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if (ctx->radeon->family == CHIP_R600)
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r600_init_cs(ctx);
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r600_init_cs(ctx);
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/* save 16dwords space for fence mecanism */
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ctx->pm4_ndwords -= 16;
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@ -1395,8 +1400,7 @@ void r600_context_flush(struct r600_context *ctx)
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ctx->pm4_cdwords = 0;
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ctx->flags = 0;
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if (ctx->radeon->family == CHIP_R600)
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r600_init_cs(ctx);
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r600_init_cs(ctx);
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/* resume queries */
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r600_context_queries_resume(ctx);
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@ -166,6 +166,7 @@ int r600_setup_block_table(struct r600_context *ctx);
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void r600_context_reg(struct r600_context *ctx,
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unsigned offset, unsigned value,
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unsigned mask);
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void r600_init_cs(struct r600_context *ctx);
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/*
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* r600_bo.c
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*/
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