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intel/brw: Handle typed surface and atomic messages for xe2+

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Reworks:
 * Francisco: Rebase on 07b9bfacc7 ("intel/compiler: Move
   logical-send lowering to a separate file")
 * Jordan: Rebase on 952a523abb ("intel: switch over to unified
   atomics")

Signed-off-by: Rohan Garg <rohan.garg@intel.com>
Reviewed-by: Jordan Justen <jordan.l.justen@intel.com>
Reviewed-by: Ian Romanick <ian.d.romanick@intel.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/28484>
This commit is contained in:
Rohan Garg 2022-07-13 18:04:08 +02:00 • committed by Marge Bot
parent 74efde7663
commit b5040bfc3f
2 changed files with 14 additions and 2 deletions
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12
src/intel/compiler/brw_lower_logical_sends.cpp
View file

@ -1661,6 +1661,11 @@ lower_lsc_surface_logical_send(const fs_builder &bld, fs_inst *inst)
const bool has_side_effects = inst->has_side_effects();
const bool is_typed_access =
inst->opcode == SHADER_OPCODE_TYPED_SURFACE_READ_LOGICAL ||
inst->opcode == SHADER_OPCODE_TYPED_SURFACE_WRITE_LOGICAL ||
inst->opcode == SHADER_OPCODE_TYPED_ATOMIC_LOGICAL;
unsigned num_components = 0;
bool has_dest = false;
@ -1680,6 +1685,8 @@ lower_lsc_surface_logical_send(const fs_builder &bld, fs_inst *inst)
if (surface.file == IMM && surface.ud == GFX7_BTI_SLM)
inst->sfid = GFX12_SFID_SLM;
else if (is_typed_access)
inst->sfid = GFX12_SFID_TGM;
else
inst->sfid = GFX12_SFID_UGM;
@ -1715,6 +1722,7 @@ lower_lsc_surface_logical_send(const fs_builder &bld, fs_inst *inst)
surf_type = LSC_ADDR_SURFTYPE_BTI;
switch (inst->opcode) {
case SHADER_OPCODE_TYPED_SURFACE_READ_LOGICAL:
case SHADER_OPCODE_UNTYPED_SURFACE_READ_LOGICAL:
num_components = arg.ud;
has_dest = true;
@ -1724,6 +1732,7 @@ lower_lsc_surface_logical_send(const fs_builder &bld, fs_inst *inst)
false /* transpose */,
LSC_CACHE(devinfo, LOAD, L1STATE_L3MOCS));
break;
case SHADER_OPCODE_TYPED_SURFACE_WRITE_LOGICAL:
case SHADER_OPCODE_UNTYPED_SURFACE_WRITE_LOGICAL:
num_components = arg.ud;
has_dest = false;
@ -1733,6 +1742,7 @@ lower_lsc_surface_logical_send(const fs_builder &bld, fs_inst *inst)
false /* transpose */,
LSC_CACHE(devinfo, STORE, L1STATE_L3MOCS));
break;
case SHADER_OPCODE_TYPED_ATOMIC_LOGICAL:
case SHADER_OPCODE_UNTYPED_ATOMIC_LOGICAL: {
/* Bspec: Atomic instruction -> Cache section:
*
@ -2798,6 +2808,8 @@ brw_fs_lower_logical_sends(fs_visitor &s)
case SHADER_OPCODE_TYPED_SURFACE_READ_LOGICAL:
case SHADER_OPCODE_TYPED_SURFACE_WRITE_LOGICAL:
case SHADER_OPCODE_TYPED_ATOMIC_LOGICAL:
devinfo->ver >= 20 && devinfo->has_lsc ?
lower_lsc_surface_logical_send(ibld, inst) :
lower_surface_logical_send(ibld, inst);
break;

2
src/intel/vulkan/anv_device.c
View file

@ -744,7 +744,7 @@ get_features(const struct anv_physical_device *pdevice,
.shaderSharedFloat64Atomics = false,
.shaderSharedFloat64AtomicAdd = false,
.shaderImageFloat32Atomics = true,
.shaderImageFloat32AtomicAdd = false,
.shaderImageFloat32AtomicAdd = pdevice->info.ver >= 20,
.sparseImageFloat32Atomics = false,
.sparseImageFloat32AtomicAdd = false,