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gallium/radeon: subclass threaded_resource
Reviewed-by: Nicolai Hähnle <nicolai.haehnle@amd.com> Tested-by: Dieter Nützel <Dieter@nuetzel-hh.de>
This commit is contained in:
parent
93d549b2af
commit
b4fc399c08
3 changed files with 22 additions and 18 deletions
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@ -27,7 +27,6 @@
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#include "r600_cs.h"
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#include "util/u_memory.h"
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#include "util/u_upload_mgr.h"
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#include "util/u_threaded_context.h"
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#include <inttypes.h>
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#include <stdio.h>
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@ -239,6 +238,7 @@ static void r600_buffer_destroy(struct pipe_screen *screen,
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{
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struct r600_resource *rbuffer = r600_resource(buf);
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threaded_resource_deinit(buf);
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util_range_destroy(&rbuffer->valid_buffer_range);
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pb_reference(&rbuffer->buf, NULL);
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FREE(rbuffer);
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@ -249,7 +249,7 @@ r600_invalidate_buffer(struct r600_common_context *rctx,
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struct r600_resource *rbuffer)
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{
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/* Shared buffers can't be reallocated. */
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if (rbuffer->is_shared)
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if (rbuffer->b.is_shared)
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return false;
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/* Sparse buffers can't be reallocated. */
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@ -259,7 +259,7 @@ r600_invalidate_buffer(struct r600_common_context *rctx,
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/* In AMD_pinned_memory, the user pointer association only gets
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* broken when the buffer is explicitly re-allocated.
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*/
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if (rctx->ws->buffer_is_user_ptr(rbuffer->buf))
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if (rbuffer->b.is_user_ptr)
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return false;
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/* Check if mapping this buffer would cause waiting for the GPU. */
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@ -349,7 +349,7 @@ static void *r600_buffer_transfer_map(struct pipe_context *ctx,
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*
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* So don't ever use staging buffers.
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*/
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if (rscreen->ws->buffer_is_user_ptr(rbuffer->buf))
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if (rbuffer->b.is_user_ptr)
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usage |= PIPE_TRANSFER_PERSISTENT;
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/* See if the buffer range being mapped has never been initialized,
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@ -357,7 +357,7 @@ static void *r600_buffer_transfer_map(struct pipe_context *ctx,
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if (!(usage & (PIPE_TRANSFER_UNSYNCHRONIZED |
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TC_TRANSFER_MAP_IGNORE_VALID_RANGE)) &&
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usage & PIPE_TRANSFER_WRITE &&
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!rbuffer->is_shared &&
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!rbuffer->b.is_shared &&
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!util_ranges_intersect(&rbuffer->valid_buffer_range, box->x, box->x + box->width)) {
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usage |= PIPE_TRANSFER_UNSYNCHRONIZED;
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}
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@ -565,11 +565,13 @@ r600_alloc_buffer_struct(struct pipe_screen *screen,
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rbuffer->b.b.next = NULL;
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pipe_reference_init(&rbuffer->b.b.reference, 1);
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rbuffer->b.b.screen = screen;
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rbuffer->b.vtbl = &r600_buffer_vtbl;
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threaded_resource_init(&rbuffer->b.b);
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rbuffer->buf = NULL;
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rbuffer->bind_history = 0;
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rbuffer->TC_L2_dirty = false;
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rbuffer->is_shared = false;
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util_range_init(&rbuffer->valid_buffer_range);
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return rbuffer;
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}
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@ -627,7 +629,9 @@ r600_buffer_from_user_memory(struct pipe_screen *screen,
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rbuffer->domains = RADEON_DOMAIN_GTT;
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rbuffer->flags = 0;
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rbuffer->b.is_user_ptr = true;
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util_range_add(&rbuffer->valid_buffer_range, 0, templ->width0);
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util_range_add(&rbuffer->b.valid_buffer_range, 0, templ->width0);
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/* Convert a user pointer to a buffer. */
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rbuffer->buf = ws->buffer_from_ptr(ws, user_memory, templ->width0);
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@ -45,6 +45,7 @@
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#include "util/slab.h"
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#include "util/u_suballoc.h"
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#include "util/u_transfer.h"
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#include "util/u_threaded_context.h"
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#define ATI_VENDOR_ID 0x1002
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@ -140,7 +141,7 @@ void radeon_shader_binary_clean(struct ac_shader_binary *b);
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* at the moment.
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*/
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struct r600_resource {
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struct u_resource b;
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struct threaded_resource b;
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/* Winsys objects. */
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struct pb_buffer *buf;
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@ -179,7 +180,6 @@ struct r600_resource {
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bool TC_L2_dirty;
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/* Whether the resource has been exported via resource_get_handle. */
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bool is_shared;
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unsigned external_usage; /* PIPE_HANDLE_USAGE_* */
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};
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@ -389,7 +389,7 @@ static bool r600_can_disable_dcc(struct r600_texture *rtex)
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{
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/* We can't disable DCC if it can be written by another process. */
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return rtex->dcc_offset &&
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(!rtex->resource.is_shared ||
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(!rtex->resource.b.is_shared ||
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!(rtex->resource.external_usage & PIPE_HANDLE_USAGE_WRITE));
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}
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@ -466,7 +466,7 @@ static void r600_degrade_tile_mode_to_linear(struct r600_common_context *rctx,
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if (rctx->chip_class < SI)
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return;
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if (rtex->resource.is_shared ||
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if (rtex->resource.b.is_shared ||
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rtex->surface.is_linear)
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return;
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@ -570,7 +570,7 @@ static boolean r600_texture_get_handle(struct pipe_screen* screen,
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}
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/* Set metadata. */
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if (!res->is_shared || update_metadata) {
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if (!res->b.is_shared || update_metadata) {
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r600_texture_init_metadata(rscreen, rtex, &metadata);
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if (rscreen->query_opaque_metadata)
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rscreen->query_opaque_metadata(rscreen, rtex,
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@ -580,7 +580,7 @@ static boolean r600_texture_get_handle(struct pipe_screen* screen,
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}
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}
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if (res->is_shared) {
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if (res->b.is_shared) {
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/* USAGE_EXPLICIT_FLUSH must be cleared if at least one user
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* doesn't set it.
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*/
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@ -588,7 +588,7 @@ static boolean r600_texture_get_handle(struct pipe_screen* screen,
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if (!(usage & PIPE_HANDLE_USAGE_EXPLICIT_FLUSH))
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res->external_usage &= ~PIPE_HANDLE_USAGE_EXPLICIT_FLUSH;
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} else {
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res->is_shared = true;
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res->b.is_shared = true;
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res->external_usage = usage;
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}
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@ -1432,7 +1432,7 @@ static struct pipe_resource *r600_texture_from_handle(struct pipe_screen *screen
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if (!rtex)
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return NULL;
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rtex->resource.is_shared = true;
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rtex->resource.b.is_shared = true;
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rtex->resource.external_usage = usage;
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if (rscreen->apply_opaque_metadata)
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@ -1550,7 +1550,7 @@ static bool r600_can_invalidate_texture(struct r600_common_screen *rscreen,
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{
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/* r600g doesn't react to dirty_tex_descriptor_counter */
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return rscreen->chip_class >= SI &&
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!rtex->resource.is_shared &&
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!rtex->resource.b.is_shared &&
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!(transfer_usage & PIPE_TRANSFER_READ) &&
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rtex->resource.b.b.last_level == 0 &&
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util_texrange_covers_whole_level(&rtex->resource.b.b, 0,
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@ -2257,7 +2257,7 @@ static void vi_separate_dcc_try_enable(struct r600_common_context *rctx,
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/* The intent is to use this with shared displayable back buffers,
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* but it's not strictly limited only to them.
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*/
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if (!tex->resource.is_shared ||
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if (!tex->resource.b.is_shared ||
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!(tex->resource.external_usage & PIPE_HANDLE_USAGE_EXPLICIT_FLUSH) ||
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tex->resource.b.b.target != PIPE_TEXTURE_2D ||
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tex->resource.b.b.last_level > 0 ||
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@ -2524,7 +2524,7 @@ void vi_dcc_clear_level(struct r600_common_context *rctx,
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static void si_set_optimal_micro_tile_mode(struct r600_common_screen *rscreen,
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struct r600_texture *rtex)
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{
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if (rtex->resource.is_shared ||
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if (rtex->resource.b.is_shared ||
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rtex->resource.b.b.nr_samples <= 1 ||
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rtex->surface.micro_tile_mode == rtex->last_msaa_resolve_target_micro_mode)
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return;
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@ -2674,7 +2674,7 @@ void evergreen_do_fast_color_clear(struct r600_common_context *rctx,
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* because there is no way to communicate the clear color among
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* all clients
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*/
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if (tex->resource.is_shared &&
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if (tex->resource.b.is_shared &&
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!(tex->resource.external_usage & PIPE_HANDLE_USAGE_EXPLICIT_FLUSH))
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continue;
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