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pan/mdg: Mask spills from texture write

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This prevents RA failures the results of reading multiple textures that
require less than 4 channels, as seen in a number of GL 3 WebRender shaders.

Closes: #3342

Signed-off-by: Alyssa Rosenzweig <alyssa.rosenzweig@collabora.com>
Reported-by: Icecream95 <ixn@keemail.me>
Tested-by: Icecream95 <ixn@keemail.me>
Cc: mesa-stable
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/6144>
This commit is contained in:
Alyssa Rosenzweig 2020-07-31 10:31:50 -04:00
parent 26dd8f8045
commit b4de9e035a
1 changed files with 8 additions and 0 deletions
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8
src/panfrost/midgard/midgard_ra.c
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@ -855,9 +855,17 @@ mir_spill_register(
midgard_instruction st;
/* Note: it's important to match the mask of the spill
* with the mask of the instruction whose destination
* we're spilling, or otherwise we'll read invalid
* components and can fail RA in a subsequent iteration
*/
if (is_special_w) {
st = v_mov(spill_node, spill_slot);
st.no_spill |= (1 << spill_class);
st.mask = ins->mask;
st.dest_type = st.src_types[0] = ins->dest_type;
} else {
ins->dest = spill_index++;
ins->no_spill |= (1 << spill_class);