pan/va: Include BLEND for va_swap_12

This helps "contain the crazy" and avoids special casing BLEND in compiler
passes. The Valhall instruction is roughly the same as its Bifrost counterpart,
as long as we fix up the source order (as we already do for bitwise operations)
everything works out.

Signed-off-by: Alyssa Rosenzweig <alyssa@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/17091>
This commit is contained in:
Alyssa Rosenzweig 2022-06-16 15:46:22 -04:00 committed by Marge Bot
parent 738a1572d2
commit b48933d641
2 changed files with 5 additions and 10 deletions

View file

@ -34,16 +34,6 @@
static void
lower_split_src(bi_context *ctx, bi_instr *I, unsigned s)
{
/* Fix up for mismatch between IR and Valhall BLEND */
if (I->op == BI_OPCODE_BLEND) {
/* Only the blend descriptor needs lowering */
if (s != 1)
return;
/* But it is in a different place! */
s = 2;
}
/* Skip sources that are already split properly */
bi_index offset_fau = I->src[s];
offset_fau.offset++;

View file

@ -112,12 +112,17 @@ valhall_opcodes[BI_NUM_OPCODES];
/* Bifrost specifies the source of bitwise operations as (A, B, shift), but
* Valhall specifies (A, shift, B). We follow Bifrost conventions in the
* compiler, so normalize.
*
* Bifrost specifies BLEND as staging + (coverage, blend descriptor), but
* Valhall specifies staging + (blend descriptor, coverage). Given we put
* staging sources first, this works out to the same swap as bitwise ops.
*/
static inline bool
va_swap_12(enum bi_opcode op)
{
switch (op) {
case BI_OPCODE_BLEND:
case BI_OPCODE_LSHIFT_AND_I32:
case BI_OPCODE_LSHIFT_AND_V2I16:
case BI_OPCODE_LSHIFT_AND_V4I8: