i965: Avoid explicit accumulator operands in SIMD16 mode on Gen7.

According to the BSpec ISA volume's "Accumulator Register" section:

"[DevIVB] SIMD16 execution on dwords is not allowed when accumulator is
 explicit source or destination operand."

Fixes piglit tests:
- fs-multiply-const-ivec4
- fs-multiply-const-uvec4
- fs-multiply-ivec4-const
- fs-multiply-uvec4-const

Signed-off-by: Kenneth Graunke <kenneth@whitecape.org>
(cherry picked from commit 01044fce6b)
This commit is contained in:
Kenneth Graunke 2012-03-30 13:58:06 -07:00 committed by Ian Romanick
parent 5eb2e5bdc7
commit b4693383bf

View file

@ -296,6 +296,9 @@ fs_visitor::visit(ir_expression *ir)
* FINISHME: Emit just the MUL if we know an operand is small
* enough.
*/
if (intel->gen >= 7 && c->dispatch_width == 16)
fail("16-wide explicit accumulator operands unsupported\n");
struct brw_reg acc = retype(brw_acc_reg(), BRW_REGISTER_TYPE_D);
emit(BRW_OPCODE_MUL, acc, op[0], op[1]);