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v3d: Add support for flushing dirty TMU data at job end.
This will be needed for SSBOs and image_load_store.
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3 changed files with 43 additions and 0 deletions
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@ -174,6 +174,16 @@
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<value name="int" value="3" min_ver="42"/> <!-- clamp to integer RT's range -->
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</enum>
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<enum name="L2T Flush Mode" prefix="L2T_FLUSH_MODE">
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<!-- invalidates all cache lines -->
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<value name="flush" value="0"/>
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<!-- Invalidates dirty cachelines without writeback -->
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<value name="clear" value="1"/>
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<!-- Writes back dirty cachelines and marks them clean, without
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invalidating -->
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<value name="clean" value="2"/>
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</enum>
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<enum name="Output Image Format" prefix="V3D_OUTPUT_IMAGE_FORMAT">
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<!--
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Formats appear with their channels named from the low bits to
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@ -595,6 +605,19 @@
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<packet code="75" name="Flush Transform Feedback Data"/>
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<packet code="76" name="L1 Cache Flush Control">
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<field name="TMU Config Cache Clear" size="4" start="12" type="uint"/>
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<field name="TMU Data Cache Clear" size="4" start="8" type="uint"/>
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<field name="Uniforms Cache Clear" size="4" start="4" type="uint"/>
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<field name="Instruction Cache Clear" size="4" start="0" type="uint"/>
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</packet>
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<packet code="77" name="L2T Cache Flush Control">
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<field name="L2T Flush Mode" size="4" start="64" type="L2T Flush Mode"/>
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<field name="L2T Flush End" size="32" start="32" type="address"/>
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<field name="L2T Flush Start" size="32" start="0" type="address"/>
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</packet>
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<struct name="Transform Feedback Output Data Spec" max_ver="33">
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<field name="First Shaded Vertex Value to output" size="8" start="0" type="uint"/>
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<field name="Number of consecutive Vertex Values to output as 32-bit values" size="4" start="8" type="uint" minus_one="true"/>
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@ -308,6 +308,11 @@ struct v3d_job {
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*/
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bool needs_flush;
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/* Set if any shader has dirtied cachelines in the TMU that need to be
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* flushed before job end.
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*/
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bool tmu_dirty_rcl;
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/**
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* Set if a packet enabling TF has been emitted in the job (V3D 4.x).
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*/
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@ -786,5 +786,20 @@ v3dX(emit_rcl)(struct v3d_job *job)
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}
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}
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if (job->tmu_dirty_rcl) {
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cl_emit(&job->rcl, L1_CACHE_FLUSH_CONTROL, flush) {
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flush.tmu_config_cache_clear = 0xf;
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flush.tmu_data_cache_clear = 0xf;
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flush.uniforms_cache_clear = 0xf;
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flush.instruction_cache_clear = 0xf;
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}
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cl_emit(&job->rcl, L2T_CACHE_FLUSH_CONTROL, flush) {
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flush.l2t_flush_mode = L2T_FLUSH_MODE_CLEAN;
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flush.l2t_flush_start = cl_address(NULL, 0);
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flush.l2t_flush_end = cl_address(NULL, ~0);
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}
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}
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cl_emit(&job->rcl, END_OF_RENDERING, end);
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}
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