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pan/mdg: Don't read base for combined stores
`base` is meaningless for combined stores, so don't read it. This allows us to remove the base index from the intrinsic and simplify the lowering code generating the combined store intrinsic. Signed-off-by: Alyssa Rosenzweig <alyssa@collabora.com> Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/13714>
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1 changed files with 36 additions and 33 deletions
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@ -1867,46 +1867,13 @@ emit_intrinsic(compiler_context *ctx, nir_intrinsic_instr *instr)
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case nir_intrinsic_store_combined_output_pan:
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case nir_intrinsic_store_combined_output_pan:
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assert(nir_src_is_const(instr->src[1]) && "no indirect outputs");
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assert(nir_src_is_const(instr->src[1]) && "no indirect outputs");
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offset = nir_intrinsic_base(instr) + nir_src_as_uint(instr->src[1]);
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reg = nir_src_index(ctx, &instr->src[0]);
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reg = nir_src_index(ctx, &instr->src[0]);
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if (ctx->stage == MESA_SHADER_FRAGMENT) {
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if (ctx->stage == MESA_SHADER_FRAGMENT) {
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bool combined = instr->intrinsic ==
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bool combined = instr->intrinsic ==
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nir_intrinsic_store_combined_output_pan;
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nir_intrinsic_store_combined_output_pan;
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const nir_variable *var;
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var = nir_find_variable_with_driver_location(ctx->nir, nir_var_shader_out,
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nir_intrinsic_base(instr));
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assert(var);
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/* Dual-source blend writeout is done by leaving the
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* value in r2 for the blend shader to use. */
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if (var->data.index) {
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if (instr->src[0].is_ssa) {
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emit_explicit_constant(ctx, reg, reg);
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unsigned out = make_compiler_temp(ctx);
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midgard_instruction ins = v_mov(reg, out);
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emit_mir_instruction(ctx, ins);
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ctx->blend_src1 = out;
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} else {
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ctx->blend_src1 = reg;
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}
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break;
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}
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enum midgard_rt_id rt;
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enum midgard_rt_id rt;
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if (var->data.location >= FRAG_RESULT_DATA0)
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rt = MIDGARD_COLOR_RT0 + var->data.location -
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FRAG_RESULT_DATA0;
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else if (combined)
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rt = MIDGARD_ZS_RT;
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else
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unreachable("bad rt");
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unsigned reg_z = ~0, reg_s = ~0;
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unsigned reg_z = ~0, reg_s = ~0;
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if (combined) {
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if (combined) {
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@ -1915,6 +1882,40 @@ emit_intrinsic(compiler_context *ctx, nir_intrinsic_instr *instr)
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reg_z = nir_src_index(ctx, &instr->src[2]);
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reg_z = nir_src_index(ctx, &instr->src[2]);
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if (writeout & PAN_WRITEOUT_S)
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if (writeout & PAN_WRITEOUT_S)
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reg_s = nir_src_index(ctx, &instr->src[3]);
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reg_s = nir_src_index(ctx, &instr->src[3]);
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if (writeout & PAN_WRITEOUT_C)
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rt = MIDGARD_COLOR_RT0;
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else
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rt = MIDGARD_ZS_RT;
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} else {
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const nir_variable *var =
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nir_find_variable_with_driver_location(ctx->nir, nir_var_shader_out,
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nir_intrinsic_base(instr));
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assert(var != NULL);
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assert(var->data.location >= FRAG_RESULT_DATA0);
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rt = MIDGARD_COLOR_RT0 + var->data.location -
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FRAG_RESULT_DATA0;
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/* Dual-source blend writeout is done by leaving the
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* value in r2 for the blend shader to use. */
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if (var->data.index) {
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if (instr->src[0].is_ssa) {
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emit_explicit_constant(ctx, reg, reg);
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unsigned out = make_compiler_temp(ctx);
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midgard_instruction ins = v_mov(reg, out);
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emit_mir_instruction(ctx, ins);
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ctx->blend_src1 = out;
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} else {
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ctx->blend_src1 = reg;
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}
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break;
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}
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}
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}
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emit_fragment_store(ctx, reg, reg_z, reg_s, rt, 0);
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emit_fragment_store(ctx, reg, reg_z, reg_s, rt, 0);
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@ -1931,6 +1932,8 @@ emit_intrinsic(compiler_context *ctx, nir_intrinsic_instr *instr)
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emit_explicit_constant(ctx, reg, reg);
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emit_explicit_constant(ctx, reg, reg);
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offset = nir_intrinsic_base(instr) + nir_src_as_uint(instr->src[1]);
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unsigned dst_component = nir_intrinsic_component(instr);
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unsigned dst_component = nir_intrinsic_component(instr);
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unsigned nr_comp = nir_src_num_components(instr->src[0]);
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unsigned nr_comp = nir_src_num_components(instr->src[0]);
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