diff --git a/src/etnaviv/ci/etnaviv-vipnano-fails.txt b/src/etnaviv/ci/etnaviv-vipnano-fails.txt
index f266dbf4db8..c8ce99c8f79 100644
--- a/src/etnaviv/ci/etnaviv-vipnano-fails.txt
+++ b/src/etnaviv/ci/etnaviv-vipnano-fails.txt
@@ -1,212 +1,3 @@
-Conv2D.Op/input_size_112_weight_size_5_input_channels_1_output_channels_120_stride_2_padding_same_1_is_signed_0,Fail
-Conv2D.Op/input_size_112_weight_size_5_input_channels_1_output_channels_128_stride_2_padding_same_1_is_signed_0,Fail
-Conv2D.Op/input_size_112_weight_size_5_input_channels_1_output_channels_160_stride_2_padding_same_1_is_signed_0,Fail
-Conv2D.Op/input_size_112_weight_size_5_input_channels_1_output_channels_1_stride_2_padding_same_1_is_signed_0,Fail
-Conv2D.Op/input_size_112_weight_size_5_input_channels_1_output_channels_256_stride_2_padding_same_1_is_signed_0,Fail
-Conv2D.Op/input_size_112_weight_size_5_input_channels_1_output_channels_32_stride_2_padding_same_1_is_signed_0,Fail
-Conv2D.Op/input_size_112_weight_size_5_input_channels_256_output_channels_120_stride_1_padding_same_0_is_signed_0,Fail
-Conv2D.Op/input_size_112_weight_size_5_input_channels_256_output_channels_120_stride_1_padding_same_1_is_signed_0,Fail
-Conv2D.Op/input_size_80_weight_size_5_input_channels_1_output_channels_120_stride_2_padding_same_1_is_signed_0,Fail
-Conv2D.Op/input_size_80_weight_size_5_input_channels_1_output_channels_128_stride_2_padding_same_1_is_signed_0,Fail
-Conv2D.Op/input_size_80_weight_size_5_input_channels_1_output_channels_160_stride_2_padding_same_1_is_signed_0,Fail
-Conv2D.Op/input_size_80_weight_size_5_input_channels_1_output_channels_1_stride_2_padding_same_1_is_signed_0,Fail
-Conv2D.Op/input_size_80_weight_size_5_input_channels_1_output_channels_256_stride_2_padding_same_1_is_signed_0,Fail
-Conv2D.Op/input_size_80_weight_size_5_input_channels_1_output_channels_32_stride_2_padding_same_1_is_signed_0,Fail
-Conv2D.Op/input_size_8_weight_size_5_input_channels_1_output_channels_120_stride_1_padding_same_0_is_signed_0,Fail
-Conv2D.Op/input_size_8_weight_size_5_input_channels_1_output_channels_120_stride_1_padding_same_1_is_signed_0,Fail
-Conv2D.Op/input_size_8_weight_size_5_input_channels_1_output_channels_120_stride_2_padding_same_1_is_signed_0,Fail
-Conv2D.Op/input_size_8_weight_size_5_input_channels_1_output_channels_128_stride_1_padding_same_0_is_signed_0,Fail
-Conv2D.Op/input_size_8_weight_size_5_input_channels_1_output_channels_128_stride_1_padding_same_1_is_signed_0,Fail
-Conv2D.Op/input_size_8_weight_size_5_input_channels_1_output_channels_128_stride_2_padding_same_1_is_signed_0,Fail
-Conv2D.Op/input_size_8_weight_size_5_input_channels_1_output_channels_160_stride_1_padding_same_0_is_signed_0,Fail
-Conv2D.Op/input_size_8_weight_size_5_input_channels_1_output_channels_160_stride_1_padding_same_1_is_signed_0,Fail
-Conv2D.Op/input_size_8_weight_size_5_input_channels_1_output_channels_160_stride_2_padding_same_1_is_signed_0,Fail
-Conv2D.Op/input_size_8_weight_size_5_input_channels_1_output_channels_1_stride_1_padding_same_0_is_signed_0,Fail
-Conv2D.Op/input_size_8_weight_size_5_input_channels_1_output_channels_1_stride_1_padding_same_1_is_signed_0,Fail
-Conv2D.Op/input_size_8_weight_size_5_input_channels_1_output_channels_1_stride_2_padding_same_1_is_signed_0,Fail
-Conv2D.Op/input_size_8_weight_size_5_input_channels_1_output_channels_256_stride_1_padding_same_0_is_signed_0,Fail
-Conv2D.Op/input_size_8_weight_size_5_input_channels_1_output_channels_256_stride_1_padding_same_1_is_signed_0,Fail
-Conv2D.Op/input_size_8_weight_size_5_input_channels_1_output_channels_256_stride_2_padding_same_1_is_signed_0,Fail
-Conv2D.Op/input_size_8_weight_size_5_input_channels_1_output_channels_32_stride_1_padding_same_0_is_signed_0,Fail
-Conv2D.Op/input_size_8_weight_size_5_input_channels_1_output_channels_32_stride_1_padding_same_1_is_signed_0,Fail
-Conv2D.Op/input_size_8_weight_size_5_input_channels_1_output_channels_32_stride_2_padding_same_1_is_signed_0,Fail
-Conv2D.Op/input_size_5_weight_size_5_input_channels_1_output_channels_120_stride_1_padding_same_0_is_signed_0,Fail
-Conv2D.Op/input_size_5_weight_size_5_input_channels_1_output_channels_128_stride_1_padding_same_0_is_signed_0,Fail
-Conv2D.Op/input_size_5_weight_size_5_input_channels_1_output_channels_160_stride_1_padding_same_0_is_signed_0,Fail
-Conv2D.Op/input_size_5_weight_size_5_input_channels_1_output_channels_256_stride_1_padding_same_0_is_signed_0,Fail
-Conv2D.Op/input_size_5_weight_size_5_input_channels_1_output_channels_32_stride_1_padding_same_0_is_signed_0,Fail
-Conv2D.Op/input_size_5_weight_size_5_input_channels_1_output_channels_120_stride_1_padding_same_1_is_signed_0,Fail
-Conv2D.Op/input_size_5_weight_size_5_input_channels_1_output_channels_128_stride_1_padding_same_1_is_signed_0,Fail
-Conv2D.Op/input_size_5_weight_size_5_input_channels_1_output_channels_160_stride_1_padding_same_1_is_signed_0,Fail
-Conv2D.Op/input_size_5_weight_size_5_input_channels_1_output_channels_1_stride_1_padding_same_1_is_signed_0,Fail
-Conv2D.Op/input_size_5_weight_size_5_input_channels_1_output_channels_256_stride_1_padding_same_1_is_signed_0,Fail
-Conv2D.Op/input_size_5_weight_size_5_input_channels_1_output_channels_32_stride_1_padding_same_1_is_signed_0,Fail
-
-# Same bits, different result
-Conv2D.Op/input_size_5_weight_size_3_input_channels_120_output_channels_120_stride_2_padding_same_0_is_signed_0,Fail
-
-Conv2D.Op/input_size_5_weight_size_3_input_channels_120_output_channels_128_stride_2_padding_same_0_is_signed_0,Fail
-Conv2D.Op/input_size_5_weight_size_3_input_channels_120_output_channels_160_stride_2_padding_same_0_is_signed_0,Fail
-Conv2D.Op/input_size_5_weight_size_3_input_channels_120_output_channels_1_stride_2_padding_same_0_is_signed_0,Fail
-Conv2D.Op/input_size_5_weight_size_3_input_channels_120_output_channels_256_stride_2_padding_same_0_is_signed_0,Fail
-Conv2D.Op/input_size_5_weight_size_3_input_channels_120_output_channels_32_stride_2_padding_same_0_is_signed_0,Fail
-Conv2D.Op/input_size_5_weight_size_3_input_channels_128_output_channels_120_stride_2_padding_same_0_is_signed_0,Fail
-Conv2D.Op/input_size_5_weight_size_3_input_channels_128_output_channels_128_stride_2_padding_same_0_is_signed_0,Fail
-Conv2D.Op/input_size_5_weight_size_3_input_channels_128_output_channels_160_stride_2_padding_same_0_is_signed_0,Fail
-Conv2D.Op/input_size_5_weight_size_3_input_channels_128_output_channels_1_stride_2_padding_same_0_is_signed_0,Fail
-Conv2D.Op/input_size_5_weight_size_3_input_channels_128_output_channels_256_stride_2_padding_same_0_is_signed_0,Fail
-Conv2D.Op/input_size_5_weight_size_3_input_channels_128_output_channels_32_stride_2_padding_same_0_is_signed_0,Fail
-Conv2D.Op/input_size_5_weight_size_3_input_channels_256_output_channels_120_stride_2_padding_same_0_is_signed_0,Fail
-Conv2D.Op/input_size_5_weight_size_3_input_channels_256_output_channels_128_stride_2_padding_same_0_is_signed_0,Fail
-Conv2D.Op/input_size_5_weight_size_3_input_channels_256_output_channels_160_stride_2_padding_same_0_is_signed_0,Fail
-Conv2D.Op/input_size_5_weight_size_3_input_channels_256_output_channels_1_stride_2_padding_same_0_is_signed_0,Fail
-Conv2D.Op/input_size_5_weight_size_3_input_channels_256_output_channels_256_stride_2_padding_same_0_is_signed_0,Fail
-Conv2D.Op/input_size_5_weight_size_3_input_channels_256_output_channels_32_stride_2_padding_same_0_is_signed_0,Fail
-Conv2D.Op/input_size_5_weight_size_3_input_channels_32_output_channels_120_stride_2_padding_same_0_is_signed_0,Fail
-Conv2D.Op/input_size_5_weight_size_3_input_channels_32_output_channels_128_stride_2_padding_same_0_is_signed_0,Fail
-Conv2D.Op/input_size_5_weight_size_3_input_channels_32_output_channels_160_stride_2_padding_same_0_is_signed_0,Fail
-Conv2D.Op/input_size_5_weight_size_3_input_channels_32_output_channels_1_stride_2_padding_same_0_is_signed_0,Fail
-Conv2D.Op/input_size_5_weight_size_3_input_channels_32_output_channels_256_stride_2_padding_same_0_is_signed_0,Fail
-Conv2D.Op/input_size_5_weight_size_3_input_channels_32_output_channels_32_stride_2_padding_same_0_is_signed_0,Fail
-Conv2D.Op/input_size_5_weight_size_5_input_channels_120_output_channels_120_stride_2_padding_same_0_is_signed_0,Fail
-Conv2D.Op/input_size_5_weight_size_5_input_channels_120_output_channels_128_stride_2_padding_same_0_is_signed_0,Fail
-Conv2D.Op/input_size_5_weight_size_5_input_channels_120_output_channels_160_stride_2_padding_same_0_is_signed_0,Fail
-Conv2D.Op/input_size_5_weight_size_5_input_channels_120_output_channels_256_stride_2_padding_same_0_is_signed_0,Fail
-Conv2D.Op/input_size_5_weight_size_5_input_channels_120_output_channels_32_stride_2_padding_same_0_is_signed_0,Fail
-Conv2D.Op/input_size_5_weight_size_5_input_channels_128_output_channels_120_stride_2_padding_same_0_is_signed_0,Fail
-Conv2D.Op/input_size_5_weight_size_5_input_channels_128_output_channels_128_stride_2_padding_same_0_is_signed_0,Fail
-Conv2D.Op/input_size_5_weight_size_5_input_channels_128_output_channels_160_stride_2_padding_same_0_is_signed_0,Fail
-Conv2D.Op/input_size_5_weight_size_5_input_channels_128_output_channels_1_stride_2_padding_same_0_is_signed_0,Fail
-Conv2D.Op/input_size_5_weight_size_5_input_channels_128_output_channels_256_stride_2_padding_same_0_is_signed_0,Fail
-Conv2D.Op/input_size_5_weight_size_5_input_channels_128_output_channels_32_stride_2_padding_same_0_is_signed_0,Fail
-Conv2D.Op/input_size_5_weight_size_5_input_channels_256_output_channels_120_stride_2_padding_same_0_is_signed_0,Fail
-Conv2D.Op/input_size_5_weight_size_5_input_channels_256_output_channels_128_stride_2_padding_same_0_is_signed_0,Fail
-Conv2D.Op/input_size_5_weight_size_5_input_channels_256_output_channels_160_stride_2_padding_same_0_is_signed_0,Fail
-Conv2D.Op/input_size_5_weight_size_5_input_channels_256_output_channels_256_stride_2_padding_same_0_is_signed_0,Fail
-Conv2D.Op/input_size_5_weight_size_5_input_channels_256_output_channels_32_stride_2_padding_same_0_is_signed_0,Fail
-Conv2D.Op/input_size_5_weight_size_5_input_channels_32_output_channels_120_stride_2_padding_same_0_is_signed_0,Fail
-Conv2D.Op/input_size_5_weight_size_5_input_channels_32_output_channels_128_stride_2_padding_same_0_is_signed_0,Fail
-Conv2D.Op/input_size_5_weight_size_5_input_channels_32_output_channels_160_stride_2_padding_same_0_is_signed_0,Fail
-Conv2D.Op/input_size_5_weight_size_5_input_channels_32_output_channels_32_stride_2_padding_same_0_is_signed_0,Fail
-Conv2D.Op/input_size_5_weight_size_5_input_channels_1_output_channels_120_stride_2_padding_same_1_is_signed_0,Fail
-Conv2D.Op/input_size_5_weight_size_5_input_channels_1_output_channels_128_stride_2_padding_same_1_is_signed_0,Fail
-Conv2D.Op/input_size_5_weight_size_5_input_channels_1_output_channels_160_stride_2_padding_same_1_is_signed_0,Fail
-Conv2D.Op/input_size_5_weight_size_5_input_channels_1_output_channels_1_stride_2_padding_same_1_is_signed_0,Fail
-Conv2D.Op/input_size_5_weight_size_5_input_channels_1_output_channels_256_stride_2_padding_same_1_is_signed_0,Fail
-Conv2D.Op/input_size_5_weight_size_5_input_channels_1_output_channels_32_stride_2_padding_same_1_is_signed_0,Fail
-Conv2D.Op/input_size_5_weight_size_5_input_channels_32_output_channels_256_stride_2_padding_same_0_is_signed_0,Fail
-Conv2D.Op/input_size_3_weight_size_3_input_channels_120_output_channels_120_stride_2_padding_same_0_is_signed_0,Fail
-Conv2D.Op/input_size_3_weight_size_3_input_channels_120_output_channels_128_stride_2_padding_same_0_is_signed_0,Fail
-Conv2D.Op/input_size_3_weight_size_3_input_channels_120_output_channels_160_stride_2_padding_same_0_is_signed_0,Fail
-Conv2D.Op/input_size_3_weight_size_3_input_channels_120_output_channels_256_stride_2_padding_same_0_is_signed_0,Fail
-Conv2D.Op/input_size_3_weight_size_3_input_channels_120_output_channels_32_stride_2_padding_same_0_is_signed_0,Fail
-Conv2D.Op/input_size_3_weight_size_3_input_channels_128_output_channels_120_stride_2_padding_same_0_is_signed_0,Fail
-Conv2D.Op/input_size_3_weight_size_3_input_channels_128_output_channels_128_stride_2_padding_same_0_is_signed_0,Fail
-Conv2D.Op/input_size_3_weight_size_3_input_channels_128_output_channels_160_stride_2_padding_same_0_is_signed_0,Fail
-Conv2D.Op/input_size_3_weight_size_3_input_channels_128_output_channels_256_stride_2_padding_same_0_is_signed_0,Fail
-Conv2D.Op/input_size_3_weight_size_3_input_channels_128_output_channels_32_stride_2_padding_same_0_is_signed_0,Fail
-Conv2D.Op/input_size_3_weight_size_3_input_channels_256_output_channels_120_stride_2_padding_same_0_is_signed_0,Fail
-Conv2D.Op/input_size_3_weight_size_3_input_channels_256_output_channels_128_stride_2_padding_same_0_is_signed_0,Fail
-Conv2D.Op/input_size_3_weight_size_3_input_channels_256_output_channels_160_stride_2_padding_same_0_is_signed_0,Fail
-Conv2D.Op/input_size_3_weight_size_3_input_channels_256_output_channels_256_stride_2_padding_same_0_is_signed_0,Fail
-Conv2D.Op/input_size_3_weight_size_3_input_channels_256_output_channels_32_stride_2_padding_same_0_is_signed_0,Fail
-Conv2D.Op/input_size_3_weight_size_3_input_channels_32_output_channels_120_stride_2_padding_same_0_is_signed_0,Fail
-Conv2D.Op/input_size_3_weight_size_3_input_channels_32_output_channels_128_stride_2_padding_same_0_is_signed_0,Fail
-Conv2D.Op/input_size_3_weight_size_3_input_channels_32_output_channels_160_stride_2_padding_same_0_is_signed_0,Fail
-Conv2D.Op/input_size_3_weight_size_3_input_channels_32_output_channels_256_stride_2_padding_same_0_is_signed_0,Fail
-Conv2D.Op/input_size_3_weight_size_3_input_channels_32_output_channels_32_stride_2_padding_same_0_is_signed_0,Fail
-Add.Op/input_size_3_weight_size_3_input_channels_120_output_channels_120_stride_2_padding_same_0_is_signed_0,Fail
-Add.Op/input_size_3_weight_size_3_input_channels_120_output_channels_128_stride_2_padding_same_0_is_signed_0,Fail
-Add.Op/input_size_3_weight_size_3_input_channels_120_output_channels_160_stride_2_padding_same_0_is_signed_0,Fail
-Add.Op/input_size_3_weight_size_3_input_channels_120_output_channels_1_stride_2_padding_same_0_is_signed_0,Fail
-Add.Op/input_size_3_weight_size_3_input_channels_120_output_channels_256_stride_2_padding_same_0_is_signed_0,Fail
-Add.Op/input_size_3_weight_size_3_input_channels_120_output_channels_32_stride_2_padding_same_0_is_signed_0,Fail
-Add.Op/input_size_3_weight_size_3_input_channels_128_output_channels_120_stride_2_padding_same_0_is_signed_0,Fail
-Add.Op/input_size_3_weight_size_3_input_channels_128_output_channels_128_stride_2_padding_same_0_is_signed_0,Fail
-Add.Op/input_size_3_weight_size_3_input_channels_128_output_channels_160_stride_2_padding_same_0_is_signed_0,Fail
-Add.Op/input_size_3_weight_size_3_input_channels_128_output_channels_1_stride_2_padding_same_0_is_signed_0,Fail
-Add.Op/input_size_3_weight_size_3_input_channels_128_output_channels_256_stride_2_padding_same_0_is_signed_0,Fail
-Add.Op/input_size_3_weight_size_3_input_channels_128_output_channels_32_stride_2_padding_same_0_is_signed_0,Fail
-Add.Op/input_size_3_weight_size_3_input_channels_256_output_channels_120_stride_2_padding_same_0_is_signed_0,Fail
-Add.Op/input_size_3_weight_size_3_input_channels_256_output_channels_128_stride_2_padding_same_0_is_signed_0,Fail
-Add.Op/input_size_3_weight_size_3_input_channels_256_output_channels_160_stride_2_padding_same_0_is_signed_0,Fail
-Add.Op/input_size_3_weight_size_3_input_channels_256_output_channels_1_stride_2_padding_same_0_is_signed_0,Fail
-Add.Op/input_size_3_weight_size_3_input_channels_256_output_channels_256_stride_2_padding_same_0_is_signed_0,Fail
-Add.Op/input_size_3_weight_size_3_input_channels_256_output_channels_32_stride_2_padding_same_0_is_signed_0,Fail
-Add.Op/input_size_3_weight_size_3_input_channels_32_output_channels_120_stride_2_padding_same_0_is_signed_0,Fail
-Add.Op/input_size_3_weight_size_3_input_channels_32_output_channels_128_stride_2_padding_same_0_is_signed_0,Fail
-Add.Op/input_size_3_weight_size_3_input_channels_32_output_channels_160_stride_2_padding_same_0_is_signed_0,Fail
-Add.Op/input_size_3_weight_size_3_input_channels_32_output_channels_1_stride_2_padding_same_0_is_signed_0,Fail
-Add.Op/input_size_3_weight_size_3_input_channels_32_output_channels_256_stride_2_padding_same_0_is_signed_0,Fail
-Add.Op/input_size_3_weight_size_3_input_channels_32_output_channels_32_stride_2_padding_same_0_is_signed_0,Fail
-Add.Op/input_size_5_weight_size_3_input_channels_120_output_channels_120_stride_2_padding_same_0_is_signed_0,Fail
-Add.Op/input_size_5_weight_size_3_input_channels_120_output_channels_128_stride_2_padding_same_0_is_signed_0,Fail
-Add.Op/input_size_5_weight_size_3_input_channels_120_output_channels_160_stride_2_padding_same_0_is_signed_0,Fail
-Add.Op/input_size_5_weight_size_3_input_channels_120_output_channels_1_stride_2_padding_same_0_is_signed_0,Fail
-Add.Op/input_size_5_weight_size_3_input_channels_120_output_channels_256_stride_2_padding_same_0_is_signed_0,Fail
-Add.Op/input_size_5_weight_size_3_input_channels_120_output_channels_32_stride_2_padding_same_0_is_signed_0,Fail
-Add.Op/input_size_5_weight_size_3_input_channels_128_output_channels_120_stride_2_padding_same_0_is_signed_0,Fail
-Add.Op/input_size_5_weight_size_3_input_channels_128_output_channels_128_stride_2_padding_same_0_is_signed_0,Fail
-Add.Op/input_size_5_weight_size_3_input_channels_128_output_channels_160_stride_2_padding_same_0_is_signed_0,Fail
-Add.Op/input_size_5_weight_size_3_input_channels_128_output_channels_1_stride_2_padding_same_0_is_signed_0,Fail
-Add.Op/input_size_5_weight_size_3_input_channels_128_output_channels_256_stride_2_padding_same_0_is_signed_0,Fail
-Add.Op/input_size_5_weight_size_3_input_channels_128_output_channels_32_stride_2_padding_same_0_is_signed_0,Fail
-Add.Op/input_size_5_weight_size_3_input_channels_256_output_channels_120_stride_2_padding_same_0_is_signed_0,Fail
-Add.Op/input_size_5_weight_size_3_input_channels_256_output_channels_128_stride_2_padding_same_0_is_signed_0,Fail
-Add.Op/input_size_5_weight_size_3_input_channels_256_output_channels_160_stride_2_padding_same_0_is_signed_0,Fail
-Add.Op/input_size_5_weight_size_3_input_channels_256_output_channels_1_stride_2_padding_same_0_is_signed_0,Fail
-Add.Op/input_size_5_weight_size_3_input_channels_256_output_channels_256_stride_2_padding_same_0_is_signed_0,Fail
-Add.Op/input_size_5_weight_size_3_input_channels_256_output_channels_32_stride_2_padding_same_0_is_signed_0,Fail
-Add.Op/input_size_5_weight_size_3_input_channels_32_output_channels_120_stride_2_padding_same_0_is_signed_0,Fail
-Add.Op/input_size_5_weight_size_3_input_channels_32_output_channels_128_stride_2_padding_same_0_is_signed_0,Fail
-Add.Op/input_size_5_weight_size_3_input_channels_32_output_channels_160_stride_2_padding_same_0_is_signed_0,Fail
-Add.Op/input_size_5_weight_size_3_input_channels_32_output_channels_1_stride_2_padding_same_0_is_signed_0,Fail
-Add.Op/input_size_5_weight_size_3_input_channels_32_output_channels_256_stride_2_padding_same_0_is_signed_0,Fail
-Add.Op/input_size_5_weight_size_3_input_channels_32_output_channels_32_stride_2_padding_same_0_is_signed_0,Fail
-Add.Op/input_size_5_weight_size_5_input_channels_120_output_channels_120_stride_2_padding_same_0_is_signed_0,Fail
-Add.Op/input_size_5_weight_size_5_input_channels_120_output_channels_128_stride_2_padding_same_0_is_signed_0,Fail
-Add.Op/input_size_5_weight_size_5_input_channels_120_output_channels_160_stride_2_padding_same_0_is_signed_0,Fail
-Add.Op/input_size_5_weight_size_5_input_channels_120_output_channels_1_stride_2_padding_same_0_is_signed_0,Fail
-Add.Op/input_size_5_weight_size_5_input_channels_120_output_channels_256_stride_2_padding_same_0_is_signed_0,Fail
-Add.Op/input_size_5_weight_size_5_input_channels_120_output_channels_32_stride_2_padding_same_0_is_signed_0,Fail
-Add.Op/input_size_5_weight_size_5_input_channels_128_output_channels_120_stride_2_padding_same_0_is_signed_0,Fail
-Add.Op/input_size_5_weight_size_5_input_channels_128_output_channels_128_stride_2_padding_same_0_is_signed_0,Fail
-Add.Op/input_size_5_weight_size_5_input_channels_128_output_channels_160_stride_2_padding_same_0_is_signed_0,Fail
-Add.Op/input_size_5_weight_size_5_input_channels_128_output_channels_1_stride_2_padding_same_0_is_signed_0,Fail
-Add.Op/input_size_5_weight_size_5_input_channels_128_output_channels_256_stride_2_padding_same_0_is_signed_0,Fail
-Add.Op/input_size_5_weight_size_5_input_channels_128_output_channels_32_stride_2_padding_same_0_is_signed_0,Fail
-Add.Op/input_size_5_weight_size_5_input_channels_1_output_channels_120_stride_1_padding_same_0_is_signed_0,Fail
-Add.Op/input_size_5_weight_size_5_input_channels_1_output_channels_120_stride_1_padding_same_1_is_signed_0,Fail
-Add.Op/input_size_5_weight_size_5_input_channels_1_output_channels_120_stride_2_padding_same_1_is_signed_0,Fail
-Add.Op/input_size_5_weight_size_5_input_channels_1_output_channels_128_stride_1_padding_same_0_is_signed_0,Fail
-Add.Op/input_size_5_weight_size_5_input_channels_1_output_channels_128_stride_1_padding_same_1_is_signed_0,Fail
-Add.Op/input_size_5_weight_size_5_input_channels_1_output_channels_128_stride_2_padding_same_1_is_signed_0,Fail
-Add.Op/input_size_5_weight_size_5_input_channels_1_output_channels_160_stride_1_padding_same_0_is_signed_0,Fail
-Add.Op/input_size_5_weight_size_5_input_channels_1_output_channels_160_stride_1_padding_same_1_is_signed_0,Fail
-Add.Op/input_size_5_weight_size_5_input_channels_1_output_channels_160_stride_2_padding_same_1_is_signed_0,Fail
-Add.Op/input_size_5_weight_size_5_input_channels_1_output_channels_1_stride_1_padding_same_0_is_signed_0,Fail
-Add.Op/input_size_5_weight_size_5_input_channels_1_output_channels_1_stride_1_padding_same_1_is_signed_0,Fail
-Add.Op/input_size_5_weight_size_5_input_channels_1_output_channels_1_stride_2_padding_same_1_is_signed_0,Fail
-Add.Op/input_size_5_weight_size_5_input_channels_1_output_channels_256_stride_1_padding_same_0_is_signed_0,Fail
-Add.Op/input_size_5_weight_size_5_input_channels_1_output_channels_256_stride_1_padding_same_1_is_signed_0,Fail
-Add.Op/input_size_5_weight_size_5_input_channels_1_output_channels_256_stride_2_padding_same_1_is_signed_0,Fail
-Add.Op/input_size_5_weight_size_5_input_channels_1_output_channels_32_stride_1_padding_same_0_is_signed_0,Fail
-Add.Op/input_size_5_weight_size_5_input_channels_1_output_channels_32_stride_1_padding_same_1_is_signed_0,Fail
-Add.Op/input_size_5_weight_size_5_input_channels_1_output_channels_32_stride_2_padding_same_1_is_signed_0,Fail
-Add.Op/input_size_5_weight_size_5_input_channels_256_output_channels_120_stride_2_padding_same_0_is_signed_0,Fail
-Add.Op/input_size_5_weight_size_5_input_channels_256_output_channels_128_stride_2_padding_same_0_is_signed_0,Fail
-Add.Op/input_size_5_weight_size_5_input_channels_256_output_channels_160_stride_2_padding_same_0_is_signed_0,Fail
-Add.Op/input_size_5_weight_size_5_input_channels_256_output_channels_1_stride_2_padding_same_0_is_signed_0,Fail
-Add.Op/input_size_5_weight_size_5_input_channels_256_output_channels_256_stride_2_padding_same_0_is_signed_0,Fail
-Add.Op/input_size_5_weight_size_5_input_channels_256_output_channels_32_stride_2_padding_same_0_is_signed_0,Fail
-Add.Op/input_size_5_weight_size_5_input_channels_32_output_channels_120_stride_2_padding_same_0_is_signed_0,Fail
-Add.Op/input_size_5_weight_size_5_input_channels_32_output_channels_128_stride_2_padding_same_0_is_signed_0,Fail
-Add.Op/input_size_5_weight_size_5_input_channels_32_output_channels_160_stride_2_padding_same_0_is_signed_0,Fail
-Add.Op/input_size_5_weight_size_5_input_channels_32_output_channels_1_stride_2_padding_same_0_is_signed_0,Fail
-Add.Op/input_size_5_weight_size_5_input_channels_32_output_channels_256_stride_1_padding_same_1_is_signed_0,Fail
-Add.Op/input_size_5_weight_size_5_input_channels_32_output_channels_256_stride_2_padding_same_0_is_signed_0,Fail
-Add.Op/input_size_5_weight_size_5_input_channels_32_output_channels_256_stride_2_padding_same_1_is_signed_0,Fail
-Add.Op/input_size_5_weight_size_5_input_channels_32_output_channels_32_stride_2_padding_same_0_is_signed_0,Fail
 Add.Op/input_size_112_weight_size_1_input_channels_120_output_channels_120_stride_1_padding_same_0_is_signed_0,Fail
 Add.Op/input_size_112_weight_size_1_input_channels_120_output_channels_120_stride_1_padding_same_1_is_signed_0,Fail
 Add.Op/input_size_112_weight_size_1_input_channels_120_output_channels_128_stride_1_padding_same_0_is_signed_0,Fail
@@ -336,20 +127,15 @@ Add.Op/input_size_112_weight_size_5_input_channels_128_output_channels_256_strid
 Add.Op/input_size_112_weight_size_5_input_channels_128_output_channels_256_stride_2_padding_same_1_is_signed_0,Fail
 Add.Op/input_size_112_weight_size_5_input_channels_1_output_channels_120_stride_1_padding_same_0_is_signed_0,Fail
 Add.Op/input_size_112_weight_size_5_input_channels_1_output_channels_120_stride_1_padding_same_1_is_signed_0,Fail
-Add.Op/input_size_112_weight_size_5_input_channels_1_output_channels_120_stride_2_padding_same_1_is_signed_0,Fail
 Add.Op/input_size_112_weight_size_5_input_channels_1_output_channels_128_stride_1_padding_same_0_is_signed_0,Fail
 Add.Op/input_size_112_weight_size_5_input_channels_1_output_channels_128_stride_1_padding_same_1_is_signed_0,Fail
-Add.Op/input_size_112_weight_size_5_input_channels_1_output_channels_128_stride_2_padding_same_1_is_signed_0,Fail
 Add.Op/input_size_112_weight_size_5_input_channels_1_output_channels_160_stride_1_padding_same_0_is_signed_0,Fail
 Add.Op/input_size_112_weight_size_5_input_channels_1_output_channels_160_stride_1_padding_same_1_is_signed_0,Fail
 Add.Op/input_size_112_weight_size_5_input_channels_1_output_channels_160_stride_2_padding_same_0_is_signed_0,Fail
-Add.Op/input_size_112_weight_size_5_input_channels_1_output_channels_160_stride_2_padding_same_1_is_signed_0,Fail
-Add.Op/input_size_112_weight_size_5_input_channels_1_output_channels_1_stride_2_padding_same_1_is_signed_0,Fail
 Add.Op/input_size_112_weight_size_5_input_channels_1_output_channels_256_stride_1_padding_same_0_is_signed_0,Fail
 Add.Op/input_size_112_weight_size_5_input_channels_1_output_channels_256_stride_1_padding_same_1_is_signed_0,Fail
 Add.Op/input_size_112_weight_size_5_input_channels_1_output_channels_256_stride_2_padding_same_0_is_signed_0,Fail
 Add.Op/input_size_112_weight_size_5_input_channels_1_output_channels_256_stride_2_padding_same_1_is_signed_0,Fail
-Add.Op/input_size_112_weight_size_5_input_channels_1_output_channels_32_stride_2_padding_same_1_is_signed_0,Fail
 Add.Op/input_size_112_weight_size_5_input_channels_256_output_channels_120_stride_1_padding_same_0_is_signed_0,Fail
 Add.Op/input_size_112_weight_size_5_input_channels_256_output_channels_120_stride_1_padding_same_1_is_signed_0,Fail
 Add.Op/input_size_112_weight_size_5_input_channels_256_output_channels_128_stride_1_padding_same_0_is_signed_0,Fail
@@ -372,6 +158,20 @@ Add.Op/input_size_112_weight_size_5_input_channels_32_output_channels_256_stride
 Add.Op/input_size_112_weight_size_5_input_channels_32_output_channels_256_stride_1_padding_same_1_is_signed_0,Fail
 Add.Op/input_size_112_weight_size_5_input_channels_32_output_channels_256_stride_2_padding_same_0_is_signed_0,Fail
 Add.Op/input_size_112_weight_size_5_input_channels_32_output_channels_256_stride_2_padding_same_1_is_signed_0,Fail
+Add.Op/input_size_5_weight_size_5_input_channels_1_output_channels_120_stride_1_padding_same_0_is_signed_0,Fail
+Add.Op/input_size_5_weight_size_5_input_channels_1_output_channels_120_stride_1_padding_same_1_is_signed_0,Fail
+Add.Op/input_size_5_weight_size_5_input_channels_1_output_channels_128_stride_1_padding_same_0_is_signed_0,Fail
+Add.Op/input_size_5_weight_size_5_input_channels_1_output_channels_128_stride_1_padding_same_1_is_signed_0,Fail
+Add.Op/input_size_5_weight_size_5_input_channels_1_output_channels_160_stride_1_padding_same_0_is_signed_0,Fail
+Add.Op/input_size_5_weight_size_5_input_channels_1_output_channels_160_stride_1_padding_same_1_is_signed_0,Fail
+Add.Op/input_size_5_weight_size_5_input_channels_1_output_channels_1_stride_1_padding_same_0_is_signed_0,Fail
+Add.Op/input_size_5_weight_size_5_input_channels_1_output_channels_1_stride_1_padding_same_1_is_signed_0,Fail
+Add.Op/input_size_5_weight_size_5_input_channels_1_output_channels_256_stride_1_padding_same_0_is_signed_0,Fail
+Add.Op/input_size_5_weight_size_5_input_channels_1_output_channels_256_stride_1_padding_same_1_is_signed_0,Fail
+Add.Op/input_size_5_weight_size_5_input_channels_1_output_channels_32_stride_1_padding_same_0_is_signed_0,Fail
+Add.Op/input_size_5_weight_size_5_input_channels_1_output_channels_32_stride_1_padding_same_1_is_signed_0,Fail
+Add.Op/input_size_5_weight_size_5_input_channels_32_output_channels_256_stride_1_padding_same_1_is_signed_0,Fail
+Add.Op/input_size_5_weight_size_5_input_channels_32_output_channels_256_stride_2_padding_same_1_is_signed_0,Fail
 Add.Op/input_size_80_weight_size_1_input_channels_120_output_channels_256_stride_1_padding_same_0_is_signed_0,Fail
 Add.Op/input_size_80_weight_size_1_input_channels_120_output_channels_256_stride_1_padding_same_1_is_signed_0,Fail
 Add.Op/input_size_80_weight_size_1_input_channels_128_output_channels_256_stride_1_padding_same_0_is_signed_0,Fail
@@ -426,17 +226,11 @@ Add.Op/input_size_80_weight_size_5_input_channels_128_output_channels_256_stride
 Add.Op/input_size_80_weight_size_5_input_channels_128_output_channels_256_stride_1_padding_same_1_is_signed_0,Fail
 Add.Op/input_size_80_weight_size_5_input_channels_128_output_channels_256_stride_2_padding_same_0_is_signed_0,Fail
 Add.Op/input_size_80_weight_size_5_input_channels_1_output_channels_120_stride_1_padding_same_0_is_signed_0,Fail
-Add.Op/input_size_80_weight_size_5_input_channels_1_output_channels_120_stride_2_padding_same_1_is_signed_0,Fail
 Add.Op/input_size_80_weight_size_5_input_channels_1_output_channels_128_stride_1_padding_same_0_is_signed_0,Fail
-Add.Op/input_size_80_weight_size_5_input_channels_1_output_channels_128_stride_2_padding_same_1_is_signed_0,Fail
 Add.Op/input_size_80_weight_size_5_input_channels_1_output_channels_160_stride_1_padding_same_0_is_signed_0,Fail
-Add.Op/input_size_80_weight_size_5_input_channels_1_output_channels_160_stride_2_padding_same_1_is_signed_0,Fail
-Add.Op/input_size_80_weight_size_5_input_channels_1_output_channels_1_stride_2_padding_same_1_is_signed_0,Fail
 Add.Op/input_size_80_weight_size_5_input_channels_1_output_channels_256_stride_1_padding_same_0_is_signed_0,Fail
 Add.Op/input_size_80_weight_size_5_input_channels_1_output_channels_256_stride_1_padding_same_1_is_signed_0,Fail
 Add.Op/input_size_80_weight_size_5_input_channels_1_output_channels_256_stride_2_padding_same_0_is_signed_0,Fail
-Add.Op/input_size_80_weight_size_5_input_channels_1_output_channels_256_stride_2_padding_same_1_is_signed_0,Fail
-Add.Op/input_size_80_weight_size_5_input_channels_1_output_channels_32_stride_2_padding_same_1_is_signed_0,Fail
 Add.Op/input_size_80_weight_size_5_input_channels_256_output_channels_120_stride_1_padding_same_0_is_signed_0,Fail
 Add.Op/input_size_80_weight_size_5_input_channels_256_output_channels_128_stride_1_padding_same_0_is_signed_0,Fail
 Add.Op/input_size_80_weight_size_5_input_channels_256_output_channels_160_stride_1_padding_same_0_is_signed_0,Fail
@@ -449,6 +243,8 @@ Add.Op/input_size_80_weight_size_5_input_channels_32_output_channels_160_stride_
 Add.Op/input_size_80_weight_size_5_input_channels_32_output_channels_256_stride_1_padding_same_0_is_signed_0,Fail
 Add.Op/input_size_80_weight_size_5_input_channels_32_output_channels_256_stride_1_padding_same_1_is_signed_0,Fail
 Add.Op/input_size_80_weight_size_5_input_channels_32_output_channels_256_stride_2_padding_same_0_is_signed_0,Fail
+Add.Op/input_size_8_weight_size_3_input_channels_128_output_channels_160_stride_1_padding_same_1_is_signed_0,Fail
+Add.Op/input_size_8_weight_size_5_input_channels_120_output_channels_160_stride_2_padding_same_0_is_signed_0,Fail
 Add.Op/input_size_8_weight_size_5_input_channels_1_output_channels_120_stride_1_padding_same_0_is_signed_0,Fail
 Add.Op/input_size_8_weight_size_5_input_channels_1_output_channels_120_stride_1_padding_same_1_is_signed_0,Fail
 Add.Op/input_size_8_weight_size_5_input_channels_1_output_channels_128_stride_1_padding_same_0_is_signed_0,Fail
@@ -461,16 +257,34 @@ Add.Op/input_size_8_weight_size_5_input_channels_1_output_channels_256_stride_1_
 Add.Op/input_size_8_weight_size_5_input_channels_1_output_channels_256_stride_1_padding_same_1_is_signed_0,Fail
 Add.Op/input_size_8_weight_size_5_input_channels_1_output_channels_32_stride_1_padding_same_0_is_signed_0,Fail
 Add.Op/input_size_8_weight_size_5_input_channels_1_output_channels_32_stride_1_padding_same_1_is_signed_0,Fail
-DepthwiseConv2D.Op/input_size_3_weight_size_3_channels_120_stride_2_padding_same_0_is_signed_0,Fail
-DepthwiseConv2D.Op/input_size_3_weight_size_3_channels_128_stride_2_padding_same_0_is_signed_0,Fail
-DepthwiseConv2D.Op/input_size_3_weight_size_3_channels_256_stride_2_padding_same_0_is_signed_0,Fail
-DepthwiseConv2D.Op/input_size_3_weight_size_3_channels_32_stride_2_padding_same_0_is_signed_0,Fail
-DepthwiseConv2D.Op/input_size_5_weight_size_3_channels_120_stride_2_padding_same_0_is_signed_0,Fail
-DepthwiseConv2D.Op/input_size_5_weight_size_3_channels_128_stride_2_padding_same_0_is_signed_0,Fail
-DepthwiseConv2D.Op/input_size_5_weight_size_3_channels_256_stride_2_padding_same_0_is_signed_0,Fail
-DepthwiseConv2D.Op/input_size_5_weight_size_3_channels_32_stride_2_padding_same_0_is_signed_0,Fail
-DepthwiseConv2D.Op/input_size_5_weight_size_5_channels_120_stride_2_padding_same_0_is_signed_0,Fail
-DepthwiseConv2D.Op/input_size_5_weight_size_5_channels_128_stride_2_padding_same_0_is_signed_0,Fail
+Conv2D.Op/input_size_112_weight_size_1_input_channels_128_output_channels_256_stride_1_padding_same_0_is_signed_0,Fail
+Conv2D.Op/input_size_112_weight_size_5_input_channels_256_output_channels_120_stride_1_padding_same_0_is_signed_0,Fail
+Conv2D.Op/input_size_112_weight_size_5_input_channels_256_output_channels_120_stride_1_padding_same_1_is_signed_0,Fail
+Conv2D.Op/input_size_5_weight_size_5_input_channels_1_output_channels_120_stride_1_padding_same_0_is_signed_0,Fail
+Conv2D.Op/input_size_5_weight_size_5_input_channels_1_output_channels_120_stride_1_padding_same_1_is_signed_0,Fail
+Conv2D.Op/input_size_5_weight_size_5_input_channels_1_output_channels_128_stride_1_padding_same_0_is_signed_0,Fail
+Conv2D.Op/input_size_5_weight_size_5_input_channels_1_output_channels_128_stride_1_padding_same_1_is_signed_0,Fail
+Conv2D.Op/input_size_5_weight_size_5_input_channels_1_output_channels_160_stride_1_padding_same_0_is_signed_0,Fail
+Conv2D.Op/input_size_5_weight_size_5_input_channels_1_output_channels_160_stride_1_padding_same_1_is_signed_0,Fail
+Conv2D.Op/input_size_5_weight_size_5_input_channels_1_output_channels_1_stride_1_padding_same_1_is_signed_0,Fail
+Conv2D.Op/input_size_5_weight_size_5_input_channels_1_output_channels_256_stride_1_padding_same_0_is_signed_0,Fail
+Conv2D.Op/input_size_5_weight_size_5_input_channels_1_output_channels_256_stride_1_padding_same_1_is_signed_0,Fail
+Conv2D.Op/input_size_5_weight_size_5_input_channels_1_output_channels_32_stride_1_padding_same_0_is_signed_0,Fail
+Conv2D.Op/input_size_5_weight_size_5_input_channels_1_output_channels_32_stride_1_padding_same_1_is_signed_0,Fail
+Conv2D.Op/input_size_8_weight_size_5_input_channels_1_output_channels_120_stride_1_padding_same_0_is_signed_0,Fail
+Conv2D.Op/input_size_8_weight_size_5_input_channels_1_output_channels_120_stride_1_padding_same_1_is_signed_0,Fail
+Conv2D.Op/input_size_8_weight_size_5_input_channels_1_output_channels_128_stride_1_padding_same_0_is_signed_0,Fail
+Conv2D.Op/input_size_8_weight_size_5_input_channels_1_output_channels_128_stride_1_padding_same_1_is_signed_0,Fail
+Conv2D.Op/input_size_8_weight_size_5_input_channels_1_output_channels_160_stride_1_padding_same_0_is_signed_0,Fail
+Conv2D.Op/input_size_8_weight_size_5_input_channels_1_output_channels_160_stride_1_padding_same_1_is_signed_0,Fail
+Conv2D.Op/input_size_8_weight_size_5_input_channels_1_output_channels_1_stride_1_padding_same_0_is_signed_0,Fail
+Conv2D.Op/input_size_8_weight_size_5_input_channels_1_output_channels_1_stride_1_padding_same_1_is_signed_0,Fail
+Conv2D.Op/input_size_8_weight_size_5_input_channels_1_output_channels_256_stride_1_padding_same_0_is_signed_0,Fail
+Conv2D.Op/input_size_8_weight_size_5_input_channels_1_output_channels_256_stride_1_padding_same_1_is_signed_0,Fail
+Conv2D.Op/input_size_8_weight_size_5_input_channels_1_output_channels_32_stride_1_padding_same_0_is_signed_0,Fail
+Conv2D.Op/input_size_8_weight_size_5_input_channels_1_output_channels_32_stride_1_padding_same_1_is_signed_0,Fail
+DepthwiseConv2D.Op/input_size_5_weight_size_5_channels_120_stride_2_padding_same_1_is_signed_0,Fail
+DepthwiseConv2D.Op/input_size_5_weight_size_5_channels_128_stride_2_padding_same_1_is_signed_0,Fail
 DepthwiseConv2D.Op/input_size_5_weight_size_5_channels_1_stride_2_padding_same_1_is_signed_0,Fail
-DepthwiseConv2D.Op/input_size_5_weight_size_5_channels_256_stride_2_padding_same_0_is_signed_0,Fail
-DepthwiseConv2D.Op/input_size_5_weight_size_5_channels_32_stride_2_padding_same_0_is_signed_0,Fail
+DepthwiseConv2D.Op/input_size_5_weight_size_5_channels_256_stride_2_padding_same_1_is_signed_0,Fail
+DepthwiseConv2D.Op/input_size_5_weight_size_5_channels_32_stride_2_padding_same_1_is_signed_0,Fail