diff --git a/src/amd/common/ac_nir_lower_tex.c b/src/amd/common/ac_nir_lower_tex.c index ea266c09f75..ffe848c621d 100644 --- a/src/amd/common/ac_nir_lower_tex.c +++ b/src/amd/common/ac_nir_lower_tex.c @@ -234,7 +234,8 @@ can_move_coord(nir_scalar scalar, coord_info *info) return false; nir_intrinsic_instr *intrin = nir_instr_as_intrinsic(scalar.def->parent_instr); - if (intrin->intrinsic == nir_intrinsic_load_input) { + if (intrin->intrinsic == nir_intrinsic_load_input || + intrin->intrinsic == nir_intrinsic_load_per_primitive_input) { info->bary = NULL; info->load = intrin; return true; diff --git a/src/amd/compiler/aco_instruction_selection.cpp b/src/amd/compiler/aco_instruction_selection.cpp index eb8147886cd..da97551d42f 100644 --- a/src/amd/compiler/aco_instruction_selection.cpp +++ b/src/amd/compiler/aco_instruction_selection.cpp @@ -8410,6 +8410,7 @@ visit_intrinsic(isel_context* ctx, nir_intrinsic_instr* instr) case nir_intrinsic_load_interpolated_input: visit_load_interpolated_input(ctx, instr); break; case nir_intrinsic_store_output: visit_store_output(ctx, instr); break; case nir_intrinsic_load_input: + case nir_intrinsic_load_per_primitive_input: case nir_intrinsic_load_input_vertex: if (ctx->program->stage == fragment_fs) visit_load_fs_input(ctx, instr); diff --git a/src/amd/compiler/aco_instruction_selection_setup.cpp b/src/amd/compiler/aco_instruction_selection_setup.cpp index 5c992b04706..9d845acd33a 100644 --- a/src/amd/compiler/aco_instruction_selection_setup.cpp +++ b/src/amd/compiler/aco_instruction_selection_setup.cpp @@ -458,6 +458,7 @@ init_context(isel_context* ctx, nir_shader* shader) case nir_intrinsic_unit_test_uniform_amd: type = RegType::sgpr; break; case nir_intrinsic_load_sample_id: case nir_intrinsic_load_input: + case nir_intrinsic_load_per_primitive_input: case nir_intrinsic_load_output: case nir_intrinsic_load_input_vertex: case nir_intrinsic_load_per_vertex_input: diff --git a/src/amd/llvm/ac_nir_to_llvm.c b/src/amd/llvm/ac_nir_to_llvm.c index d090f326460..f5e12a7dbce 100644 --- a/src/amd/llvm/ac_nir_to_llvm.c +++ b/src/amd/llvm/ac_nir_to_llvm.c @@ -3072,6 +3072,7 @@ static bool visit_intrinsic(struct ac_nir_context *ctx, nir_intrinsic_instr *ins result = visit_get_ssbo_size(ctx, instr); break; case nir_intrinsic_load_input: + case nir_intrinsic_load_per_primitive_input: case nir_intrinsic_load_input_vertex: case nir_intrinsic_load_per_vertex_input: result = visit_load(ctx, instr); diff --git a/src/amd/vulkan/radv_shader_info.c b/src/amd/vulkan/radv_shader_info.c index 776bc99ac77..742e6f3dc4f 100644 --- a/src/amd/vulkan/radv_shader_info.c +++ b/src/amd/vulkan/radv_shader_info.c @@ -294,6 +294,7 @@ gather_intrinsic_info(const nir_shader *nir, const nir_intrinsic_instr *instr, s break; } case nir_intrinsic_load_input: + case nir_intrinsic_load_per_primitive_input: case nir_intrinsic_load_interpolated_input: case nir_intrinsic_load_input_vertex: gather_intrinsic_load_input_info(nir, instr, info, gfx_state, stage_key); diff --git a/src/compiler/nir/nir.c b/src/compiler/nir/nir.c index 85eaad4ce24..b7826b79c50 100644 --- a/src/compiler/nir/nir.c +++ b/src/compiler/nir/nir.c @@ -3008,6 +3008,7 @@ nir_intrinsic_instr_dest_type(const nir_intrinsic_instr *intrin) } case nir_intrinsic_load_input: + case nir_intrinsic_load_per_primitive_input: case nir_intrinsic_load_uniform: return nir_intrinsic_dest_type(intrin); diff --git a/src/compiler/nir/nir.h b/src/compiler/nir/nir.h index 60d193953ad..7a80fc8fb5d 100644 --- a/src/compiler/nir/nir.h +++ b/src/compiler/nir/nir.h @@ -2017,9 +2017,7 @@ typedef struct nir_io_semantics { unsigned no_sysval_output : 1; /* whether this system value output has no effect due to current pipeline states */ unsigned interp_explicit_strict : 1; /* preserve original vertex order */ - unsigned per_primitive : 1; /* Per-primitive FS input (when FS is used with a mesh shader). - Note that per-primitive MS outputs are implied by - using a dedicated intrinsic, store_per_primitive_output. */ + unsigned _pad : 1; } nir_io_semantics; /* Transform feedback info for 2 outputs. nir_intrinsic_store_output contains diff --git a/src/compiler/nir/nir_divergence_analysis.c b/src/compiler/nir/nir_divergence_analysis.c index 7d248188c3a..85abd5be005 100644 --- a/src/compiler/nir/nir_divergence_analysis.c +++ b/src/compiler/nir/nir_divergence_analysis.c @@ -289,6 +289,7 @@ visit_intrinsic(nir_intrinsic_instr *instr, struct divergence_state *state) is_divergent = !(options & nir_divergence_single_frag_shading_rate_per_subgroup); break; case nir_intrinsic_load_input: + case nir_intrinsic_load_per_primitive_input: is_divergent = instr->src[0].ssa->divergent; if (stage == MESA_SHADER_FRAGMENT) { diff --git a/src/compiler/nir/nir_gather_info.c b/src/compiler/nir/nir_gather_info.c index 29ba638374f..0425745b7c3 100644 --- a/src/compiler/nir/nir_gather_info.c +++ b/src/compiler/nir/nir_gather_info.c @@ -539,6 +539,7 @@ gather_intrinsic_info(nir_intrinsic_instr *instr, nir_shader *shader, case nir_intrinsic_load_per_vertex_input: case nir_intrinsic_load_input_vertex: case nir_intrinsic_load_interpolated_input: + case nir_intrinsic_load_per_primitive_input: if (shader->info.stage == MESA_SHADER_TESS_EVAL && instr->intrinsic == nir_intrinsic_load_input && !is_patch_special) { @@ -549,7 +550,7 @@ gather_intrinsic_info(nir_intrinsic_instr *instr, nir_shader *shader, shader->info.inputs_read |= slot_mask; if (nir_intrinsic_io_semantics(instr).high_dvec2) shader->info.dual_slot_inputs |= slot_mask; - if (nir_intrinsic_io_semantics(instr).per_primitive) + if (instr->intrinsic == nir_intrinsic_load_per_primitive_input) shader->info.per_primitive_inputs |= slot_mask; shader->info.inputs_read_16bit |= slot_mask_16bit; if (!nir_src_is_const(*nir_get_io_offset_src(instr))) { diff --git a/src/compiler/nir/nir_intrinsics.py b/src/compiler/nir/nir_intrinsics.py index 17b872a83ce..c632b96079f 100644 --- a/src/compiler/nir/nir_intrinsics.py +++ b/src/compiler/nir/nir_intrinsics.py @@ -1137,6 +1137,8 @@ load("input_vertex", [1, 1], [BASE, COMPONENT, DEST_TYPE, IO_SEMANTICS], [CAN_EL load("per_vertex_input", [1, 1], [BASE, RANGE, COMPONENT, DEST_TYPE, IO_SEMANTICS], [CAN_ELIMINATE, CAN_REORDER]) # src[] = { barycoord, offset }. load("interpolated_input", [2, 1], [BASE, COMPONENT, DEST_TYPE, IO_SEMANTICS], [CAN_ELIMINATE, CAN_REORDER]) +# src[] = { offset }. +load("per_primitive_input", [1], [BASE, COMPONENT, DEST_TYPE, IO_SEMANTICS], [CAN_ELIMINATE, CAN_REORDER]) # src[] = { buffer_index, offset }. load("ssbo", [-1, 1], [ACCESS, ALIGN_MUL, ALIGN_OFFSET], [CAN_ELIMINATE]) diff --git a/src/compiler/nir/nir_lower_io.c b/src/compiler/nir/nir_lower_io.c index 4d0b2f93a3a..f2f407fb23a 100644 --- a/src/compiler/nir/nir_lower_io.c +++ b/src/compiler/nir/nir_lower_io.c @@ -320,7 +320,12 @@ emit_load(struct lower_io_state *state, op = nir_intrinsic_load_interpolated_input; } } else { - op = array_index ? nir_intrinsic_load_per_vertex_input : nir_intrinsic_load_input; + if (var->data.per_primitive) + op = nir_intrinsic_load_per_primitive_input; + else if (array_index) + op = nir_intrinsic_load_per_vertex_input; + else + op = nir_intrinsic_load_input; } break; case nir_var_shader_out: @@ -363,7 +368,6 @@ emit_load(struct lower_io_state *state, semantics.fb_fetch_output = var->data.fb_fetch_output; semantics.medium_precision = is_medium_precision(b->shader, var); semantics.high_dvec2 = high_dvec2; - semantics.per_primitive = var->data.per_primitive; /* "per_vertex" is misnamed. It means "explicit interpolation with * the original vertex order", which is a stricter version of * INTERP_MODE_EXPLICIT. @@ -2741,6 +2745,7 @@ nir_get_io_offset_src_number(const nir_intrinsic_instr *instr) { switch (instr->intrinsic) { case nir_intrinsic_load_input: + case nir_intrinsic_load_per_primitive_input: case nir_intrinsic_load_output: case nir_intrinsic_load_shared: case nir_intrinsic_load_task_payload: @@ -2941,6 +2946,7 @@ static bool is_input(nir_intrinsic_instr *intrin) { return intrin->intrinsic == nir_intrinsic_load_input || + intrin->intrinsic == nir_intrinsic_load_per_primitive_input || intrin->intrinsic == nir_intrinsic_load_input_vertex || intrin->intrinsic == nir_intrinsic_load_per_vertex_input || intrin->intrinsic == nir_intrinsic_load_interpolated_input || diff --git a/src/compiler/nir/nir_lower_io_to_scalar.c b/src/compiler/nir/nir_lower_io_to_scalar.c index d71e212413d..fe28722bd50 100644 --- a/src/compiler/nir/nir_lower_io_to_scalar.c +++ b/src/compiler/nir/nir_lower_io_to_scalar.c @@ -278,6 +278,7 @@ nir_lower_io_to_scalar_instr(nir_builder *b, nir_instr *instr, void *data) return false; if ((intr->intrinsic == nir_intrinsic_load_input || + intr->intrinsic == nir_intrinsic_load_per_primitive_input || intr->intrinsic == nir_intrinsic_load_per_vertex_input || intr->intrinsic == nir_intrinsic_load_interpolated_input || intr->intrinsic == nir_intrinsic_load_input_vertex) && diff --git a/src/compiler/nir/nir_lower_mediump.c b/src/compiler/nir/nir_lower_mediump.c index 9b9b936e75d..7d51a6d7e48 100644 --- a/src/compiler/nir/nir_lower_mediump.c +++ b/src/compiler/nir/nir_lower_mediump.c @@ -39,6 +39,7 @@ get_io_intrinsic(nir_instr *instr, nir_variable_mode modes, switch (intr->intrinsic) { case nir_intrinsic_load_input: + case nir_intrinsic_load_per_primitive_input: case nir_intrinsic_load_input_vertex: case nir_intrinsic_load_interpolated_input: case nir_intrinsic_load_per_vertex_input: @@ -90,7 +91,7 @@ nir_recompute_io_bases(nir_shader *nir, nir_variable_mode modes) if (mode == nir_var_shader_in) { for (unsigned i = 0; i < num_slots; i++) { - if (sem.per_primitive) + if (intr->intrinsic == nir_intrinsic_load_per_primitive_input) BITSET_SET(per_prim_inputs, sem.location + i); else BITSET_SET(inputs, sem.location + i); @@ -123,7 +124,7 @@ nir_recompute_io_bases(nir_shader *nir, nir_variable_mode modes) num_slots = (num_slots + sem.high_16bits + 1) / 2; if (mode == nir_var_shader_in) { - if (sem.per_primitive) { + if (intr->intrinsic == nir_intrinsic_load_per_primitive_input) { nir_intrinsic_set_base(intr, num_normal_inputs + BITSET_PREFIX_SUM(per_prim_inputs, sem.location)); diff --git a/src/compiler/nir/nir_lower_phis_to_scalar.c b/src/compiler/nir/nir_lower_phis_to_scalar.c index c6bd516e845..e4245ea251b 100644 --- a/src/compiler/nir/nir_lower_phis_to_scalar.c +++ b/src/compiler/nir/nir_lower_phis_to_scalar.c @@ -101,6 +101,7 @@ is_phi_src_scalarizable(nir_phi_src *src, case nir_intrinsic_load_global: case nir_intrinsic_load_global_constant: case nir_intrinsic_load_input: + case nir_intrinsic_load_per_primitive_input: return true; default: break; diff --git a/src/compiler/nir/nir_lower_system_values.c b/src/compiler/nir/nir_lower_system_values.c index bcc414a1b52..f33fe3ba0e9 100644 --- a/src/compiler/nir/nir_lower_system_values.c +++ b/src/compiler/nir/nir_lower_system_values.c @@ -147,6 +147,7 @@ lower_system_value_instr(nir_builder *b, nir_instr *instr, void *_state) } case nir_intrinsic_load_input: + case nir_intrinsic_load_per_primitive_input: if (b->shader->options->lower_layer_fs_input_to_sysval && b->shader->info.stage == MESA_SHADER_FRAGMENT && nir_intrinsic_io_semantics(intrin).location == VARYING_SLOT_LAYER) diff --git a/src/compiler/nir/nir_opt_gcm.c b/src/compiler/nir/nir_opt_gcm.c index 1e76dca8984..7ecabb7365a 100644 --- a/src/compiler/nir/nir_opt_gcm.c +++ b/src/compiler/nir/nir_opt_gcm.c @@ -211,6 +211,7 @@ is_src_scalarizable(nir_src *src) case nir_intrinsic_load_global: case nir_intrinsic_load_global_constant: case nir_intrinsic_load_input: + case nir_intrinsic_load_per_primitive_input: return true; default: break; diff --git a/src/compiler/nir/nir_opt_shrink_vectors.c b/src/compiler/nir/nir_opt_shrink_vectors.c index ce6239eb791..7f38a8cd352 100644 --- a/src/compiler/nir/nir_opt_shrink_vectors.c +++ b/src/compiler/nir/nir_opt_shrink_vectors.c @@ -312,6 +312,7 @@ opt_shrink_vectors_intrinsic(nir_builder *b, nir_intrinsic_instr *instr, case nir_intrinsic_load_uniform: case nir_intrinsic_load_ubo: case nir_intrinsic_load_input: + case nir_intrinsic_load_per_primitive_input: case nir_intrinsic_load_input_vertex: case nir_intrinsic_load_per_vertex_input: case nir_intrinsic_load_interpolated_input: diff --git a/src/compiler/nir/nir_opt_sink.c b/src/compiler/nir/nir_opt_sink.c index 126a9d5fe2c..058f01b0c96 100644 --- a/src/compiler/nir/nir_opt_sink.c +++ b/src/compiler/nir/nir_opt_sink.c @@ -105,6 +105,7 @@ nir_can_move_instr(nir_instr *instr, nir_move_options options) case nir_intrinsic_load_ssbo: return (options & nir_move_load_ssbo) && nir_intrinsic_can_reorder(intrin); case nir_intrinsic_load_input: + case nir_intrinsic_load_per_primitive_input: case nir_intrinsic_load_interpolated_input: case nir_intrinsic_load_per_vertex_input: case nir_intrinsic_load_frag_coord: diff --git a/src/compiler/nir/nir_opt_varyings.c b/src/compiler/nir/nir_opt_varyings.c index 359b83c041b..79e8d909553 100644 --- a/src/compiler/nir/nir_opt_varyings.c +++ b/src/compiler/nir/nir_opt_varyings.c @@ -1090,6 +1090,7 @@ gather_inputs(struct nir_builder *builder, nir_intrinsic_instr *intr, void *cb_d if (intr->intrinsic != nir_intrinsic_load_input && intr->intrinsic != nir_intrinsic_load_per_vertex_input && + intr->intrinsic != nir_intrinsic_load_per_primitive_input && intr->intrinsic != nir_intrinsic_load_interpolated_input && intr->intrinsic != nir_intrinsic_load_input_vertex) return false; @@ -1127,10 +1128,10 @@ gather_inputs(struct nir_builder *builder, nir_intrinsic_instr *intr, void *cb_d if (linkage->consumer_stage == MESA_SHADER_FRAGMENT) { switch (intr->intrinsic) { case nir_intrinsic_load_input: - if (sem.per_primitive) - fs_vec4_type = FS_VEC4_TYPE_PER_PRIMITIVE; - else - fs_vec4_type = FS_VEC4_TYPE_FLAT; + fs_vec4_type = FS_VEC4_TYPE_FLAT; + break; + case nir_intrinsic_load_per_primitive_input: + fs_vec4_type = FS_VEC4_TYPE_PER_PRIMITIVE; break; case nir_intrinsic_load_input_vertex: if (sem.interp_explicit_strict) @@ -1176,19 +1177,20 @@ gather_inputs(struct nir_builder *builder, nir_intrinsic_instr *intr, void *cb_d if (linkage->consumer_stage == MESA_SHADER_FRAGMENT) { switch (intr->intrinsic) { case nir_intrinsic_load_input: - if (intr->def.bit_size == 32) { - if (sem.per_primitive) - BITSET_SET(linkage->per_primitive32_mask, slot); - else - BITSET_SET(linkage->flat32_mask, slot); - } else if (intr->def.bit_size == 16) { - if (sem.per_primitive) - BITSET_SET(linkage->per_primitive16_mask, slot); - else - BITSET_SET(linkage->flat16_mask, slot); - } else { + if (intr->def.bit_size == 32) + BITSET_SET(linkage->flat32_mask, slot); + else if (intr->def.bit_size == 16) + BITSET_SET(linkage->flat16_mask, slot); + else + unreachable("invalid load_input type"); + break; + case nir_intrinsic_load_per_primitive_input: + if (intr->def.bit_size == 32) + BITSET_SET(linkage->per_primitive32_mask, slot); + else if (intr->def.bit_size == 16) + BITSET_SET(linkage->per_primitive16_mask, slot); + else unreachable("invalid load_input type"); - } break; case nir_intrinsic_load_input_vertex: if (sem.interp_explicit_strict) { @@ -2009,6 +2011,7 @@ clone_ssa(struct linkage_info *linkage, nir_builder *b, nir_def *ssa) } case nir_intrinsic_load_input: + case nir_intrinsic_load_per_primitive_input: case nir_intrinsic_load_interpolated_input: { /* We are cloning load_input in the producer for backward * inter-shader code motion. Replace the input load with the stored @@ -2263,11 +2266,11 @@ get_input_qualifier(struct linkage_info *linkage, unsigned i) nir_intrinsic_instr *load = list_first_entry(&slot->consumer.loads, struct list_node, head)->instr; - if (load->intrinsic == nir_intrinsic_load_input) { - if (nir_intrinsic_io_semantics(load).per_primitive) - return QUAL_PER_PRIMITIVE; + if (load->intrinsic == nir_intrinsic_load_input) return is_color ? QUAL_COLOR_FLAT : QUAL_VAR_FLAT; - } + + if (load->intrinsic == nir_intrinsic_load_per_primitive_input) + return QUAL_PER_PRIMITIVE; if (load->intrinsic == nir_intrinsic_load_input_vertex) { return nir_intrinsic_io_semantics(load).interp_explicit_strict ? @@ -3479,10 +3482,9 @@ backward_inter_shader_code_motion(struct linkage_info *linkage, load->instr.pass_flags |= FLAG_INTERP_FLAT; } break; + case nir_intrinsic_load_per_primitive_input: case nir_intrinsic_load_input_vertex: - /* Inter-shader code motion is unimplemented for explicit - * interpolation. - */ + /* Inter-shader code motion is unimplemented these. */ continue; default: unreachable("unexpected load intrinsic"); @@ -3704,12 +3706,11 @@ relocate_slot(struct linkage_info *linkage, struct scalar_slot *slot, if (fs_vec4_type == FS_VEC4_TYPE_PER_PRIMITIVE) { assert(intr->intrinsic == nir_intrinsic_store_per_primitive_output || intr->intrinsic == nir_intrinsic_load_per_primitive_output || - intr->intrinsic == nir_intrinsic_load_input); - assert(intr->intrinsic != nir_intrinsic_load_input || sem.per_primitive); + intr->intrinsic == nir_intrinsic_load_per_primitive_input); } else { - assert(!sem.per_primitive); assert(intr->intrinsic != nir_intrinsic_store_per_primitive_output && - intr->intrinsic != nir_intrinsic_load_per_primitive_output); + intr->intrinsic != nir_intrinsic_load_per_primitive_output && + intr->intrinsic != nir_intrinsic_load_per_primitive_input); } /* This path is used when promoting convergent interpolated diff --git a/src/compiler/nir/nir_opt_vectorize_io.c b/src/compiler/nir/nir_opt_vectorize_io.c index 3351e759d0a..f85857deeba 100644 --- a/src/compiler/nir/nir_opt_vectorize_io.c +++ b/src/compiler/nir/nir_opt_vectorize_io.c @@ -69,9 +69,6 @@ compare_is_not_vectorizable(nir_intrinsic_instr *a, nir_intrinsic_instr *b) if (sem0.interp_explicit_strict != sem1.interp_explicit_strict) return sem0.interp_explicit_strict > sem1.interp_explicit_strict ? 1 : -1; - if (sem0.per_primitive != sem1.per_primitive) - return sem0.per_primitive > sem1.per_primitive ? 1 : -1; - /* Only load_interpolated_input can't merge low and high halves of 16-bit * loads/stores. */ @@ -488,6 +485,7 @@ nir_opt_vectorize_io(nir_shader *shader, nir_variable_mode modes) switch (intr->intrinsic) { case nir_intrinsic_load_input: + case nir_intrinsic_load_per_primitive_input: case nir_intrinsic_load_input_vertex: case nir_intrinsic_load_interpolated_input: case nir_intrinsic_load_per_vertex_input: diff --git a/src/compiler/nir/nir_print.c b/src/compiler/nir/nir_print.c index 71cd4e2b0a3..c065b258f46 100644 --- a/src/compiler/nir/nir_print.c +++ b/src/compiler/nir/nir_print.c @@ -1344,6 +1344,7 @@ print_intrinsic_instr(nir_intrinsic_instr *instr, print_state *state) nir_variable_mode mode = nir_var_mem_generic; switch (instr->intrinsic) { case nir_intrinsic_load_input: + case nir_intrinsic_load_per_primitive_input: case nir_intrinsic_load_interpolated_input: case nir_intrinsic_load_per_vertex_input: case nir_intrinsic_load_input_vertex: @@ -1370,9 +1371,6 @@ print_intrinsic_instr(nir_intrinsic_instr *instr, print_state *state) fprintf(fp, "io location=%s slots=%u", loc, io.num_slots); - if (io.per_primitive) - fprintf(fp, " per_primitive"); - if (io.interp_explicit_strict) fprintf(fp, " explicit_strict"); @@ -1622,6 +1620,7 @@ print_intrinsic_instr(nir_intrinsic_instr *instr, print_state *state) var_mode = nir_var_uniform; break; case nir_intrinsic_load_input: + case nir_intrinsic_load_per_primitive_input: case nir_intrinsic_load_interpolated_input: case nir_intrinsic_load_per_vertex_input: var_mode = nir_var_shader_in; diff --git a/src/compiler/nir/nir_schedule.c b/src/compiler/nir/nir_schedule.c index 7a57ba2ef41..93474acfc8c 100644 --- a/src/compiler/nir/nir_schedule.c +++ b/src/compiler/nir/nir_schedule.c @@ -380,6 +380,7 @@ nir_schedule_intrinsic_deps(nir_deps_state *state, break; case nir_intrinsic_load_input: + case nir_intrinsic_load_per_primitive_input: case nir_intrinsic_load_per_vertex_input: add_read_dep(state, state->load_input, n); break; diff --git a/src/compiler/nir/nir_validate.c b/src/compiler/nir/nir_validate.c index 4bd938afeee..16e75fabb3b 100644 --- a/src/compiler/nir/nir_validate.c +++ b/src/compiler/nir/nir_validate.c @@ -613,6 +613,7 @@ validate_intrinsic_instr(nir_intrinsic_instr *instr, validate_state *state) case nir_intrinsic_load_uniform: case nir_intrinsic_load_input: + case nir_intrinsic_load_per_primitive_input: case nir_intrinsic_load_per_vertex_input: case nir_intrinsic_load_interpolated_input: case nir_intrinsic_load_output: diff --git a/src/gallium/auxiliary/gallivm/lp_bld_nir.c b/src/gallium/auxiliary/gallivm/lp_bld_nir.c index b89aa5a360e..24ac0569837 100644 --- a/src/gallium/auxiliary/gallivm/lp_bld_nir.c +++ b/src/gallium/auxiliary/gallivm/lp_bld_nir.c @@ -2123,6 +2123,7 @@ visit_intrinsic(struct lp_build_nir_context *bld_base, visit_store_reg(bld_base, instr); break; case nir_intrinsic_load_input: + case nir_intrinsic_load_per_primitive_input: visit_load_input(bld_base, instr, result); break; case nir_intrinsic_store_output: diff --git a/src/intel/compiler/brw_fs_nir.cpp b/src/intel/compiler/brw_fs_nir.cpp index f423f4ccd00..8967f444ca5 100644 --- a/src/intel/compiler/brw_fs_nir.cpp +++ b/src/intel/compiler/brw_fs_nir.cpp @@ -4209,7 +4209,8 @@ fs_nir_emit_fs_intrinsic(nir_to_brw_state &ntb, break; } - case nir_intrinsic_load_input: { + case nir_intrinsic_load_input: + case nir_intrinsic_load_per_primitive_input: { /* In Fragment Shaders load_input is used either for flat inputs or * per-primitive inputs. */ diff --git a/src/intel/compiler/brw_nir.c b/src/intel/compiler/brw_nir.c index 5741eff11a3..f53b85bbec2 100644 --- a/src/intel/compiler/brw_nir.c +++ b/src/intel/compiler/brw_nir.c @@ -275,6 +275,7 @@ static bool is_input(nir_intrinsic_instr *intrin) { return intrin->intrinsic == nir_intrinsic_load_input || + intrin->intrinsic == nir_intrinsic_load_per_primitive_input || intrin->intrinsic == nir_intrinsic_load_per_vertex_input || intrin->intrinsic == nir_intrinsic_load_interpolated_input; } diff --git a/src/intel/compiler/elk/elk_fs_nir.cpp b/src/intel/compiler/elk/elk_fs_nir.cpp index 6d7d1bd9bde..b41bd876b94 100644 --- a/src/intel/compiler/elk/elk_fs_nir.cpp +++ b/src/intel/compiler/elk/elk_fs_nir.cpp @@ -3834,7 +3834,8 @@ fs_nir_emit_fs_intrinsic(nir_to_elk_state &ntb, break; } - case nir_intrinsic_load_input: { + case nir_intrinsic_load_input: + case nir_intrinsic_load_per_primitive_input: { /* In Fragment Shaders load_input is used either for flat inputs or * per-primitive inputs. */ diff --git a/src/intel/compiler/elk/elk_nir.c b/src/intel/compiler/elk/elk_nir.c index e46e628a27e..45a0fece8ff 100644 --- a/src/intel/compiler/elk/elk_nir.c +++ b/src/intel/compiler/elk/elk_nir.c @@ -168,6 +168,7 @@ static bool is_input(nir_intrinsic_instr *intrin) { return intrin->intrinsic == nir_intrinsic_load_input || + intrin->intrinsic == nir_intrinsic_load_per_primitive_input || intrin->intrinsic == nir_intrinsic_load_per_vertex_input || intrin->intrinsic == nir_intrinsic_load_interpolated_input; } diff --git a/src/intel/compiler/elk/elk_vec4_nir.cpp b/src/intel/compiler/elk/elk_vec4_nir.cpp index f12b76afa36..431e620f5f2 100644 --- a/src/intel/compiler/elk/elk_vec4_nir.cpp +++ b/src/intel/compiler/elk/elk_vec4_nir.cpp @@ -423,7 +423,8 @@ vec4_visitor::nir_emit_intrinsic(nir_intrinsic_instr *instr) /* Nothing to do with these. */ break; - case nir_intrinsic_load_input: { + case nir_intrinsic_load_input: + case nir_intrinsic_load_per_primitive_input: { assert(instr->def.bit_size == 32); /* We set EmitNoIndirectInput for VS */ unsigned load_offset = nir_src_as_uint(instr->src[0]);