diff --git a/src/amd/vulkan/radv_pipeline.c b/src/amd/vulkan/radv_pipeline.c index 9070657a76b..2bfd264b295 100644 --- a/src/amd/vulkan/radv_pipeline.c +++ b/src/amd/vulkan/radv_pipeline.c @@ -145,6 +145,9 @@ radv_pipeline_get_shader_key(const struct radv_device *device, const VkPipelineS if (flags & VK_PIPELINE_CREATE_2_INDIRECT_BINDABLE_BIT_EXT) key.indirect_bindable = 1; + if (flags & VK_PIPELINE_CREATE_2_DESCRIPTOR_HEAP_BIT_EXT) + key.descriptor_heap = 1; + if (stage->stage & RADV_GRAPHICS_STAGE_BITS) { key.version = instance->drirc.misc.override_graphics_shader_version; } else if (stage->stage & RADV_RT_STAGE_BITS) { diff --git a/src/amd/vulkan/radv_shader.h b/src/amd/vulkan/radv_shader.h index e263abc73f5..3ee63540a6c 100644 --- a/src/amd/vulkan/radv_shader.h +++ b/src/amd/vulkan/radv_shader.h @@ -82,6 +82,7 @@ struct radv_shader_stage_key { uint8_t keep_statistic_info : 1; uint8_t keep_executable_info : 1; uint8_t view_index_from_device_index : 1; + uint8_t descriptor_heap : 1; /* Shader version (up to 8) to force re-compilation when RADV_BUILD_ID_OVERRIDE is enabled. */ uint8_t version : 3; diff --git a/src/amd/vulkan/radv_shader_info.c b/src/amd/vulkan/radv_shader_info.c index 771333c5ed2..1b443e24936 100644 --- a/src/amd/vulkan/radv_shader_info.c +++ b/src/amd/vulkan/radv_shader_info.c @@ -1084,6 +1084,7 @@ radv_nir_shader_info_pass(struct radv_device *device, const struct nir_shader *n info->user_data_0 = radv_get_user_data_0(pdev->info.gfx_level, info); info->merged_shader_compiled_separately = radv_is_merged_shader_compiled_separately(pdev->info.gfx_level, info); info->force_indirect_descriptors = info->merged_shader_compiled_separately || stage_key->indirect_bindable; + info->descriptor_heap = stage_key->descriptor_heap; switch (nir->info.stage) { case MESA_SHADER_COMPUTE: diff --git a/src/amd/vulkan/radv_shader_info.h b/src/amd/vulkan/radv_shader_info.h index 019196d492d..c7feea6fd42 100644 --- a/src/amd/vulkan/radv_shader_info.h +++ b/src/amd/vulkan/radv_shader_info.h @@ -117,6 +117,7 @@ struct radv_shader_info { bool merged_shader_compiled_separately : 1; /* GFX9+ */ bool force_indirect_descriptors : 1; bool ngg_wave_id_en : 1; + bool descriptor_heap : 1; struct { uint64_t tcs_inputs_via_temp; diff --git a/src/amd/vulkan/radv_shader_object.c b/src/amd/vulkan/radv_shader_object.c index 8cb38b1286c..1ef329ea27a 100644 --- a/src/amd/vulkan/radv_shader_object.c +++ b/src/amd/vulkan/radv_shader_object.c @@ -119,6 +119,9 @@ radv_shader_stage_init(const VkShaderCreateInfoEXT *sinfo, struct radv_shader_st if (sinfo->flags & VK_SHADER_CREATE_INDIRECT_BINDABLE_BIT_EXT) out_stage->key.indirect_bindable = 1; + if (sinfo->flags & VK_SHADER_CREATE_DESCRIPTOR_HEAP_BIT_EXT) + out_stage->key.descriptor_heap = 1; + if (out_stage->stage == MESA_SHADER_MESH) { out_stage->key.has_task_shader = !(sinfo->flags & VK_SHADER_CREATE_NO_TASK_SHADER_BIT_EXT); }