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i965/vec4: support packing tcs inputs
Reviewed-by: Kenneth Graunke <kenneth@whitecape.org> Reviewed-by: Edward O'Callaghan <funfunctor@folklore1984.net>
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parent
d1192bef7e
commit
b25e49a3c7
2 changed files with 7 additions and 2 deletions
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@ -166,6 +166,7 @@ void
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vec4_tcs_visitor::emit_input_urb_read(const dst_reg &dst,
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const src_reg &vertex_index,
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unsigned base_offset,
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unsigned first_component,
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const src_reg &indirect_offset)
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{
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vec4_instruction *inst;
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@ -191,7 +192,9 @@ vec4_tcs_visitor::emit_input_urb_read(const dst_reg &dst,
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if (inst->offset == 0 && indirect_offset.file == BAD_FILE) {
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emit(MOV(dst, swizzle(src_reg(temp), BRW_SWIZZLE_WWWW)));
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} else {
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emit(MOV(dst, src_reg(temp)));
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src_reg src = src_reg(temp);
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src.swizzle = BRW_SWZ_COMP_INPUT(first_component);
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emit(MOV(dst, src));
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}
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}
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@ -267,7 +270,8 @@ vec4_tcs_visitor::nir_emit_intrinsic(nir_intrinsic_instr *instr)
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dst_reg dst = get_nir_dest(instr->dest, BRW_REGISTER_TYPE_D);
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dst.writemask = brw_writemask_for_size(instr->num_components);
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emit_input_urb_read(dst, vertex_index, imm_offset, indirect_offset);
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emit_input_urb_read(dst, vertex_index, imm_offset,
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nir_intrinsic_component(instr), indirect_offset);
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break;
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}
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case nir_intrinsic_load_input:
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@ -60,6 +60,7 @@ protected:
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void emit_input_urb_read(const dst_reg &dst,
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const src_reg &vertex_index,
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unsigned base_offset,
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unsigned first_component,
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const src_reg &indirect_offset);
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void emit_output_urb_read(const dst_reg &dst,
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unsigned base_offset,
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