From b2123314bd0ab7408161d86eacbbeeec79794d3e Mon Sep 17 00:00:00 2001 From: Mike Blumenkrantz Date: Wed, 5 Feb 2025 13:39:02 -0500 Subject: [PATCH] radv: store vertex prolog simple input check to cmdbuf on vs bind no need to check this again and again Part-of: --- src/amd/vulkan/radv_cmd_buffer.c | 17 ++++++++++------- src/amd/vulkan/radv_cmd_buffer.h | 1 + 2 files changed, 11 insertions(+), 7 deletions(-) diff --git a/src/amd/vulkan/radv_cmd_buffer.c b/src/amd/vulkan/radv_cmd_buffer.c index 52cf3c00824..c57ae41bec8 100644 --- a/src/amd/vulkan/radv_cmd_buffer.c +++ b/src/amd/vulkan/radv_cmd_buffer.c @@ -4906,12 +4906,6 @@ lookup_vs_prolog(struct radv_cmd_buffer *cmd_buffer, const struct radv_shader *v misaligned_mask &= attribute_mask; unaligned_mask &= attribute_mask; - const bool can_use_simple_input = - cmd_buffer->state.shaders[MESA_SHADER_VERTEX] && - !cmd_buffer->state.shaders[MESA_SHADER_VERTEX]->info.merged_shader_compiled_separately && - cmd_buffer->state.shaders[MESA_SHADER_VERTEX]->info.is_ngg == pdev->use_ngg && - cmd_buffer->state.shaders[MESA_SHADER_VERTEX]->info.wave_size == pdev->ge_wave_size; - /* The instance ID input VGPR is placed differently when as_ls=true. as_ls is also needed to * workaround the LS VGPR initialization bug. */ @@ -4919,7 +4913,7 @@ lookup_vs_prolog(struct radv_cmd_buffer *cmd_buffer, const struct radv_shader *v /* try to use a pre-compiled prolog first */ struct radv_shader_part *prolog = NULL; - if (can_use_simple_input && !as_ls && !misaligned_mask && !vi_state->alpha_adjust_lo && !vi_state->alpha_adjust_hi) { + if (cmd_buffer->state.can_use_simple_vertex_input && !as_ls && !misaligned_mask && !vi_state->alpha_adjust_lo && !vi_state->alpha_adjust_hi) { if (!instance_rate_inputs) { prolog = device->simple_vs_prologs[num_attributes - 1]; } else if (num_attributes <= 16 && !*nontrivial_divisors && !zero_divisors && @@ -7500,6 +7494,9 @@ radv_bind_pre_rast_shader(struct radv_cmd_buffer *cmd_buffer, const struct radv_ static void radv_bind_vertex_shader(struct radv_cmd_buffer *cmd_buffer, const struct radv_shader *vs) { + struct radv_device *device = radv_cmd_buffer_device(cmd_buffer); + const struct radv_physical_device *pdev = radv_device_physical(device); + radv_bind_pre_rast_shader(cmd_buffer, vs); /* Re-emit states that need to be updated when the vertex shader is compiled separately @@ -7509,6 +7506,9 @@ radv_bind_vertex_shader(struct radv_cmd_buffer *cmd_buffer, const struct radv_sh cmd_buffer->state.dirty_dynamic |= RADV_DYNAMIC_PATCH_CONTROL_POINTS; } + cmd_buffer->state.can_use_simple_vertex_input = !vs->info.merged_shader_compiled_separately && + vs->info.is_ngg == pdev->use_ngg && + vs->info.wave_size == pdev->ge_wave_size; /* Can't put anything else here due to merged shaders */ } @@ -7665,6 +7665,9 @@ radv_bind_shader(struct radv_cmd_buffer *cmd_buffer, struct radv_shader *shader, /* Reset some dynamic states when a shader stage is unbound. */ switch (stage) { + case MESA_SHADER_VERTEX: + cmd_buffer->state.can_use_simple_vertex_input = false; + break; case MESA_SHADER_FRAGMENT: cmd_buffer->state.dirty |= RADV_CMD_DIRTY_DB_SHADER_CONTROL; cmd_buffer->state.dirty_dynamic |= RADV_DYNAMIC_CONSERVATIVE_RAST_MODE | RADV_DYNAMIC_RASTERIZATION_SAMPLES | diff --git a/src/amd/vulkan/radv_cmd_buffer.h b/src/amd/vulkan/radv_cmd_buffer.h index 39fd6e450b8..5ad367765fd 100644 --- a/src/amd/vulkan/radv_cmd_buffer.h +++ b/src/amd/vulkan/radv_cmd_buffer.h @@ -478,6 +478,7 @@ struct radv_cmd_state { uint8_t vtx_emit_num; bool uses_drawid; bool uses_baseinstance; + bool can_use_simple_vertex_input; bool uses_out_of_order_rast; bool uses_vrs;