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aco/gfx11.5: select SALU fsat
Reviewed-by: Daniel Schürmann <daniel@schuermann.dev> Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/29245>
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2 changed files with 7 additions and 1 deletions
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@ -2651,6 +2651,12 @@ visit_alu_instr(isel_context* ctx, nir_alu_instr* instr)
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Instruction* add =
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bld.vop3(aco_opcode::v_add_f64_e64, Definition(dst), src, Operand::zero());
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add->valu().clamp = true;
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} else if (dst.regClass() == s1 && instr->def.bit_size == 16) {
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Temp low = bld.sop2(aco_opcode::s_max_f16, bld.def(s1), src, Operand::c16(0));
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bld.sop2(aco_opcode::s_min_f16, Definition(dst), low, Operand::c16(0x3C00));
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} else if (dst.regClass() == s1 && instr->def.bit_size == 32) {
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Temp low = bld.sop2(aco_opcode::s_max_f32, bld.def(s1), src, Operand::c32(0));
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bld.sop2(aco_opcode::s_min_f32, Definition(dst), low, Operand::c32(0x3f800000));
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} else {
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isel_err(&instr->instr, "Unimplemented NIR instr bit size");
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}
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@ -332,7 +332,6 @@ init_context(isel_context* ctx, nir_shader* shader)
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case nir_op_ffmaz:
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case nir_op_fneg:
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case nir_op_fabs:
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case nir_op_fsat:
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case nir_op_fsign:
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case nir_op_frcp:
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case nir_op_frsq:
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@ -377,6 +376,7 @@ init_context(isel_context* ctx, nir_shader* shader)
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case nir_op_fsub:
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case nir_op_fmax:
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case nir_op_fmin:
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case nir_op_fsat:
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case nir_op_i2f16:
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case nir_op_i2f32:
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case nir_op_u2f16:
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