fdo-mirrors/mesa
1
0
Fork 0
mirror of https://gitlab.freedesktop.org/mesa/mesa.git synced 2026-05-08 15:38:09 +02:00
Code Issues Projects Releases Packages Wiki Activity Actions 1

aco/gfx11.5: select SALU fsat

Browse source 
Reviewed-by: Daniel Schürmann <daniel@schuermann.dev>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/29245>
This commit is contained in:
Georg Lehmann 2023-09-22 09:00:49 +02:00 • committed by Marge Bot
parent ee0e183700
commit b1b5a0c6ad
2 changed files with 7 additions and 1 deletions
Show stats Download patch file Download diff file Expand all files Collapse all files

6
src/amd/compiler/aco_instruction_selection.cpp
View file

@ -2651,6 +2651,12 @@ visit_alu_instr(isel_context* ctx, nir_alu_instr* instr)
Instruction* add =
bld.vop3(aco_opcode::v_add_f64_e64, Definition(dst), src, Operand::zero());
add->valu().clamp = true;
} else if (dst.regClass() == s1 && instr->def.bit_size == 16) {
Temp low = bld.sop2(aco_opcode::s_max_f16, bld.def(s1), src, Operand::c16(0));
bld.sop2(aco_opcode::s_min_f16, Definition(dst), low, Operand::c16(0x3C00));
} else if (dst.regClass() == s1 && instr->def.bit_size == 32) {
Temp low = bld.sop2(aco_opcode::s_max_f32, bld.def(s1), src, Operand::c32(0));
bld.sop2(aco_opcode::s_min_f32, Definition(dst), low, Operand::c32(0x3f800000));
} else {
isel_err(&instr->instr, "Unimplemented NIR instr bit size");
}

2
src/amd/compiler/aco_instruction_selection_setup.cpp
View file

@ -332,7 +332,6 @@ init_context(isel_context* ctx, nir_shader* shader)
case nir_op_ffmaz:
case nir_op_fneg:
case nir_op_fabs:
case nir_op_fsat:
case nir_op_fsign:
case nir_op_frcp:
case nir_op_frsq:
@ -377,6 +376,7 @@ init_context(isel_context* ctx, nir_shader* shader)
case nir_op_fsub:
case nir_op_fmax:
case nir_op_fmin:
case nir_op_fsat:
case nir_op_i2f16:
case nir_op_i2f32:
case nir_op_u2f16: