fdo-mirrors/mesa
1
0
Fork 0
mirror of https://gitlab.freedesktop.org/mesa/mesa.git synced 2026-05-05 05:18:08 +02:00
Code Issues Projects Releases Packages Wiki Activity Actions 2

ac: add gpu_info::has_32bit_predication

Browse source 
32-bit predication is now supported with GFX10.3.

Signed-off-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Reviewed-by: Bas Nieuwenhuizen <bas@basnieuwenhuizen.nl>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/7732>
This commit is contained in:
Samuel Pitoiset 2020-11-23 11:51:25 +01:00 • committed by Marge Bot
parent 472e81ed80
commit b1558ec3ec
2 changed files with 8 additions and 0 deletions
Show stats Download patch file Download diff file Expand all files Collapse all files

7
src/amd/common/ac_gpu_info.c
View file

@ -654,6 +654,12 @@ bool ac_query_gpu_info(int fd, void *dev_p, struct radeon_info *info,
info->has_ls_vgpr_init_bug = info->family == CHIP_VEGA10 || info->family == CHIP_RAVEN;
/* Support for GFX10.3 was added with F32_ME_FEATURE_VERSION_31 but the
* firmware version wasn't bumped.
*/
info->has_32bit_predication = info->chip_class >= GFX10_3 &&
info->me_fw_version >= 32;
/* Get the number of good compute units. */
info->num_good_compute_units = 0;
for (i = 0; i < info->max_se; i++) {
@ -890,6 +896,7 @@ void ac_print_gpu_info(struct radeon_info *info, FILE *f)
fprintf(f, " has_tc_compat_zrange_bug = %i\n", info->has_tc_compat_zrange_bug);
fprintf(f, " has_msaa_sample_loc_bug = %i\n", info->has_msaa_sample_loc_bug);
fprintf(f, " has_ls_vgpr_init_bug = %i\n", info->has_ls_vgpr_init_bug);
fprintf(f, " has_32bit_predication = %i\n", info->has_32bit_predication);
fprintf(f, "Display features:\n");
fprintf(f, " use_display_dcc_unaligned = %u\n", info->use_display_dcc_unaligned);

1
src/amd/common/ac_gpu_info.h
View file

@ -75,6 +75,7 @@ struct radeon_info {
bool has_tc_compat_zrange_bug;
bool has_msaa_sample_loc_bug;
bool has_ls_vgpr_init_bug;
bool has_32bit_predication;
/* Display features. */
/* There are 2 display DCC codepaths, because display expects unaligned DCC. */