From b144f501906dcb4a54e0aa8d699768c8d9d13bbb Mon Sep 17 00:00:00 2001 From: David Rosca Date: Tue, 16 Apr 2024 19:31:29 +0200 Subject: [PATCH] radeonsi/vcn: Fix 10bit HEVC VPS general_profile_compatibility_flags Cc: mesa-stable Reviewed-by: Ruijing Dong Part-of: --- src/gallium/drivers/radeonsi/radeon_vcn_enc_1_2.c | 7 ++++++- 1 file changed, 6 insertions(+), 1 deletion(-) diff --git a/src/gallium/drivers/radeonsi/radeon_vcn_enc_1_2.c b/src/gallium/drivers/radeonsi/radeon_vcn_enc_1_2.c index 88c9aba3a9f..2dc112934e8 100644 --- a/src/gallium/drivers/radeonsi/radeon_vcn_enc_1_2.c +++ b/src/gallium/drivers/radeonsi/radeon_vcn_enc_1_2.c @@ -780,7 +780,12 @@ static void radeon_enc_nalu_vps(struct radeon_encoder *enc) radeon_enc_code_fixed_bits(enc, 0x0, 2); radeon_enc_code_fixed_bits(enc, enc->enc_pic.general_tier_flag, 1); radeon_enc_code_fixed_bits(enc, enc->enc_pic.general_profile_idc, 5); - radeon_enc_code_fixed_bits(enc, 0x60000000, 32); + + if (enc->enc_pic.general_profile_idc == 2) + radeon_enc_code_fixed_bits(enc, 0x20000000, 32); + else + radeon_enc_code_fixed_bits(enc, 0x60000000, 32); + radeon_enc_code_fixed_bits(enc, 0xb0000000, 32); radeon_enc_code_fixed_bits(enc, 0x0, 16); radeon_enc_code_fixed_bits(enc, enc->enc_pic.general_level_idc, 8);