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i965/fs: Manually set source regioning on PLN instructions.

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Like LINE (commit 92346db0), src0 must have a scalar region. Setting
src1's region to <8,8,1> lets us pass a properly sized combined delta_xy
argument in a few commits without getting a bogus <16,16,1> region.

Reviewed-by: Jason Ekstrand <jason.ekstrand@intel.com>
This commit is contained in:
Matt Turner 2015-04-06 21:46:54 -07:00
parent a1dd2f0bb6
commit b14313e452
1 changed files with 13 additions and 1 deletions
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14
src/mesa/drivers/dri/i965/brw_eu_emit.c
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@ -1008,7 +1008,6 @@ ALU2(DP4)
ALU2(DPH)
ALU2(DP3)
ALU2(DP2)
ALU2(PLN)
ALU3F(MAD)
ALU3F(LRP)
ALU1(BFREV)
@ -1112,6 +1111,19 @@ brw_LINE(struct brw_compile *p, struct brw_reg dest,
return brw_alu2(p, BRW_OPCODE_LINE, dest, src0, src1);
}
brw_inst *
brw_PLN(struct brw_compile *p, struct brw_reg dest,
struct brw_reg src0, struct brw_reg src1)
{
src0.vstride = BRW_VERTICAL_STRIDE_0;
src0.width = BRW_WIDTH_1;
src0.hstride = BRW_HORIZONTAL_STRIDE_0;
src1.vstride = BRW_VERTICAL_STRIDE_8;
src1.width = BRW_WIDTH_8;
src1.hstride = BRW_HORIZONTAL_STRIDE_1;
return brw_alu2(p, BRW_OPCODE_PLN, dest, src0, src1);
}
brw_inst *
brw_F32TO16(struct brw_compile *p, struct brw_reg dst, struct brw_reg src)
{