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freedreno: Move max-tf-vtx calculation to just the HW that needs it.

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a3xx-a4xx use it in in-shader TF code, and all of a3xx-a5xx will need it
shortly for fixing the SW TF queries.

Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/9687>
This commit is contained in:
Eric Anholt 2021-03-17 16:48:35 -07:00 • committed by Marge Bot
parent 4af6fbb965
commit b02d52459f
7 changed files with 20 additions and 12 deletions
Show stats Download patch file Download diff file Expand all files Collapse all files

2
src/gallium/drivers/freedreno/a3xx/fd3_draw.c
View file

@ -132,6 +132,8 @@ fd3_draw_vbo(struct fd_context *ctx, const struct pipe_draw_info *info,
const struct ir3_shader_variant *vp = fd3_emit_get_vp(&emit);
const struct ir3_shader_variant *fp = fd3_emit_get_fp(&emit);
ir3_update_max_tf_vtx(ctx, vp);
/* do regular pass first: */
if (unlikely(ctx->stats_users > 0)) {

2
src/gallium/drivers/freedreno/a4xx/fd4_draw.c
View file

@ -121,6 +121,8 @@ fd4_draw_vbo(struct fd_context *ctx, const struct pipe_draw_info *info,
const struct ir3_shader_variant *vp = fd4_emit_get_vp(&emit);
const struct ir3_shader_variant *fp = fd4_emit_get_fp(&emit);
ir3_update_max_tf_vtx(ctx, vp);
/* do regular pass first: */
if (unlikely(ctx->stats_users > 0)) {

2
src/gallium/drivers/freedreno/a5xx/fd5_draw.c
View file

@ -122,6 +122,8 @@ fd5_draw_vbo(struct fd_context *ctx, const struct pipe_draw_info *info,
const struct ir3_shader_variant *vp = fd5_emit_get_vp(&emit);
const struct ir3_shader_variant *fp = fd5_emit_get_fp(&emit);
ir3_update_max_tf_vtx(ctx, vp);
/* do regular pass first: */
if (unlikely(ctx->stats_users > 0)) {

6
src/gallium/drivers/freedreno/freedreno_context.h
View file

@ -111,6 +111,12 @@ struct fd_streamout_stateobj {
* something more clever.
*/
unsigned offsets[PIPE_MAX_SO_BUFFERS];
/* Pre-a6xx, the maximum number of vertices that could be recorded to this
* set of targets with the current vertex shader. a6xx and newer, hardware
* queries are used.
*/
unsigned max_tf_vtx;
};
#define MAX_GLOBAL_BUFFERS 16

4
src/gallium/drivers/freedreno/ir3/ir3_const.h
View file

@ -409,7 +409,6 @@ emit_tfbos(struct fd_context *ctx, const struct ir3_shader_variant *v,
}
}
static inline void
emit_common_consts(const struct ir3_shader_variant *v, struct fd_ringbuffer *ring,
struct fd_context *ctx, enum pipe_shader_type t)
@ -464,6 +463,7 @@ ir3_emit_vs_driver_params(const struct ir3_shader_variant *v,
const struct pipe_draw_info *info,
const struct pipe_draw_indirect_info *indirect,
const struct pipe_draw_start_count *draw)
assert_dt
{
assert(v->need_driver_params);
@ -474,7 +474,7 @@ ir3_emit_vs_driver_params(const struct ir3_shader_variant *v,
[IR3_DP_VTXID_BASE] = info->index_size ?
info->index_bias : draw->start,
[IR3_DP_INSTID_BASE] = info->start_instance,
[IR3_DP_VTXCNT_MAX] = ir3_max_tf_vtx(ctx, v),
[IR3_DP_VTXCNT_MAX] = ctx->streamout.max_tf_vtx,
};
if (v->key.ucp_enables) {
struct pipe_clip_state *ucp = &ctx->ucp;

14
src/gallium/drivers/freedreno/ir3/ir3_gallium.c
View file

@ -557,21 +557,17 @@ ir3_screen_fini(struct pipe_screen *pscreen)
screen->compiler = NULL;
}
uint32_t
ir3_max_tf_vtx(struct fd_context *ctx, const struct ir3_shader_variant *v)
void
ir3_update_max_tf_vtx(struct fd_context *ctx, const struct ir3_shader_variant *v)
{
struct fd_streamout_stateobj *so = &ctx->streamout;
struct ir3_stream_output_info *info = &v->shader->stream_output;
uint32_t maxvtxcnt = 0x7fffffff;
if (ctx->screen->gpu_id >= 500)
return 0;
if (v->binning_pass)
return 0;
if (v->shader->stream_output.num_outputs == 0)
return 0;
ctx->streamout.max_tf_vtx = 0;
if (so->num_targets == 0)
return 0;
ctx->streamout.max_tf_vtx = 0;
/* offset to write to is:
*
@ -601,5 +597,5 @@ ir3_max_tf_vtx(struct fd_context *ctx, const struct ir3_shader_variant *v)
}
}
return maxvtxcnt;
ctx->streamout.max_tf_vtx = maxvtxcnt;
}

2
src/gallium/drivers/freedreno/ir3/ir3_gallium.h
View file

@ -77,6 +77,6 @@ ir3_point_sprite(const struct ir3_shader_variant *fs, int i,
}
}
uint32_t ir3_max_tf_vtx(struct fd_context *ctx, const struct ir3_shader_variant *v) assert_dt;
void ir3_update_max_tf_vtx(struct fd_context *ctx, const struct ir3_shader_variant *v) assert_dt;
#endif /* IR3_GALLIUM_H_ */