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radv: fix alignment of DGC command buffers

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Otherwise, DGC command buffers might not be correctly aligned.

This fixes a regression with the vkd3d-proton DGC tests.

Fixes: 4f660f9937 ("ac/gpu_info: pad IBs according to ib_size_alignment")
Signed-off-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/25500>
This commit is contained in:
Samuel Pitoiset 2023-10-02 11:37:45 +02:00 • committed by Marge Bot
parent 1c4d57568a
commit b01e874234
1 changed files with 3 additions and 3 deletions
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6
src/amd/vulkan/radv_device_generated_commands.c
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@ -142,10 +142,10 @@ radv_get_sequence_size(const struct radv_indirect_command_layout *layout, struct
static uint32_t
radv_align_cmdbuf_size(const struct radv_device *device, uint32_t size)
{
const uint32_t ib_pad_dw_mask = MAX2(device->physical_device->rad_info.ib_pad_dw_mask[AMD_IP_GFX],
device->physical_device->rad_info.ib_pad_dw_mask[AMD_IP_COMPUTE]);
const uint32_t ib_size_alignment = MAX2(device->physical_device->rad_info.ip[AMD_IP_GFX].ib_size_alignment,
device->physical_device->rad_info.ip[AMD_IP_COMPUTE].ib_size_alignment);
return align(size, ib_pad_dw_mask + 1);
return align(size, ib_size_alignment);
}
static unsigned