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intel/brw: Remove Gfx8- fields from *_prog_key structs

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Those are not used or relevant anymore.  Also update Iris accordingly.

Reviewed-by: Kenneth Graunke <kenneth@whitecape.org>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/27691>
This commit is contained in:
Caio Oliveira 2024-02-23 16:24:53 -08:00 • committed by Marge Bot
parent 63a4a4400a
commit aff961f423
8 changed files with 20 additions and 229 deletions
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6
src/gallium/drivers/iris/iris_program.c
View file

@ -511,11 +511,6 @@ iris_to_brw_vs_key(const struct iris_screen *screen,
return (struct brw_vs_prog_key) {
BRW_KEY_INIT(screen->devinfo->ver, key->vue.base.program_string_id,
key->vue.base.limit_trig_input_range),
/* Don't tell the backend about our clip plane constants, we've
* already lowered them in NIR and don't want it doing it again.
*/
.nr_userclip_plane_consts = 0,
};
}
@ -530,7 +525,6 @@ iris_to_brw_tcs_key(const struct iris_screen *screen,
.input_vertices = key->input_vertices,
.patch_outputs_written = key->patch_outputs_written,
.outputs_written = key->outputs_written,
.quads_workaround = key->quads_workaround,
};
}

2
src/intel/compiler/brw_compile_tcs.cpp
View file

@ -69,8 +69,6 @@ brw_compile_tcs(const struct brw_compiler *compiler,
brw_nir_lower_vue_inputs(nir, &input_vue_map);
brw_nir_lower_tcs_outputs(nir, &vue_prog_data->vue_map,
key->_tes_primitive_mode);
if (key->quads_workaround)
intel_nir_apply_tcs_quads_workaround(nir);
if (key->input_vertices > 0)
intel_nir_lower_patch_vertices_in(nir, key->input_vertices);

85
src/intel/compiler/brw_compiler.h
View file

@ -212,31 +212,6 @@ enum PACKED gfx6_gather_sampler_wa {
PRAGMA_DIAGNOSTIC_PUSH
PRAGMA_DIAGNOSTIC_ERROR(-Wpadded)
/**
* Sampler information needed by VS, WM, and GS program cache keys.
*/
struct brw_sampler_prog_key_data {
/**
* EXT_texture_swizzle and DEPTH_TEXTURE_MODE swizzles.
*
* This field is not consumed by the back-end compiler and is only relevant
* for the crocus OpenGL driver for Broadwell and earlier hardware.
*/
uint16_t swizzles[BRW_MAX_SAMPLERS];
uint32_t gl_clamp_mask[3];
/**
* For RG32F, gather4's channel select is broken.
*/
uint32_t gather_channel_quirk_mask;
/**
* For Sandybridge, which shader w/a we need for gather quirks.
*/
enum gfx6_gather_sampler_wa gfx6_gather_wa[BRW_MAX_SAMPLERS];
};
enum brw_robustness_flags {
BRW_ROBUSTNESS_UBO = BITFIELD_BIT(0),
BRW_ROBUSTNESS_SSBO = BITFIELD_BIT(1),
@ -255,8 +230,6 @@ struct brw_base_prog_key {
* avoid precision issues.
*/
bool limit_trig_input_range;
struct brw_sampler_prog_key_data tex;
};
/**
@ -296,32 +269,6 @@ struct brw_base_prog_key {
/** The program key for Vertex Shaders. */
struct brw_vs_prog_key {
struct brw_base_prog_key base;
/**
* For pre-Gfx6 hardware, a bitfield indicating which texture coordinates
* are going to be replaced with point coordinates (as a consequence of a
* call to glTexEnvi(GL_POINT_SPRITE, GL_COORD_REPLACE, GL_TRUE)). Because
* our SF thread requires exact matching between VS outputs and FS inputs,
* these texture coordinates will need to be unconditionally included in
* the VUE, even if they aren't written by the vertex shader.
*/
uint8_t point_coord_replace;
unsigned clamp_pointsize:1;
bool copy_edgeflag:1;
bool clamp_vertex_color:1;
/**
* How many user clipping planes are being uploaded to the vertex shader as
* push constants.
*
* These are used for lowering legacy gl_ClipVertex/gl_Position clipping to
* clip distances.
*/
unsigned nr_userclip_plane_consts:4;
uint32_t padding:17;
};
/** The program key for Tessellation Control Shaders. */
@ -340,8 +287,7 @@ struct brw_tcs_prog_key
/** A bitfield of per-patch outputs written. */
uint32_t patch_outputs_written;
bool quads_workaround;
uint32_t padding:24;
uint32_t padding;
};
#define BRW_MAX_TCS_INPUT_VERTICES (32)
@ -364,33 +310,13 @@ struct brw_tes_prog_key
/** A bitfield of per-patch inputs read. */
uint32_t patch_inputs_read;
/**
* How many user clipping planes are being uploaded to the tessellation
* evaluation shader as push constants.
*
* These are used for lowering legacy gl_ClipVertex/gl_Position clipping to
* clip distances.
*/
unsigned nr_userclip_plane_consts:4;
unsigned clamp_pointsize:1;
uint32_t padding:27;
uint32_t padding;
};
/** The program key for Geometry Shaders. */
struct brw_gs_prog_key
{
struct brw_base_prog_key base;
/**
* How many user clipping planes are being uploaded to the geometry shader
* as push constants.
*
* These are used for lowering legacy gl_ClipVertex/gl_Position clipping to
* clip distances.
*/
unsigned nr_userclip_plane_consts:4;
unsigned clamp_pointsize:1;
unsigned padding:27;
};
struct brw_task_prog_key
@ -438,16 +364,11 @@ struct brw_wm_prog_key {
struct brw_base_prog_key base;
uint64_t input_slots_valid;
float alpha_test_ref;
uint8_t color_outputs_valid;
/* Some collection of BRW_WM_IZ_* */
uint8_t iz_lookup;
bool stats_wm:1;
bool flat_shade:1;
unsigned nr_color_regions:5;
bool emit_alpha_test:1;
enum compare_func alpha_test_func:3; /* < For Gfx4/5 MRT alpha test */
bool alpha_test_replicate_alpha:1;
enum brw_sometimes alpha_to_coverage:2;
bool clamp_fragment_color:1;
@ -476,7 +397,7 @@ struct brw_wm_prog_key {
bool ignore_sample_mask_out:1;
bool coarse_pixel:1;
uint64_t padding:53;
uint64_t padding:34;
};
struct brw_cs_prog_key {

38
src/intel/compiler/brw_debug_recompile.c
View file

@ -55,33 +55,18 @@ key_debug_float(const struct brw_compiler *c, void *log,
#define check_float(name, field) \
key_debug_float(c, log, name, old_key->field, key->field)
static bool
debug_sampler_recompile(const struct brw_compiler *c, void *log,
const struct brw_sampler_prog_key_data *old_key,
const struct brw_sampler_prog_key_data *key)
{
bool found = false;
found |= check("gather channel quirk", gather_channel_quirk_mask);
for (unsigned i = 0; i < BRW_MAX_SAMPLERS; i++) {
found |= check("EXT_texture_swizzle or DEPTH_TEXTURE_MODE", swizzles[i]);
found |= check("textureGather workarounds", gfx6_gather_wa[i]);
}
for (unsigned i = 0; i < 3; i++) {
found |= check("GL_CLAMP enabled on any texture unit", gl_clamp_mask[i]);
}
return found;
}
static bool
debug_base_recompile(const struct brw_compiler *c, void *log,
const struct brw_base_prog_key *old_key,
const struct brw_base_prog_key *key)
{
return debug_sampler_recompile(c, log, &old_key->tex, &key->tex);
bool found = false;
found |= check("robust_flags", robust_flags);
found |= check("limit_trig_input_range", limit_trig_input_range);
return found;
}
static void
@ -91,11 +76,6 @@ debug_vs_recompile(const struct brw_compiler *c, void *log,
{
bool found = debug_base_recompile(c, log, &old_key->base, &key->base);
found |= check("legacy user clipping", nr_userclip_plane_consts);
found |= check("copy edgeflag", copy_edgeflag);
found |= check("pointcoord replace", point_coord_replace);
found |= check("vertex color clamping", clamp_vertex_color);
if (!found) {
brw_shader_perf_log(c, log, " something else\n");
}
@ -112,7 +92,6 @@ debug_tcs_recompile(const struct brw_compiler *c, void *log,
found |= check("outputs written", outputs_written);
found |= check("patch outputs written", patch_outputs_written);
found |= check("tes primitive mode", _tes_primitive_mode);
found |= check("quads and equal_spacing workaround", quads_workaround);
if (!found) {
brw_shader_perf_log(c, log, " something else\n");
@ -153,9 +132,6 @@ debug_fs_recompile(const struct brw_compiler *c, void *log,
{
bool found = false;
found |= check("alphatest, computed depth, depth test, or depth write",
iz_lookup);
found |= check("depth statistics", stats_wm);
found |= check("flat shading", flat_shade);
found |= check("number of color buffers", nr_color_regions);
found |= check("MRT alpha test", alpha_test_replicate_alpha);
@ -170,8 +146,6 @@ debug_fs_recompile(const struct brw_compiler *c, void *log,
found |= check("coarse pixel", coarse_pixel);
found |= check("input slots valid", input_slots_valid);
found |= check("mrt alpha test function", alpha_test_func);
found |= check("mrt alpha test reference value", alpha_test_ref);
found |= debug_base_recompile(c, log, &old_key->base, &key->base);

9
src/intel/compiler/brw_fs.cpp
View file

@ -2949,9 +2949,6 @@ fs_visitor::run_fs(bool allow_spilling, bool do_rep_send)
if (failed)
return false;
if (wm_key->emit_alpha_test)
emit_alpha_test();
emit_fb_writes();
calculate_cfg();
@ -3304,12 +3301,8 @@ brw_nir_populate_wm_prog_data(nir_shader *shader,
struct brw_wm_prog_data *prog_data,
const struct brw_mue_map *mue_map)
{
/* key->alpha_test_func means simulating alpha testing via discards,
* so the shader definitely kills pixels.
*/
prog_data->uses_kill = shader->info.fs.uses_discard ||
shader->info.fs.uses_demote ||
key->emit_alpha_test;
shader->info.fs.uses_demote;
prog_data->uses_omask = !key->ignore_sample_mask_out &&
(shader->info.outputs_written & BITFIELD64_BIT(FRAG_RESULT_SAMPLE_MASK));
prog_data->color_outputs_written = key->color_outputs_valid;

2
src/intel/compiler/brw_fs.h
View file

@ -271,7 +271,6 @@ public:
void set_tcs_invocation_id();
void emit_alpha_test();
fs_inst *emit_single_fb_write(const brw::fs_builder &bld,
fs_reg color1, fs_reg color2,
fs_reg src0_alpha, unsigned components);
@ -294,7 +293,6 @@ public:
virtual void dump_instructions_to_file(FILE *file) const;
const brw_base_prog_key *const key;
const struct brw_sampler_prog_key_data *key_tex;
struct brw_gs_compile *gs_compile;

10
src/intel/compiler/brw_fs_nir.cpp
View file

@ -8131,15 +8131,7 @@ fs_nir_emit_texture(nir_to_brw_state &ntb,
}
if (instr->op == nir_texop_tg4) {
if (instr->component == 1 &&
s.key_tex->gather_channel_quirk_mask & (1 << instr->texture_index)) {
/* gather4 sampler is broken for green channel on RG32F --
* we must ask for blue instead.
*/
header_bits |= 2 << 16;
} else {
header_bits |= instr->component << 16;
}
header_bits |= instr->component << 16;
}
fs_reg dst = bld.vgrf(brw_type_for_nir_type(devinfo, instr->dest_type), 4 + instr->is_sparse);

97
src/intel/compiler/brw_fs_visitor.cpp
View file

@ -524,61 +524,6 @@ fs_visitor::emit_interpolation_setup()
}
}
static enum brw_conditional_mod
cond_for_alpha_func(enum compare_func func)
{
switch(func) {
case COMPARE_FUNC_GREATER:
return BRW_CONDITIONAL_G;
case COMPARE_FUNC_GEQUAL:
return BRW_CONDITIONAL_GE;
case COMPARE_FUNC_LESS:
return BRW_CONDITIONAL_L;
case COMPARE_FUNC_LEQUAL:
return BRW_CONDITIONAL_LE;
case COMPARE_FUNC_EQUAL:
return BRW_CONDITIONAL_EQ;
case COMPARE_FUNC_NOTEQUAL:
return BRW_CONDITIONAL_NEQ;
default:
unreachable("Not reached");
}
}
/**
* Alpha test support for when we compile it into the shader instead
* of using the normal fixed-function alpha test.
*/
void
fs_visitor::emit_alpha_test()
{
assert(stage == MESA_SHADER_FRAGMENT);
brw_wm_prog_key *key = (brw_wm_prog_key*) this->key;
const fs_builder bld = fs_builder(this).at_end();
const fs_builder abld = bld.annotate("Alpha test");
fs_inst *cmp;
if (key->alpha_test_func == COMPARE_FUNC_ALWAYS)
return;
if (key->alpha_test_func == COMPARE_FUNC_NEVER) {
/* f0.1 = 0 */
fs_reg some_reg = fs_reg(retype(brw_vec8_grf(0, 0),
BRW_REGISTER_TYPE_UW));
cmp = abld.CMP(bld.null_reg_f(), some_reg, some_reg,
BRW_CONDITIONAL_NEQ);
} else {
/* RT0 alpha */
fs_reg color = offset(outputs[0], bld, 3);
/* f0.1 &= func(color, ref) */
cmp = abld.CMP(bld.null_reg_f(), color, brw_imm_f(key->alpha_test_ref),
cond_for_alpha_func(key->alpha_test_func));
}
cmp->predicate = BRW_PREDICATE_NORMAL;
cmp->flag_subreg = 1;
}
fs_inst *
fs_visitor::emit_single_fb_write(const fs_builder &bld,
fs_reg color0, fs_reg color1,
@ -719,8 +664,6 @@ fs_visitor::emit_urb_writes(const fs_reg &gs_vertex_count)
int starting_urb_offset = 0;
const struct brw_vue_prog_data *vue_prog_data =
brw_vue_prog_data(this->prog_data);
const struct brw_vs_prog_key *vs_key =
(const struct brw_vs_prog_key *) this->key;
const GLbitfield64 psiz_mask =
VARYING_BIT_LAYER | VARYING_BIT_VIEWPORT | VARYING_BIT_PSIZ | VARYING_BIT_PRIMITIVE_SHADING_RATE;
const struct intel_vue_map *vue_map = &vue_prog_data->vue_map;
@ -857,34 +800,17 @@ fs_visitor::emit_urb_writes(const fs_reg &gs_vertex_count)
break;
}
if (stage == MESA_SHADER_VERTEX && vs_key->clamp_vertex_color &&
(varying == VARYING_SLOT_COL0 ||
varying == VARYING_SLOT_COL1 ||
varying == VARYING_SLOT_BFC0 ||
varying == VARYING_SLOT_BFC1)) {
/* We need to clamp these guys, so do a saturating MOV into a
* temp register and use that for the payload.
*/
for (int i = 0; i < 4; i++) {
fs_reg reg = fs_reg(VGRF, alloc.allocate(dispatch_width / 8),
outputs[varying].type);
fs_reg src = offset(this->outputs[varying], bld, i);
set_saturate(true, bld.MOV(reg, src));
sources[length++] = reg;
}
} else {
int slot_offset = 0;
int slot_offset = 0;
/* When using Primitive Replication, there may be multiple slots
* assigned to POS.
*/
if (varying == VARYING_SLOT_POS)
slot_offset = slot - vue_map->varying_to_slot[VARYING_SLOT_POS];
/* When using Primitive Replication, there may be multiple slots
* assigned to POS.
*/
if (varying == VARYING_SLOT_POS)
slot_offset = slot - vue_map->varying_to_slot[VARYING_SLOT_POS];
for (unsigned i = 0; i < 4; i++) {
sources[length++] = offset(this->outputs[varying], bld,
i + (slot_offset * 4));
}
for (unsigned i = 0; i < 4; i++) {
sources[length++] = offset(this->outputs[varying], bld,
i + (slot_offset * 4));
}
break;
}
@ -1125,11 +1051,6 @@ fs_visitor::fs_visitor(const struct brw_compiler *compiler,
void
fs_visitor::init()
{
if (key)
this->key_tex = &key->tex;
else
this->key_tex = NULL;
this->max_dispatch_width = 32;
this->prog_data = this->stage_prog_data;