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aco: Don't set scalar offset on buffer load instructions when it's zero.

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This helps generate slightly more optimal instructions.

Signed-off-by: Timur Kristóf <timur.kristof@gmail.com>
Reviewed-by: Rhys Perry <pendingchaos02@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/21363>
This commit is contained in:
Timur Kristóf 2023-02-03 02:03:46 +01:00 • committed by Marge Bot
parent e050a00b9f
commit afdacf4dcc
1 changed files with 3 additions and 1 deletions
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4
src/amd/compiler/aco_instruction_selection.cpp
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@ -7164,11 +7164,13 @@ visit_load_buffer(isel_context* ctx, nir_intrinsic_instr* intrin)
Builder bld(ctx->program, ctx->block);
bool idxen = !nir_src_is_const(intrin->src[3]) || nir_src_as_uint(intrin->src[3]);
bool s_offset_zero = nir_src_is_const(intrin->src[2]) && !nir_src_as_uint(intrin->src[2]);
Temp dst = get_ssa_temp(ctx, &intrin->dest.ssa);
Temp descriptor = bld.as_uniform(get_ssa_temp(ctx, intrin->src[0].ssa));
Temp v_offset = as_vgpr(ctx, get_ssa_temp(ctx, intrin->src[1].ssa));
Temp s_offset = bld.as_uniform(get_ssa_temp(ctx, intrin->src[2].ssa));
Temp s_offset =
s_offset_zero ? Temp(0, s1) : bld.as_uniform(get_ssa_temp(ctx, intrin->src[2].ssa));
Temp idx = idxen ? as_vgpr(ctx, get_ssa_temp(ctx, intrin->src[3].ssa)) : Temp();
bool swizzled = nir_intrinsic_access(intrin) & ACCESS_IS_SWIZZLED_AMD;