From afa4a1d49654122bb1d85a7133387e241380307f Mon Sep 17 00:00:00 2001 From: Alyssa Rosenzweig Date: Wed, 5 May 2021 14:06:26 -0400 Subject: [PATCH] pan/bi: Fix bi_rewrite_passthrough ordering The ordering is irrelevant for SSA form input, but is very relevant for register input. Signed-off-by: Alyssa Rosenzweig Part-of: --- src/panfrost/bifrost/bi_schedule.c | 16 ++++++++++------ 1 file changed, 10 insertions(+), 6 deletions(-) diff --git a/src/panfrost/bifrost/bi_schedule.c b/src/panfrost/bifrost/bi_schedule.c index ccd3e904732..dcb1084a27f 100644 --- a/src/panfrost/bifrost/bi_schedule.c +++ b/src/panfrost/bifrost/bi_schedule.c @@ -951,22 +951,26 @@ bi_use_passthrough(bi_instr *ins, bi_index old, /* Rewrites an adjacent pair of tuples _prec_eding and _succ_eding to use * intertuple passthroughs where necessary. Passthroughs are allowed as a - * post-condition of scheduling. */ + * post-condition of scheduling. Note we rewrite ADD first, FMA second -- + * opposite the order of execution. This is deliberate -- if both FMA and ADD + * write to the same logical register, the next executed tuple will get the + * latter result. There's no interference issue under the assumption of correct + * register allocation. */ static void bi_rewrite_passthrough(bi_tuple prec, bi_tuple succ) { bool sr_read = succ.add ? bi_opcode_props[succ.add->op].sr_read : false; - if (prec.fma) { - bi_use_passthrough(succ.fma, prec.fma->dest[0], BIFROST_SRC_PASS_FMA, false); - bi_use_passthrough(succ.add, prec.fma->dest[0], BIFROST_SRC_PASS_FMA, sr_read); - } - if (prec.add) { bi_use_passthrough(succ.fma, prec.add->dest[0], BIFROST_SRC_PASS_ADD, false); bi_use_passthrough(succ.add, prec.add->dest[0], BIFROST_SRC_PASS_ADD, sr_read); } + + if (prec.fma) { + bi_use_passthrough(succ.fma, prec.fma->dest[0], BIFROST_SRC_PASS_FMA, false); + bi_use_passthrough(succ.add, prec.fma->dest[0], BIFROST_SRC_PASS_FMA, sr_read); + } } static void