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i965/skl: Set the pulls bary bit in 3DSTATE_PS_EXTRA

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On Gen9+ there is a new bit in 3DSTATE_PS_EXTRA that must be set if
the shader sends a message to the pixel interpolator. This fixes the
interpolateAt* tests on SKL, apart from interpolateatsample-nonconst
but that is not implemented anywhere so it's not a regression.

Reviewed-by: Ben Widawsky <ben@bwidawsk.net>
Reviewed-by: Kenneth Graunke <kenneth@whitecape.org>
Cc: "10.6 10.5" <mesa-stable@lists.freedesktop.org>
(cherry picked from commit 493af150fb)
Signed-off-by: Emil Velikov <emil.l.velikov@gmail.com>

 Conflicts:
	src/mesa/drivers/dri/i965/brw_fs_nir.cpp
	src/mesa/drivers/dri/i965/gen8_ps_state.c
This commit is contained in:
Neil Roberts 2015-07-03 13:15:21 +01:00 • committed by Emil Velikov
parent 03cf14a713
commit afa43fa696
4 changed files with 9 additions and 0 deletions
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1
src/mesa/drivers/dri/i965/brw_context.h
View file

@ -415,6 +415,7 @@ struct brw_wm_prog_data {
bool uses_pos_offset;
bool uses_omask;
bool uses_kill;
bool pulls_bary;
uint32_t prog_offset_16;
/**

1
src/mesa/drivers/dri/i965/brw_defines.h
View file

@ -2124,6 +2124,7 @@ enum brw_pixel_shader_computed_depth_mode {
# define GEN8_PSX_SHADER_DISABLES_ALPHA_TO_COVERAGE (1 << 7)
# define GEN8_PSX_SHADER_IS_PER_SAMPLE (1 << 6)
# define GEN8_PSX_SHADER_COMPUTES_STENCIL (1 << 5)
# define GEN9_PSX_SHADER_PULLS_BARY (1 << 3)
# define GEN8_PSX_SHADER_HAS_UAV (1 << 2)
# define GEN8_PSX_SHADER_USES_INPUT_COVERAGE_MASK (1 << 1)

4
src/mesa/drivers/dri/i965/brw_fs_nir.cpp
View file

@ -1462,6 +1462,10 @@ fs_visitor::nir_emit_intrinsic(nir_intrinsic_instr *instr)
case nir_intrinsic_interp_var_at_centroid:
case nir_intrinsic_interp_var_at_sample:
case nir_intrinsic_interp_var_at_offset: {
assert(stage == MESA_SHADER_FRAGMENT);
((struct brw_wm_prog_data *) prog_data)->pulls_bary = true;
/* in SIMD16 mode, the pixel interpolator returns coords interleaved
* 8 channels at a time, same as the barycentric coords presented in
* the FS payload. this requires a bit of extra work to support.

3
src/mesa/drivers/dri/i965/gen8_ps_state.c
View file

@ -58,6 +58,9 @@ gen8_upload_ps_extra(struct brw_context *brw,
if (prog_data->uses_omask)
dw1 |= GEN8_PSX_OMASK_TO_RENDER_TARGET;
if (brw->gen >= 9 && prog_data->pulls_bary)
dw1 |= GEN9_PSX_SHADER_PULLS_BARY;
BEGIN_BATCH(2);
OUT_BATCH(_3DSTATE_PS_EXTRA << 16 | (2 - 2));
OUT_BATCH(dw1);