fdo-mirrors/mesa
1
0
Fork 0
mirror of https://gitlab.freedesktop.org/mesa/mesa.git synced 2026-05-05 13:58:04 +02:00
Code Issues Projects Releases Packages Wiki Activity Actions 2

i915g: Turn off FP16 in the vertex shaders.

Browse source 
This ended up being turned on in gallivm, but since we use nir_to_tgsi on
the VS and TGSI doesn't have FP16, we can't let that happen.

Fixes: f814a2449e ("llvmpipe: enable FP16 and update CL + traces piglit results.")
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/14403>
(cherry picked from commit b9e8936bfb)
This commit is contained in:
Emma Anholt 2021-12-20 15:15:38 -08:00 • committed by Eric Engestrom
parent d2d07f2ba4
commit af943229b1
2 changed files with 7 additions and 4 deletions
Show stats Download patch file Download diff file Expand all files Collapse all files

2
.pick_status.json
View file

@ -2317,7 +2317,7 @@
"description": "i915g: Turn off FP16 in the vertex shaders.",
"nominated": true,
"nomination_type": 1,
"resolution": 0,
"resolution": 1,
"main_sha": null,
"because_sha": "f814a2449e2c08a811a54fdada7e256945e68953"
},

9
src/gallium/drivers/i915/i915_screen.c
View file

@ -283,7 +283,13 @@ i915_get_shader_param(struct pipe_screen *screen, enum pipe_shader_type shader,
*/
return 0;
/* i915 can't do these, and even if gallivm NIR can we call nir_to_tgsi
* manually and TGSI can't.
*/
case PIPE_SHADER_CAP_INT16:
case PIPE_SHADER_CAP_FP16:
case PIPE_SHADER_CAP_FP16_DERIVATIVES:
case PIPE_SHADER_CAP_FP16_CONST_BUFFERS:
return 0;
case PIPE_SHADER_CAP_INDIRECT_TEMP_ADDR:
@ -343,9 +349,6 @@ i915_get_shader_param(struct pipe_screen *screen, enum pipe_shader_type shader,
case PIPE_SHADER_CAP_SUBROUTINES:
return 0;
case PIPE_SHADER_CAP_INT64_ATOMICS:
case PIPE_SHADER_CAP_FP16:
case PIPE_SHADER_CAP_FP16_DERIVATIVES:
case PIPE_SHADER_CAP_FP16_CONST_BUFFERS:
case PIPE_SHADER_CAP_INT16:
case PIPE_SHADER_CAP_GLSL_16BIT_CONSTS:
return 0;